0N/A/*
2273N/A * Copyright (c) 1998, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
0N/A// output_c.cpp - Class CPP file output routines for architecture definition
0N/A
0N/A#include "adlc.hpp"
0N/A
0N/A// Utilities to characterize effect statements
0N/Astatic bool is_def(int usedef) {
0N/A switch(usedef) {
0N/A case Component::DEF:
0N/A case Component::USE_DEF: return true; break;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/Astatic bool is_use(int usedef) {
0N/A switch(usedef) {
0N/A case Component::USE:
0N/A case Component::USE_DEF:
0N/A case Component::USE_KILL: return true; break;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/Astatic bool is_kill(int usedef) {
0N/A switch(usedef) {
0N/A case Component::KILL:
0N/A case Component::USE_KILL: return true; break;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A// Define an array containing the machine register names, strings.
0N/Astatic void defineRegNames(FILE *fp, RegisterForm *registers) {
0N/A if (registers) {
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"// An array of character pointers to machine register names.\n");
0N/A fprintf(fp,"const char *Matcher::regName[REG_COUNT] = {\n");
0N/A
0N/A // Output the register name for each register in the allocation classes
0N/A RegDef *reg_def = NULL;
0N/A RegDef *next = NULL;
0N/A registers->reset_RegDefs();
4446N/A for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) {
0N/A next = registers->iter_RegDefs();
0N/A const char *comma = (next != NULL) ? "," : " // no trailing comma";
4446N/A fprintf(fp," \"%s\"%s\n", reg_def->_regname, comma);
0N/A }
0N/A
0N/A // Finish defining enumeration
0N/A fprintf(fp,"};\n");
0N/A
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"// An array of character pointers to machine register names.\n");
0N/A fprintf(fp,"const VMReg OptoReg::opto2vm[REG_COUNT] = {\n");
0N/A reg_def = NULL;
0N/A next = NULL;
0N/A registers->reset_RegDefs();
4446N/A for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) {
0N/A next = registers->iter_RegDefs();
0N/A const char *comma = (next != NULL) ? "," : " // no trailing comma";
4446N/A fprintf(fp,"\t%s%s\n", reg_def->_concrete, comma);
0N/A }
0N/A // Finish defining array
0N/A fprintf(fp,"\t};\n");
0N/A fprintf(fp,"\n");
0N/A
0N/A fprintf(fp," OptoReg::Name OptoReg::vm2opto[ConcreteRegisterImpl::number_of_registers];\n");
0N/A
0N/A }
0N/A}
0N/A
0N/A// Define an array containing the machine register encoding values
0N/Astatic void defineRegEncodes(FILE *fp, RegisterForm *registers) {
0N/A if (registers) {
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"// An array of the machine register encode values\n");
0N/A fprintf(fp,"const unsigned char Matcher::_regEncode[REG_COUNT] = {\n");
0N/A
0N/A // Output the register encoding for each register in the allocation classes
0N/A RegDef *reg_def = NULL;
0N/A RegDef *next = NULL;
0N/A registers->reset_RegDefs();
4446N/A for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) {
0N/A next = registers->iter_RegDefs();
0N/A const char* register_encode = reg_def->register_encode();
0N/A const char *comma = (next != NULL) ? "," : " // no trailing comma";
0N/A int encval;
0N/A if (!ADLParser::is_int_token(register_encode, encval)) {
4446N/A fprintf(fp," %s%s // %s\n", register_encode, comma, reg_def->_regname);
0N/A } else {
0N/A // Output known constants in hex char format (backward compatibility).
0N/A assert(encval < 256, "Exceeded supported width for register encoding");
4446N/A fprintf(fp," (unsigned char)'\\x%X'%s // %s\n", encval, comma, reg_def->_regname);
0N/A }
0N/A }
0N/A // Finish defining enumeration
0N/A fprintf(fp,"};\n");
0N/A
0N/A } // Done defining array
0N/A}
0N/A
0N/A// Output an enumeration of register class names
0N/Astatic void defineRegClassEnum(FILE *fp, RegisterForm *registers) {
0N/A if (registers) {
0N/A // Output an enumeration of register class names
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"// Enumeration of register class names\n");
0N/A fprintf(fp, "enum machRegisterClass {\n");
0N/A registers->_rclasses.reset();
4446N/A for (const char *class_name = NULL; (class_name = registers->_rclasses.iter()) != NULL;) {
4446N/A const char * class_name_to_upper = toUpper(class_name);
4446N/A fprintf(fp," %s,\n", class_name_to_upper);
4446N/A delete[] class_name_to_upper;
0N/A }
0N/A // Finish defining enumeration
0N/A fprintf(fp, " _last_Mach_Reg_Class\n");
0N/A fprintf(fp, "};\n");
0N/A }
0N/A}
0N/A
0N/A// Declare an enumeration of user-defined register classes
0N/A// and a list of register masks, one for each class.
0N/Avoid ArchDesc::declare_register_masks(FILE *fp_hpp) {
0N/A const char *rc_name;
0N/A
4446N/A if (_register) {
0N/A // Build enumeration of user-defined register classes.
0N/A defineRegClassEnum(fp_hpp, _register);
0N/A
0N/A // Generate a list of register masks, one for each class.
0N/A fprintf(fp_hpp,"\n");
0N/A fprintf(fp_hpp,"// Register masks, one for each register class.\n");
0N/A _register->_rclasses.reset();
4446N/A for (rc_name = NULL; (rc_name = _register->_rclasses.iter()) != NULL;) {
4446N/A const char *prefix = "";
4446N/A RegClass *reg_class = _register->getRegClass(rc_name);
4446N/A assert(reg_class, "Using an undefined register class");
4446N/A
4446N/A const char* rc_name_to_upper = toUpper(rc_name);
0N/A
2964N/A if (reg_class->_user_defined == NULL) {
4446N/A fprintf(fp_hpp, "extern const RegMask _%s%s_mask;\n", prefix, rc_name_to_upper);
4446N/A fprintf(fp_hpp, "inline const RegMask &%s%s_mask() { return _%s%s_mask; }\n", prefix, rc_name_to_upper, prefix, rc_name_to_upper);
2964N/A } else {
4446N/A fprintf(fp_hpp, "inline const RegMask &%s%s_mask() { %s }\n", prefix, rc_name_to_upper, reg_class->_user_defined);
2964N/A }
0N/A
4446N/A if (reg_class->_stack_or_reg) {
2964N/A assert(reg_class->_user_defined == NULL, "no user defined reg class here");
4446N/A fprintf(fp_hpp, "extern const RegMask _%sSTACK_OR_%s_mask;\n", prefix, rc_name_to_upper);
4446N/A fprintf(fp_hpp, "inline const RegMask &%sSTACK_OR_%s_mask() { return _%sSTACK_OR_%s_mask; }\n", prefix, rc_name_to_upper, prefix, rc_name_to_upper);
0N/A }
4446N/A delete[] rc_name_to_upper;
4446N/A
0N/A }
0N/A }
0N/A}
0N/A
0N/A// Generate an enumeration of user-defined register classes
0N/A// and a list of register masks, one for each class.
0N/Avoid ArchDesc::build_register_masks(FILE *fp_cpp) {
0N/A const char *rc_name;
0N/A
4446N/A if (_register) {
0N/A // Generate a list of register masks, one for each class.
0N/A fprintf(fp_cpp,"\n");
0N/A fprintf(fp_cpp,"// Register masks, one for each register class.\n");
0N/A _register->_rclasses.reset();
4446N/A for (rc_name = NULL; (rc_name = _register->_rclasses.iter()) != NULL;) {
4446N/A const char *prefix = "";
4446N/A RegClass *reg_class = _register->getRegClass(rc_name);
4446N/A assert(reg_class, "Using an undefined register class");
4446N/A
4446N/A if (reg_class->_user_defined != NULL) {
4446N/A continue;
4446N/A }
2964N/A
0N/A int len = RegisterForm::RegMask_Size();
4446N/A const char* rc_name_to_upper = toUpper(rc_name);
4446N/A fprintf(fp_cpp, "const RegMask _%s%s_mask(", prefix, rc_name_to_upper);
4446N/A
4446N/A {
4446N/A int i;
4446N/A for(i = 0; i < len - 1; i++) {
4446N/A fprintf(fp_cpp," 0x%x,", reg_class->regs_in_word(i, false));
4446N/A }
4446N/A fprintf(fp_cpp," 0x%x );\n", reg_class->regs_in_word(i, false));
0N/A }
0N/A
4446N/A if (reg_class->_stack_or_reg) {
0N/A int i;
4446N/A fprintf(fp_cpp, "const RegMask _%sSTACK_OR_%s_mask(", prefix, rc_name_to_upper);
4446N/A for(i = 0; i < len - 1; i++) {
4446N/A fprintf(fp_cpp," 0x%x,",reg_class->regs_in_word(i, true));
4446N/A }
4446N/A fprintf(fp_cpp," 0x%x );\n",reg_class->regs_in_word(i, true));
0N/A }
4446N/A delete[] rc_name_to_upper;
0N/A }
0N/A }
0N/A}
0N/A
0N/A// Compute an index for an array in the pipeline_reads_NNN arrays
0N/Astatic int pipeline_reads_initializer(FILE *fp_cpp, NameList &pipeline_reads, PipeClassForm *pipeclass)
0N/A{
0N/A int templen = 1;
0N/A int paramcount = 0;
0N/A const char *paramname;
0N/A
0N/A if (pipeclass->_parameters.count() == 0)
0N/A return -1;
0N/A
0N/A pipeclass->_parameters.reset();
0N/A paramname = pipeclass->_parameters.iter();
0N/A const PipeClassOperandForm *pipeopnd =
0N/A (const PipeClassOperandForm *)pipeclass->_localUsage[paramname];
0N/A if (pipeopnd && !pipeopnd->isWrite() && strcmp(pipeopnd->_stage, "Universal"))
0N/A pipeclass->_parameters.reset();
0N/A
0N/A while ( (paramname = pipeclass->_parameters.iter()) != NULL ) {
603N/A const PipeClassOperandForm *tmppipeopnd =
0N/A (const PipeClassOperandForm *)pipeclass->_localUsage[paramname];
0N/A
603N/A if (tmppipeopnd)
603N/A templen += 10 + (int)strlen(tmppipeopnd->_stage);
0N/A else
0N/A templen += 19;
0N/A
0N/A paramcount++;
0N/A }
0N/A
0N/A // See if the count is zero
0N/A if (paramcount == 0) {
0N/A return -1;
0N/A }
0N/A
0N/A char *operand_stages = new char [templen];
0N/A operand_stages[0] = 0;
0N/A int i = 0;
0N/A templen = 0;
0N/A
0N/A pipeclass->_parameters.reset();
0N/A paramname = pipeclass->_parameters.iter();
0N/A pipeopnd = (const PipeClassOperandForm *)pipeclass->_localUsage[paramname];
0N/A if (pipeopnd && !pipeopnd->isWrite() && strcmp(pipeopnd->_stage, "Universal"))
0N/A pipeclass->_parameters.reset();
0N/A
0N/A while ( (paramname = pipeclass->_parameters.iter()) != NULL ) {
603N/A const PipeClassOperandForm *tmppipeopnd =
0N/A (const PipeClassOperandForm *)pipeclass->_localUsage[paramname];
0N/A templen += sprintf(&operand_stages[templen], " stage_%s%c\n",
603N/A tmppipeopnd ? tmppipeopnd->_stage : "undefined",
0N/A (++i < paramcount ? ',' : ' ') );
0N/A }
0N/A
0N/A // See if the same string is in the table
0N/A int ndx = pipeline_reads.index(operand_stages);
0N/A
0N/A // No, add it to the table
0N/A if (ndx < 0) {
0N/A pipeline_reads.addName(operand_stages);
0N/A ndx = pipeline_reads.index(operand_stages);
0N/A
0N/A fprintf(fp_cpp, "static const enum machPipelineStages pipeline_reads_%03d[%d] = {\n%s};\n\n",
0N/A ndx+1, paramcount, operand_stages);
0N/A }
0N/A else
0N/A delete [] operand_stages;
0N/A
0N/A return (ndx);
0N/A}
0N/A
0N/A// Compute an index for an array in the pipeline_res_stages_NNN arrays
0N/Astatic int pipeline_res_stages_initializer(
0N/A FILE *fp_cpp,
0N/A PipelineForm *pipeline,
0N/A NameList &pipeline_res_stages,
0N/A PipeClassForm *pipeclass)
0N/A{
0N/A const PipeClassResourceForm *piperesource;
0N/A int * res_stages = new int [pipeline->_rescount];
0N/A int i;
0N/A
0N/A for (i = 0; i < pipeline->_rescount; i++)
0N/A res_stages[i] = 0;
0N/A
0N/A for (pipeclass->_resUsage.reset();
0N/A (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) {
0N/A int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask();
0N/A for (i = 0; i < pipeline->_rescount; i++)
0N/A if ((1 << i) & used_mask) {
0N/A int stage = pipeline->_stages.index(piperesource->_stage);
0N/A if (res_stages[i] < stage+1)
0N/A res_stages[i] = stage+1;
0N/A }
0N/A }
0N/A
0N/A // Compute the length needed for the resource list
0N/A int commentlen = 0;
0N/A int max_stage = 0;
0N/A for (i = 0; i < pipeline->_rescount; i++) {
0N/A if (res_stages[i] == 0) {
0N/A if (max_stage < 9)
0N/A max_stage = 9;
0N/A }
0N/A else {
0N/A int stagelen = (int)strlen(pipeline->_stages.name(res_stages[i]-1));
0N/A if (max_stage < stagelen)
0N/A max_stage = stagelen;
0N/A }
0N/A
0N/A commentlen += (int)strlen(pipeline->_reslist.name(i));
0N/A }
0N/A
0N/A int templen = 1 + commentlen + pipeline->_rescount * (max_stage + 14);
0N/A
0N/A // Allocate space for the resource list
0N/A char * resource_stages = new char [templen];
0N/A
0N/A templen = 0;
0N/A for (i = 0; i < pipeline->_rescount; i++) {
0N/A const char * const resname =
0N/A res_stages[i] == 0 ? "undefined" : pipeline->_stages.name(res_stages[i]-1);
0N/A
0N/A templen += sprintf(&resource_stages[templen], " stage_%s%-*s // %s\n",
0N/A resname, max_stage - (int)strlen(resname) + 1,
0N/A (i < pipeline->_rescount-1) ? "," : "",
0N/A pipeline->_reslist.name(i));
0N/A }
0N/A
0N/A // See if the same string is in the table
0N/A int ndx = pipeline_res_stages.index(resource_stages);
0N/A
0N/A // No, add it to the table
0N/A if (ndx < 0) {
0N/A pipeline_res_stages.addName(resource_stages);
0N/A ndx = pipeline_res_stages.index(resource_stages);
0N/A
0N/A fprintf(fp_cpp, "static const enum machPipelineStages pipeline_res_stages_%03d[%d] = {\n%s};\n\n",
0N/A ndx+1, pipeline->_rescount, resource_stages);
0N/A }
0N/A else
0N/A delete [] resource_stages;
0N/A
0N/A delete [] res_stages;
0N/A
0N/A return (ndx);
0N/A}
0N/A
0N/A// Compute an index for an array in the pipeline_res_cycles_NNN arrays
0N/Astatic int pipeline_res_cycles_initializer(
0N/A FILE *fp_cpp,
0N/A PipelineForm *pipeline,
0N/A NameList &pipeline_res_cycles,
0N/A PipeClassForm *pipeclass)
0N/A{
0N/A const PipeClassResourceForm *piperesource;
0N/A int * res_cycles = new int [pipeline->_rescount];
0N/A int i;
0N/A
0N/A for (i = 0; i < pipeline->_rescount; i++)
0N/A res_cycles[i] = 0;
0N/A
0N/A for (pipeclass->_resUsage.reset();
0N/A (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) {
0N/A int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask();
0N/A for (i = 0; i < pipeline->_rescount; i++)
0N/A if ((1 << i) & used_mask) {
0N/A int cycles = piperesource->_cycles;
0N/A if (res_cycles[i] < cycles)
0N/A res_cycles[i] = cycles;
0N/A }
0N/A }
0N/A
0N/A // Pre-compute the string length
0N/A int templen;
0N/A int cyclelen = 0, commentlen = 0;
0N/A int max_cycles = 0;
0N/A char temp[32];
0N/A
0N/A for (i = 0; i < pipeline->_rescount; i++) {
0N/A if (max_cycles < res_cycles[i])
0N/A max_cycles = res_cycles[i];
0N/A templen = sprintf(temp, "%d", res_cycles[i]);
0N/A if (cyclelen < templen)
0N/A cyclelen = templen;
0N/A commentlen += (int)strlen(pipeline->_reslist.name(i));
0N/A }
0N/A
0N/A templen = 1 + commentlen + (cyclelen + 8) * pipeline->_rescount;
0N/A
0N/A // Allocate space for the resource list
0N/A char * resource_cycles = new char [templen];
0N/A
0N/A templen = 0;
0N/A
0N/A for (i = 0; i < pipeline->_rescount; i++) {
0N/A templen += sprintf(&resource_cycles[templen], " %*d%c // %s\n",
0N/A cyclelen, res_cycles[i], (i < pipeline->_rescount-1) ? ',' : ' ', pipeline->_reslist.name(i));
0N/A }
0N/A
0N/A // See if the same string is in the table
0N/A int ndx = pipeline_res_cycles.index(resource_cycles);
0N/A
0N/A // No, add it to the table
0N/A if (ndx < 0) {
0N/A pipeline_res_cycles.addName(resource_cycles);
0N/A ndx = pipeline_res_cycles.index(resource_cycles);
0N/A
0N/A fprintf(fp_cpp, "static const uint pipeline_res_cycles_%03d[%d] = {\n%s};\n\n",
0N/A ndx+1, pipeline->_rescount, resource_cycles);
0N/A }
0N/A else
0N/A delete [] resource_cycles;
0N/A
0N/A delete [] res_cycles;
0N/A
0N/A return (ndx);
0N/A}
0N/A
0N/A//typedef unsigned long long uint64_t;
0N/A
0N/A// Compute an index for an array in the pipeline_res_mask_NNN arrays
0N/Astatic int pipeline_res_mask_initializer(
0N/A FILE *fp_cpp,
0N/A PipelineForm *pipeline,
0N/A NameList &pipeline_res_mask,
0N/A NameList &pipeline_res_args,
0N/A PipeClassForm *pipeclass)
0N/A{
0N/A const PipeClassResourceForm *piperesource;
0N/A const uint rescount = pipeline->_rescount;
0N/A const uint maxcycleused = pipeline->_maxcycleused;
0N/A const uint cyclemasksize = (maxcycleused + 31) >> 5;
0N/A
0N/A int i, j;
0N/A int element_count = 0;
0N/A uint *res_mask = new uint [cyclemasksize];
0N/A uint resources_used = 0;
0N/A uint resources_used_exclusively = 0;
0N/A
0N/A for (pipeclass->_resUsage.reset();
0N/A (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; )
0N/A element_count++;
0N/A
0N/A // Pre-compute the string length
0N/A int templen;
0N/A int commentlen = 0;
0N/A int max_cycles = 0;
0N/A
0N/A int cyclelen = ((maxcycleused + 3) >> 2);
0N/A int masklen = (rescount + 3) >> 2;
0N/A
0N/A int cycledigit = 0;
0N/A for (i = maxcycleused; i > 0; i /= 10)
0N/A cycledigit++;
0N/A
0N/A int maskdigit = 0;
0N/A for (i = rescount; i > 0; i /= 10)
0N/A maskdigit++;
0N/A
0N/A static const char * pipeline_use_cycle_mask = "Pipeline_Use_Cycle_Mask";
0N/A static const char * pipeline_use_element = "Pipeline_Use_Element";
0N/A
0N/A templen = 1 +
0N/A (int)(strlen(pipeline_use_cycle_mask) + (int)strlen(pipeline_use_element) +
0N/A (cyclemasksize * 12) + masklen + (cycledigit * 2) + 30) * element_count;
0N/A
0N/A // Allocate space for the resource list
0N/A char * resource_mask = new char [templen];
0N/A char * last_comma = NULL;
0N/A
0N/A templen = 0;
0N/A
0N/A for (pipeclass->_resUsage.reset();
0N/A (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) {
0N/A int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask();
0N/A
0N/A if (!used_mask)
0N/A fprintf(stderr, "*** used_mask is 0 ***\n");
0N/A
0N/A resources_used |= used_mask;
0N/A
0N/A uint lb, ub;
0N/A
0N/A for (lb = 0; (used_mask & (1 << lb)) == 0; lb++);
0N/A for (ub = 31; (used_mask & (1 << ub)) == 0; ub--);
0N/A
0N/A if (lb == ub)
0N/A resources_used_exclusively |= used_mask;
0N/A
0N/A int formatlen =
0N/A sprintf(&resource_mask[templen], " %s(0x%0*x, %*d, %*d, %s %s(",
0N/A pipeline_use_element,
0N/A masklen, used_mask,
0N/A cycledigit, lb, cycledigit, ub,
0N/A ((used_mask & (used_mask-1)) != 0) ? "true, " : "false,",
0N/A pipeline_use_cycle_mask);
0N/A
0N/A templen += formatlen;
0N/A
0N/A memset(res_mask, 0, cyclemasksize * sizeof(uint));
0N/A
0N/A int cycles = piperesource->_cycles;
0N/A uint stage = pipeline->_stages.index(piperesource->_stage);
4033N/A if (NameList::Not_in_list == stage) {
4033N/A fprintf(stderr,
4033N/A "pipeline_res_mask_initializer: "
4033N/A "semantic error: "
4033N/A "pipeline stage undeclared: %s\n",
4033N/A piperesource->_stage);
4033N/A exit(1);
4033N/A }
0N/A uint upper_limit = stage+cycles-1;
0N/A uint lower_limit = stage-1;
0N/A uint upper_idx = upper_limit >> 5;
0N/A uint lower_idx = lower_limit >> 5;
0N/A uint upper_position = upper_limit & 0x1f;
0N/A uint lower_position = lower_limit & 0x1f;
0N/A
0N/A uint mask = (((uint)1) << upper_position) - 1;
0N/A
0N/A while ( upper_idx > lower_idx ) {
0N/A res_mask[upper_idx--] |= mask;
0N/A mask = (uint)-1;
0N/A }
0N/A
0N/A mask -= (((uint)1) << lower_position) - 1;
0N/A res_mask[upper_idx] |= mask;
0N/A
0N/A for (j = cyclemasksize-1; j >= 0; j--) {
0N/A formatlen =
0N/A sprintf(&resource_mask[templen], "0x%08x%s", res_mask[j], j > 0 ? ", " : "");
0N/A templen += formatlen;
0N/A }
0N/A
0N/A resource_mask[templen++] = ')';
0N/A resource_mask[templen++] = ')';
0N/A last_comma = &resource_mask[templen];
0N/A resource_mask[templen++] = ',';
0N/A resource_mask[templen++] = '\n';
0N/A }
0N/A
0N/A resource_mask[templen] = 0;
0N/A if (last_comma)
0N/A last_comma[0] = ' ';
0N/A
0N/A // See if the same string is in the table
0N/A int ndx = pipeline_res_mask.index(resource_mask);
0N/A
0N/A // No, add it to the table
0N/A if (ndx < 0) {
0N/A pipeline_res_mask.addName(resource_mask);
0N/A ndx = pipeline_res_mask.index(resource_mask);
0N/A
0N/A if (strlen(resource_mask) > 0)
0N/A fprintf(fp_cpp, "static const Pipeline_Use_Element pipeline_res_mask_%03d[%d] = {\n%s};\n\n",
0N/A ndx+1, element_count, resource_mask);
0N/A
0N/A char * args = new char [9 + 2*masklen + maskdigit];
0N/A
0N/A sprintf(args, "0x%0*x, 0x%0*x, %*d",
0N/A masklen, resources_used,
0N/A masklen, resources_used_exclusively,
0N/A maskdigit, element_count);
0N/A
0N/A pipeline_res_args.addName(args);
0N/A }
0N/A else
0N/A delete [] resource_mask;
0N/A
0N/A delete [] res_mask;
0N/A//delete [] res_masks;
0N/A
0N/A return (ndx);
0N/A}
0N/A
0N/Avoid ArchDesc::build_pipe_classes(FILE *fp_cpp) {
0N/A const char *classname;
0N/A const char *resourcename;
0N/A int resourcenamelen = 0;
0N/A NameList pipeline_reads;
0N/A NameList pipeline_res_stages;
0N/A NameList pipeline_res_cycles;
0N/A NameList pipeline_res_masks;
0N/A NameList pipeline_res_args;
0N/A const int default_latency = 1;
0N/A const int non_operand_latency = 0;
0N/A const int node_latency = 0;
0N/A
0N/A if (!_pipeline) {
0N/A fprintf(fp_cpp, "uint Node::latency(uint i) const {\n");
0N/A fprintf(fp_cpp, " // assert(false, \"pipeline functionality is not defined\");\n");
0N/A fprintf(fp_cpp, " return %d;\n", non_operand_latency);
0N/A fprintf(fp_cpp, "}\n");
0N/A return;
0N/A }
0N/A
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "//------------------Pipeline Methods-----------------------------------------\n");
0N/A fprintf(fp_cpp, "#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, "const char * Pipeline::stageName(uint s) {\n");
0N/A fprintf(fp_cpp, " static const char * const _stage_names[] = {\n");
0N/A fprintf(fp_cpp, " \"undefined\"");
0N/A
0N/A for (int s = 0; s < _pipeline->_stagecnt; s++)
0N/A fprintf(fp_cpp, ", \"%s\"", _pipeline->_stages.name(s));
0N/A
0N/A fprintf(fp_cpp, "\n };\n\n");
0N/A fprintf(fp_cpp, " return (s <= %d ? _stage_names[s] : \"???\");\n",
0N/A _pipeline->_stagecnt);
0N/A fprintf(fp_cpp, "}\n");
0N/A fprintf(fp_cpp, "#endif\n\n");
0N/A
0N/A fprintf(fp_cpp, "uint Pipeline::functional_unit_latency(uint start, const Pipeline *pred) const {\n");
0N/A fprintf(fp_cpp, " // See if the functional units overlap\n");
0N/A#if 0
0N/A fprintf(fp_cpp, "\n#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, " if (TraceOptoOutput) {\n");
0N/A fprintf(fp_cpp, " tty->print(\"# functional_unit_latency: start == %%d, this->exclusively == 0x%%03x, pred->exclusively == 0x%%03x\\n\", start, resourcesUsedExclusively(), pred->resourcesUsedExclusively());\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "#endif\n\n");
0N/A#endif
0N/A fprintf(fp_cpp, " uint mask = resourcesUsedExclusively() & pred->resourcesUsedExclusively();\n");
0N/A fprintf(fp_cpp, " if (mask == 0)\n return (start);\n\n");
0N/A#if 0
0N/A fprintf(fp_cpp, "\n#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, " if (TraceOptoOutput) {\n");
0N/A fprintf(fp_cpp, " tty->print(\"# functional_unit_latency: mask == 0x%%x\\n\", mask);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "#endif\n\n");
0N/A#endif
0N/A fprintf(fp_cpp, " for (uint i = 0; i < pred->resourceUseCount(); i++) {\n");
0N/A fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred->resourceUseElement(i);\n");
0N/A fprintf(fp_cpp, " if (predUse->multiple())\n");
0N/A fprintf(fp_cpp, " continue;\n\n");
0N/A fprintf(fp_cpp, " for (uint j = 0; j < resourceUseCount(); j++) {\n");
0N/A fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = resourceUseElement(j);\n");
0N/A fprintf(fp_cpp, " if (currUse->multiple())\n");
0N/A fprintf(fp_cpp, " continue;\n\n");
0N/A fprintf(fp_cpp, " if (predUse->used() & currUse->used()) {\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->mask();\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->mask();\n\n");
0N/A fprintf(fp_cpp, " for ( y <<= start; x.overlaps(y); start++ )\n");
0N/A fprintf(fp_cpp, " y <<= 1;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n\n");
0N/A fprintf(fp_cpp, " // There is the potential for overlap\n");
0N/A fprintf(fp_cpp, " return (start);\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A fprintf(fp_cpp, "// The following two routines assume that the root Pipeline_Use entity\n");
0N/A fprintf(fp_cpp, "// consists of exactly 1 element for each functional unit\n");
0N/A fprintf(fp_cpp, "// start is relative to the current cycle; used for latency-based info\n");
0N/A fprintf(fp_cpp, "uint Pipeline_Use::full_latency(uint delay, const Pipeline_Use &pred) const {\n");
0N/A fprintf(fp_cpp, " for (uint i = 0; i < pred._count; i++) {\n");
0N/A fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred.element(i);\n");
0N/A fprintf(fp_cpp, " if (predUse->_multiple) {\n");
0N/A fprintf(fp_cpp, " uint min_delay = %d;\n",
0N/A _pipeline->_maxcycleused+1);
0N/A fprintf(fp_cpp, " // Multiple possible functional units, choose first unused one\n");
0N/A fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n");
0N/A fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = element(j);\n");
0N/A fprintf(fp_cpp, " uint curr_delay = delay;\n");
0N/A fprintf(fp_cpp, " if (predUse->_used & currUse->_used) {\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->_mask;\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->_mask;\n\n");
0N/A fprintf(fp_cpp, " for ( y <<= curr_delay; x.overlaps(y); curr_delay++ )\n");
0N/A fprintf(fp_cpp, " y <<= 1;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " if (min_delay > curr_delay)\n min_delay = curr_delay;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " if (delay < min_delay)\n delay = min_delay;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " else {\n");
0N/A fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n");
0N/A fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = element(j);\n");
0N/A fprintf(fp_cpp, " if (predUse->_used & currUse->_used) {\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->_mask;\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->_mask;\n\n");
0N/A fprintf(fp_cpp, " for ( y <<= delay; x.overlaps(y); delay++ )\n");
0N/A fprintf(fp_cpp, " y <<= 1;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n\n");
0N/A fprintf(fp_cpp, " return (delay);\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A fprintf(fp_cpp, "void Pipeline_Use::add_usage(const Pipeline_Use &pred) {\n");
0N/A fprintf(fp_cpp, " for (uint i = 0; i < pred._count; i++) {\n");
0N/A fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred.element(i);\n");
0N/A fprintf(fp_cpp, " if (predUse->_multiple) {\n");
0N/A fprintf(fp_cpp, " // Multiple possible functional units, choose first unused one\n");
0N/A fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Element *currUse = element(j);\n");
0N/A fprintf(fp_cpp, " if ( !predUse->_mask.overlaps(currUse->_mask) ) {\n");
0N/A fprintf(fp_cpp, " currUse->_used |= (1 << j);\n");
0N/A fprintf(fp_cpp, " _resources_used |= (1 << j);\n");
0N/A fprintf(fp_cpp, " currUse->_mask.Or(predUse->_mask);\n");
0N/A fprintf(fp_cpp, " break;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " else {\n");
0N/A fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n");
0N/A fprintf(fp_cpp, " Pipeline_Use_Element *currUse = element(j);\n");
0N/A fprintf(fp_cpp, " currUse->_used |= (1 << j);\n");
0N/A fprintf(fp_cpp, " _resources_used |= (1 << j);\n");
0N/A fprintf(fp_cpp, " currUse->_mask.Or(predUse->_mask);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A
0N/A fprintf(fp_cpp, "uint Pipeline::operand_latency(uint opnd, const Pipeline *pred) const {\n");
0N/A fprintf(fp_cpp, " int const default_latency = 1;\n");
0N/A fprintf(fp_cpp, "\n");
0N/A#if 0
0N/A fprintf(fp_cpp, "#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, " if (TraceOptoOutput) {\n");
0N/A fprintf(fp_cpp, " tty->print(\"# operand_latency(%%d), _read_stage_count = %%d\\n\", opnd, _read_stage_count);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "#endif\n\n");
0N/A#endif
1409N/A fprintf(fp_cpp, " assert(this, \"NULL pipeline info\");\n");
1409N/A fprintf(fp_cpp, " assert(pred, \"NULL predecessor pipline info\");\n\n");
0N/A fprintf(fp_cpp, " if (pred->hasFixedLatency())\n return (pred->fixedLatency());\n\n");
0N/A fprintf(fp_cpp, " // If this is not an operand, then assume a dependence with 0 latency\n");
0N/A fprintf(fp_cpp, " if (opnd > _read_stage_count)\n return (0);\n\n");
0N/A fprintf(fp_cpp, " uint writeStage = pred->_write_stage;\n");
0N/A fprintf(fp_cpp, " uint readStage = _read_stages[opnd-1];\n");
0N/A#if 0
0N/A fprintf(fp_cpp, "\n#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, " if (TraceOptoOutput) {\n");
0N/A fprintf(fp_cpp, " tty->print(\"# operand_latency: writeStage=%%s readStage=%%s, opnd=%%d\\n\", stageName(writeStage), stageName(readStage), opnd);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "#endif\n\n");
0N/A#endif
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, " if (writeStage == stage_undefined || readStage == stage_undefined)\n");
0N/A fprintf(fp_cpp, " return (default_latency);\n");
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, " int delta = writeStage - readStage;\n");
0N/A fprintf(fp_cpp, " if (delta < 0) delta = 0;\n\n");
0N/A#if 0
0N/A fprintf(fp_cpp, "\n#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, " if (TraceOptoOutput) {\n");
0N/A fprintf(fp_cpp, " tty->print(\"# operand_latency: delta=%%d\\n\", delta);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "#endif\n\n");
0N/A#endif
0N/A fprintf(fp_cpp, " return (delta);\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A
0N/A if (!_pipeline)
0N/A /* Do Nothing */;
0N/A
0N/A else if (_pipeline->_maxcycleused <=
0N/A#ifdef SPARC
0N/A 64
0N/A#else
0N/A 32
0N/A#endif
0N/A ) {
0N/A fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator&(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n");
0N/A fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(in1._mask & in2._mask);\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator|(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n");
0N/A fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(in1._mask | in2._mask);\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A }
0N/A else {
0N/A uint l;
0N/A uint masklen = (_pipeline->_maxcycleused + 31) >> 5;
0N/A fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator&(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n");
0N/A fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(");
0N/A for (l = 1; l <= masklen; l++)
0N/A fprintf(fp_cpp, "in1._mask%d & in2._mask%d%s\n", l, l, l < masklen ? ", " : "");
0N/A fprintf(fp_cpp, ");\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator|(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n");
0N/A fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(");
0N/A for (l = 1; l <= masklen; l++)
0N/A fprintf(fp_cpp, "in1._mask%d | in2._mask%d%s", l, l, l < masklen ? ", " : "");
0N/A fprintf(fp_cpp, ");\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A fprintf(fp_cpp, "void Pipeline_Use_Cycle_Mask::Or(const Pipeline_Use_Cycle_Mask &in2) {\n ");
0N/A for (l = 1; l <= masklen; l++)
0N/A fprintf(fp_cpp, " _mask%d |= in2._mask%d;", l, l);
0N/A fprintf(fp_cpp, "\n}\n\n");
0N/A }
0N/A
0N/A /* Get the length of all the resource names */
0N/A for (_pipeline->_reslist.reset(), resourcenamelen = 0;
0N/A (resourcename = _pipeline->_reslist.iter()) != NULL;
0N/A resourcenamelen += (int)strlen(resourcename));
0N/A
0N/A // Create the pipeline class description
0N/A
0N/A fprintf(fp_cpp, "static const Pipeline pipeline_class_Zero_Instructions(0, 0, true, 0, 0, false, false, false, false, NULL, NULL, NULL, Pipeline_Use(0, 0, 0, NULL));\n\n");
0N/A fprintf(fp_cpp, "static const Pipeline pipeline_class_Unknown_Instructions(0, 0, true, 0, 0, false, true, true, false, NULL, NULL, NULL, Pipeline_Use(0, 0, 0, NULL));\n\n");
0N/A
0N/A fprintf(fp_cpp, "const Pipeline_Use_Element Pipeline_Use::elaborated_elements[%d] = {\n", _pipeline->_rescount);
0N/A for (int i1 = 0; i1 < _pipeline->_rescount; i1++) {
0N/A fprintf(fp_cpp, " Pipeline_Use_Element(0, %d, %d, false, Pipeline_Use_Cycle_Mask(", i1, i1);
0N/A uint masklen = (_pipeline->_maxcycleused + 31) >> 5;
0N/A for (int i2 = masklen-1; i2 >= 0; i2--)
0N/A fprintf(fp_cpp, "0%s", i2 > 0 ? ", " : "");
0N/A fprintf(fp_cpp, "))%s\n", i1 < (_pipeline->_rescount-1) ? "," : "");
0N/A }
0N/A fprintf(fp_cpp, "};\n\n");
0N/A
0N/A fprintf(fp_cpp, "const Pipeline_Use Pipeline_Use::elaborated_use(0, 0, %d, (Pipeline_Use_Element *)&elaborated_elements[0]);\n\n",
0N/A _pipeline->_rescount);
0N/A
0N/A for (_pipeline->_classlist.reset(); (classname = _pipeline->_classlist.iter()) != NULL; ) {
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "// Pipeline Class \"%s\"\n", classname);
0N/A PipeClassForm *pipeclass = _pipeline->_classdict[classname]->is_pipeclass();
0N/A int maxWriteStage = -1;
0N/A int maxMoreInstrs = 0;
0N/A int paramcount = 0;
0N/A int i = 0;
0N/A const char *paramname;
0N/A int resource_count = (_pipeline->_rescount + 3) >> 2;
0N/A
0N/A // Scan the operands, looking for last output stage and number of inputs
0N/A for (pipeclass->_parameters.reset(); (paramname = pipeclass->_parameters.iter()) != NULL; ) {
0N/A const PipeClassOperandForm *pipeopnd =
0N/A (const PipeClassOperandForm *)pipeclass->_localUsage[paramname];
0N/A if (pipeopnd) {
0N/A if (pipeopnd->_iswrite) {
0N/A int stagenum = _pipeline->_stages.index(pipeopnd->_stage);
0N/A int moreinsts = pipeopnd->_more_instrs;
0N/A if ((maxWriteStage+maxMoreInstrs) < (stagenum+moreinsts)) {
0N/A maxWriteStage = stagenum;
0N/A maxMoreInstrs = moreinsts;
0N/A }
0N/A }
0N/A }
0N/A
0N/A if (i++ > 0 || (pipeopnd && !pipeopnd->isWrite()))
0N/A paramcount++;
0N/A }
0N/A
0N/A // Create the list of stages for the operands that are read
0N/A // Note that we will build a NameList to reduce the number of copies
0N/A
0N/A int pipeline_reads_index = pipeline_reads_initializer(fp_cpp, pipeline_reads, pipeclass);
0N/A
0N/A int pipeline_res_stages_index = pipeline_res_stages_initializer(
0N/A fp_cpp, _pipeline, pipeline_res_stages, pipeclass);
0N/A
0N/A int pipeline_res_cycles_index = pipeline_res_cycles_initializer(
0N/A fp_cpp, _pipeline, pipeline_res_cycles, pipeclass);
0N/A
0N/A int pipeline_res_mask_index = pipeline_res_mask_initializer(
0N/A fp_cpp, _pipeline, pipeline_res_masks, pipeline_res_args, pipeclass);
0N/A
0N/A#if 0
0N/A // Process the Resources
0N/A const PipeClassResourceForm *piperesource;
0N/A
0N/A unsigned resources_used = 0;
0N/A unsigned exclusive_resources_used = 0;
0N/A unsigned resource_groups = 0;
0N/A for (pipeclass->_resUsage.reset();
0N/A (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) {
0N/A int used_mask = _pipeline->_resdict[piperesource->_resource]->is_resource()->mask();
0N/A if (used_mask)
0N/A resource_groups++;
0N/A resources_used |= used_mask;
0N/A if ((used_mask & (used_mask-1)) == 0)
0N/A exclusive_resources_used |= used_mask;
0N/A }
0N/A
0N/A if (resource_groups > 0) {
0N/A fprintf(fp_cpp, "static const uint pipeline_res_or_masks_%03d[%d] = {",
0N/A pipeclass->_num, resource_groups);
0N/A for (pipeclass->_resUsage.reset(), i = 1;
0N/A (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL;
0N/A i++ ) {
0N/A int used_mask = _pipeline->_resdict[piperesource->_resource]->is_resource()->mask();
0N/A if (used_mask) {
0N/A fprintf(fp_cpp, " 0x%0*x%c", resource_count, used_mask, i < (int)resource_groups ? ',' : ' ');
0N/A }
0N/A }
0N/A fprintf(fp_cpp, "};\n\n");
0N/A }
0N/A#endif
0N/A
0N/A // Create the pipeline class description
0N/A fprintf(fp_cpp, "static const Pipeline pipeline_class_%03d(",
0N/A pipeclass->_num);
0N/A if (maxWriteStage < 0)
0N/A fprintf(fp_cpp, "(uint)stage_undefined");
0N/A else if (maxMoreInstrs == 0)
0N/A fprintf(fp_cpp, "(uint)stage_%s", _pipeline->_stages.name(maxWriteStage));
0N/A else
0N/A fprintf(fp_cpp, "((uint)stage_%s)+%d", _pipeline->_stages.name(maxWriteStage), maxMoreInstrs);
0N/A fprintf(fp_cpp, ", %d, %s, %d, %d, %s, %s, %s, %s,\n",
0N/A paramcount,
0N/A pipeclass->hasFixedLatency() ? "true" : "false",
0N/A pipeclass->fixedLatency(),
0N/A pipeclass->InstructionCount(),
0N/A pipeclass->hasBranchDelay() ? "true" : "false",
0N/A pipeclass->hasMultipleBundles() ? "true" : "false",
0N/A pipeclass->forceSerialization() ? "true" : "false",
0N/A pipeclass->mayHaveNoCode() ? "true" : "false" );
0N/A if (paramcount > 0) {
0N/A fprintf(fp_cpp, "\n (enum machPipelineStages * const) pipeline_reads_%03d,\n ",
0N/A pipeline_reads_index+1);
0N/A }
0N/A else
0N/A fprintf(fp_cpp, " NULL,");
0N/A fprintf(fp_cpp, " (enum machPipelineStages * const) pipeline_res_stages_%03d,\n",
0N/A pipeline_res_stages_index+1);
0N/A fprintf(fp_cpp, " (uint * const) pipeline_res_cycles_%03d,\n",
0N/A pipeline_res_cycles_index+1);
0N/A fprintf(fp_cpp, " Pipeline_Use(%s, (Pipeline_Use_Element *)",
0N/A pipeline_res_args.name(pipeline_res_mask_index));
0N/A if (strlen(pipeline_res_masks.name(pipeline_res_mask_index)) > 0)
0N/A fprintf(fp_cpp, "&pipeline_res_mask_%03d[0]",
0N/A pipeline_res_mask_index+1);
0N/A else
0N/A fprintf(fp_cpp, "NULL");
0N/A fprintf(fp_cpp, "));\n");
0N/A }
0N/A
0N/A // Generate the Node::latency method if _pipeline defined
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "//------------------Inter-Instruction Latency--------------------------------\n");
0N/A fprintf(fp_cpp, "uint Node::latency(uint i) {\n");
0N/A if (_pipeline) {
0N/A#if 0
0N/A fprintf(fp_cpp, "#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, " if (TraceOptoOutput) {\n");
0N/A fprintf(fp_cpp, " tty->print(\"# %%4d->latency(%%d)\\n\", _idx, i);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "#endif\n");
0N/A#endif
0N/A fprintf(fp_cpp, " uint j;\n");
0N/A fprintf(fp_cpp, " // verify in legal range for inputs\n");
0N/A fprintf(fp_cpp, " assert(i < len(), \"index not in range\");\n\n");
0N/A fprintf(fp_cpp, " // verify input is not null\n");
0N/A fprintf(fp_cpp, " Node *pred = in(i);\n");
0N/A fprintf(fp_cpp, " if (!pred)\n return %d;\n\n",
0N/A non_operand_latency);
0N/A fprintf(fp_cpp, " if (pred->is_Proj())\n pred = pred->in(0);\n\n");
0N/A fprintf(fp_cpp, " // if either node does not have pipeline info, use default\n");
0N/A fprintf(fp_cpp, " const Pipeline *predpipe = pred->pipeline();\n");
0N/A fprintf(fp_cpp, " assert(predpipe, \"no predecessor pipeline info\");\n\n");
0N/A fprintf(fp_cpp, " if (predpipe->hasFixedLatency())\n return predpipe->fixedLatency();\n\n");
0N/A fprintf(fp_cpp, " const Pipeline *currpipe = pipeline();\n");
0N/A fprintf(fp_cpp, " assert(currpipe, \"no pipeline info\");\n\n");
0N/A fprintf(fp_cpp, " if (!is_Mach())\n return %d;\n\n",
0N/A node_latency);
0N/A fprintf(fp_cpp, " const MachNode *m = as_Mach();\n");
0N/A fprintf(fp_cpp, " j = m->oper_input_base();\n");
0N/A fprintf(fp_cpp, " if (i < j)\n return currpipe->functional_unit_latency(%d, predpipe);\n\n",
0N/A non_operand_latency);
0N/A fprintf(fp_cpp, " // determine which operand this is in\n");
0N/A fprintf(fp_cpp, " uint n = m->num_opnds();\n");
0N/A fprintf(fp_cpp, " int delta = %d;\n\n",
0N/A non_operand_latency);
0N/A fprintf(fp_cpp, " uint k;\n");
0N/A fprintf(fp_cpp, " for (k = 1; k < n; k++) {\n");
0N/A fprintf(fp_cpp, " j += m->_opnds[k]->num_edges();\n");
0N/A fprintf(fp_cpp, " if (i < j)\n");
0N/A fprintf(fp_cpp, " break;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, " if (k < n)\n");
0N/A fprintf(fp_cpp, " delta = currpipe->operand_latency(k,predpipe);\n\n");
0N/A fprintf(fp_cpp, " return currpipe->functional_unit_latency(delta, predpipe);\n");
0N/A }
0N/A else {
0N/A fprintf(fp_cpp, " // assert(false, \"pipeline functionality is not defined\");\n");
0N/A fprintf(fp_cpp, " return %d;\n",
0N/A non_operand_latency);
0N/A }
0N/A fprintf(fp_cpp, "}\n\n");
0N/A
0N/A // Output the list of nop nodes
0N/A fprintf(fp_cpp, "// Descriptions for emitting different functional unit nops\n");
0N/A const char *nop;
0N/A int nopcnt = 0;
0N/A for ( _pipeline->_noplist.reset(); (nop = _pipeline->_noplist.iter()) != NULL; nopcnt++ );
0N/A
0N/A fprintf(fp_cpp, "void Bundle::initialize_nops(MachNode * nop_list[%d], Compile *C) {\n", nopcnt);
0N/A int i = 0;
0N/A for ( _pipeline->_noplist.reset(); (nop = _pipeline->_noplist.iter()) != NULL; i++ ) {
0N/A fprintf(fp_cpp, " nop_list[%d] = (MachNode *) new (C) %sNode();\n", i, nop);
0N/A }
0N/A fprintf(fp_cpp, "};\n\n");
0N/A fprintf(fp_cpp, "#ifndef PRODUCT\n");
4033N/A fprintf(fp_cpp, "void Bundle::dump(outputStream *st) const {\n");
0N/A fprintf(fp_cpp, " static const char * bundle_flags[] = {\n");
0N/A fprintf(fp_cpp, " \"\",\n");
0N/A fprintf(fp_cpp, " \"use nop delay\",\n");
0N/A fprintf(fp_cpp, " \"use unconditional delay\",\n");
0N/A fprintf(fp_cpp, " \"use conditional delay\",\n");
0N/A fprintf(fp_cpp, " \"used in conditional delay\",\n");
0N/A fprintf(fp_cpp, " \"used in unconditional delay\",\n");
0N/A fprintf(fp_cpp, " \"used in all conditional delays\",\n");
0N/A fprintf(fp_cpp, " };\n\n");
0N/A
0N/A fprintf(fp_cpp, " static const char *resource_names[%d] = {", _pipeline->_rescount);
0N/A for (i = 0; i < _pipeline->_rescount; i++)
0N/A fprintf(fp_cpp, " \"%s\"%c", _pipeline->_reslist.name(i), i < _pipeline->_rescount-1 ? ',' : ' ');
0N/A fprintf(fp_cpp, "};\n\n");
0N/A
0N/A // See if the same string is in the table
0N/A fprintf(fp_cpp, " bool needs_comma = false;\n\n");
0N/A fprintf(fp_cpp, " if (_flags) {\n");
4033N/A fprintf(fp_cpp, " st->print(\"%%s\", bundle_flags[_flags]);\n");
0N/A fprintf(fp_cpp, " needs_comma = true;\n");
0N/A fprintf(fp_cpp, " };\n");
0N/A fprintf(fp_cpp, " if (instr_count()) {\n");
4033N/A fprintf(fp_cpp, " st->print(\"%%s%%d instr%%s\", needs_comma ? \", \" : \"\", instr_count(), instr_count() != 1 ? \"s\" : \"\");\n");
0N/A fprintf(fp_cpp, " needs_comma = true;\n");
0N/A fprintf(fp_cpp, " };\n");
0N/A fprintf(fp_cpp, " uint r = resources_used();\n");
0N/A fprintf(fp_cpp, " if (r) {\n");
4033N/A fprintf(fp_cpp, " st->print(\"%%sresource%%s:\", needs_comma ? \", \" : \"\", (r & (r-1)) != 0 ? \"s\" : \"\");\n");
0N/A fprintf(fp_cpp, " for (uint i = 0; i < %d; i++)\n", _pipeline->_rescount);
0N/A fprintf(fp_cpp, " if ((r & (1 << i)) != 0)\n");
4033N/A fprintf(fp_cpp, " st->print(\" %%s\", resource_names[i]);\n");
0N/A fprintf(fp_cpp, " needs_comma = true;\n");
0N/A fprintf(fp_cpp, " };\n");
4033N/A fprintf(fp_cpp, " st->print(\"\\n\");\n");
0N/A fprintf(fp_cpp, "}\n");
0N/A fprintf(fp_cpp, "#endif\n");
0N/A}
0N/A
0N/A// ---------------------------------------------------------------------------
0N/A//------------------------------Utilities to build Instruction Classes--------
0N/A// ---------------------------------------------------------------------------
0N/A
0N/Astatic void defineOut_RegMask(FILE *fp, const char *node, const char *regMask) {
0N/A fprintf(fp,"const RegMask &%sNode::out_RegMask() const { return (%s); }\n",
0N/A node, regMask);
0N/A}
0N/A
603N/Astatic void print_block_index(FILE *fp, int inst_position) {
0N/A assert( inst_position >= 0, "Instruction number less than zero");
0N/A fprintf(fp, "block_index");
0N/A if( inst_position != 0 ) {
603N/A fprintf(fp, " - %d", inst_position);
0N/A }
0N/A}
0N/A
0N/A// Scan the peepmatch and output a test for each instruction
0N/Astatic void check_peepmatch_instruction_sequence(FILE *fp, PeepMatch *pmatch, PeepConstraint *pconstraint) {
603N/A int parent = -1;
603N/A int inst_position = 0;
603N/A const char* inst_name = NULL;
603N/A int input = 0;
0N/A fprintf(fp, " // Check instruction sub-tree\n");
0N/A pmatch->reset();
0N/A for( pmatch->next_instruction( parent, inst_position, inst_name, input );
0N/A inst_name != NULL;
0N/A pmatch->next_instruction( parent, inst_position, inst_name, input ) ) {
0N/A // If this is not a placeholder
0N/A if( ! pmatch->is_placeholder() ) {
0N/A // Define temporaries 'inst#', based on parent and parent's input index
0N/A if( parent != -1 ) { // root was initialized
0N/A fprintf(fp, " // Identify previous instruction if inside this block\n");
0N/A fprintf(fp, " if( ");
0N/A print_block_index(fp, inst_position);
0N/A fprintf(fp, " > 0 ) {\n Node *n = block->_nodes.at(");
0N/A print_block_index(fp, inst_position);
603N/A fprintf(fp, ");\n inst%d = (n->is_Mach()) ? ", inst_position);
0N/A fprintf(fp, "n->as_Mach() : NULL;\n }\n");
0N/A }
0N/A
0N/A // When not the root
0N/A // Test we have the correct instruction by comparing the rule.
0N/A if( parent != -1 ) {
603N/A fprintf(fp, " matches = matches && (inst%d != NULL) && (inst%d->rule() == %s_rule);\n",
0N/A inst_position, inst_position, inst_name);
0N/A }
0N/A } else {
0N/A // Check that user did not try to constrain a placeholder
0N/A assert( ! pconstraint->constrains_instruction(inst_position),
0N/A "fatal(): Can not constrain a placeholder instruction");
0N/A }
0N/A }
0N/A}
0N/A
0N/A// Build mapping for register indices, num_edges to input
0N/Astatic void build_instruction_index_mapping( FILE *fp, FormDict &globals, PeepMatch *pmatch ) {
603N/A int parent = -1;
603N/A int inst_position = 0;
603N/A const char* inst_name = NULL;
603N/A int input = 0;
0N/A fprintf(fp, " // Build map to register info\n");
0N/A pmatch->reset();
0N/A for( pmatch->next_instruction( parent, inst_position, inst_name, input );
0N/A inst_name != NULL;
0N/A pmatch->next_instruction( parent, inst_position, inst_name, input ) ) {
0N/A // If this is not a placeholder
0N/A if( ! pmatch->is_placeholder() ) {
0N/A // Define temporaries 'inst#', based on self's inst_position
0N/A InstructForm *inst = globals[inst_name]->is_instruction();
0N/A if( inst != NULL ) {
0N/A char inst_prefix[] = "instXXXX_";
603N/A sprintf(inst_prefix, "inst%d_", inst_position);
0N/A char receiver[] = "instXXXX->";
603N/A sprintf(receiver, "inst%d->", inst_position);
0N/A inst->index_temps( fp, globals, inst_prefix, receiver );
0N/A }
0N/A }
0N/A }
0N/A}
0N/A
0N/A// Generate tests for the constraints
0N/Astatic void check_peepconstraints(FILE *fp, FormDict &globals, PeepMatch *pmatch, PeepConstraint *pconstraint) {
0N/A fprintf(fp, "\n");
0N/A fprintf(fp, " // Check constraints on sub-tree-leaves\n");
0N/A
0N/A // Build mapping from num_edges to local variables
0N/A build_instruction_index_mapping( fp, globals, pmatch );
0N/A
0N/A // Build constraint tests
0N/A if( pconstraint != NULL ) {
0N/A fprintf(fp, " matches = matches &&");
0N/A bool first_constraint = true;
0N/A while( pconstraint != NULL ) {
0N/A // indentation and connecting '&&'
0N/A const char *indentation = " ";
0N/A fprintf(fp, "\n%s%s", indentation, (!first_constraint ? "&& " : " "));
0N/A
0N/A // Only have '==' relation implemented
0N/A if( strcmp(pconstraint->_relation,"==") != 0 ) {
0N/A assert( false, "Unimplemented()" );
0N/A }
0N/A
0N/A // LEFT
603N/A int left_index = pconstraint->_left_inst;
0N/A const char *left_op = pconstraint->_left_op;
0N/A // Access info on the instructions whose operands are compared
0N/A InstructForm *inst_left = globals[pmatch->instruction_name(left_index)]->is_instruction();
0N/A assert( inst_left, "Parser should guaranty this is an instruction");
0N/A int left_op_base = inst_left->oper_input_base(globals);
0N/A // Access info on the operands being compared
0N/A int left_op_index = inst_left->operand_position(left_op, Component::USE);
0N/A if( left_op_index == -1 ) {
0N/A left_op_index = inst_left->operand_position(left_op, Component::DEF);
0N/A if( left_op_index == -1 ) {
0N/A left_op_index = inst_left->operand_position(left_op, Component::USE_DEF);
0N/A }
0N/A }
0N/A assert( left_op_index != NameList::Not_in_list, "Did not find operand in instruction");
0N/A ComponentList components_left = inst_left->_components;
0N/A const char *left_comp_type = components_left.at(left_op_index)->_type;
0N/A OpClassForm *left_opclass = globals[left_comp_type]->is_opclass();
0N/A Form::InterfaceType left_interface_type = left_opclass->interface_type(globals);
0N/A
0N/A
0N/A // RIGHT
0N/A int right_op_index = -1;
603N/A int right_index = pconstraint->_right_inst;
0N/A const char *right_op = pconstraint->_right_op;
0N/A if( right_index != -1 ) { // Match operand
0N/A // Access info on the instructions whose operands are compared
0N/A InstructForm *inst_right = globals[pmatch->instruction_name(right_index)]->is_instruction();
0N/A assert( inst_right, "Parser should guaranty this is an instruction");
0N/A int right_op_base = inst_right->oper_input_base(globals);
0N/A // Access info on the operands being compared
0N/A right_op_index = inst_right->operand_position(right_op, Component::USE);
0N/A if( right_op_index == -1 ) {
0N/A right_op_index = inst_right->operand_position(right_op, Component::DEF);
0N/A if( right_op_index == -1 ) {
0N/A right_op_index = inst_right->operand_position(right_op, Component::USE_DEF);
0N/A }
0N/A }
0N/A assert( right_op_index != NameList::Not_in_list, "Did not find operand in instruction");
0N/A ComponentList components_right = inst_right->_components;
0N/A const char *right_comp_type = components_right.at(right_op_index)->_type;
0N/A OpClassForm *right_opclass = globals[right_comp_type]->is_opclass();
0N/A Form::InterfaceType right_interface_type = right_opclass->interface_type(globals);
0N/A assert( right_interface_type == left_interface_type, "Both must be same interface");
0N/A
0N/A } else { // Else match register
0N/A // assert( false, "should be a register" );
0N/A }
0N/A
0N/A //
0N/A // Check for equivalence
0N/A //
0N/A // fprintf(fp, "phase->eqv( ");
0N/A // fprintf(fp, "inst%d->in(%d+%d) /* %s */, inst%d->in(%d+%d) /* %s */",
0N/A // left_index, left_op_base, left_op_index, left_op,
0N/A // right_index, right_op_base, right_op_index, right_op );
0N/A // fprintf(fp, ")");
0N/A //
0N/A switch( left_interface_type ) {
0N/A case Form::register_interface: {
0N/A // Check that they are allocated to the same register
0N/A // Need parameter for index position if not result operand
0N/A char left_reg_index[] = ",instXXXX_idxXXXX";
0N/A if( left_op_index != 0 ) {
0N/A assert( (left_index <= 9999) && (left_op_index <= 9999), "exceed string size");
0N/A // Must have index into operands
4033N/A sprintf(left_reg_index,",inst%d_idx%d", (int)left_index, left_op_index);
0N/A } else {
0N/A strcpy(left_reg_index, "");
0N/A }
0N/A fprintf(fp, "(inst%d->_opnds[%d]->reg(ra_,inst%d%s) /* %d.%s */",
0N/A left_index, left_op_index, left_index, left_reg_index, left_index, left_op );
0N/A fprintf(fp, " == ");
0N/A
0N/A if( right_index != -1 ) {
0N/A char right_reg_index[18] = ",instXXXX_idxXXXX";
0N/A if( right_op_index != 0 ) {
0N/A assert( (right_index <= 9999) && (right_op_index <= 9999), "exceed string size");
0N/A // Must have index into operands
4033N/A sprintf(right_reg_index,",inst%d_idx%d", (int)right_index, right_op_index);
0N/A } else {
0N/A strcpy(right_reg_index, "");
0N/A }
0N/A fprintf(fp, "/* %d.%s */ inst%d->_opnds[%d]->reg(ra_,inst%d%s)",
0N/A right_index, right_op, right_index, right_op_index, right_index, right_reg_index );
0N/A } else {
0N/A fprintf(fp, "%s_enc", right_op );
0N/A }
0N/A fprintf(fp,")");
0N/A break;
0N/A }
0N/A case Form::constant_interface: {
0N/A // Compare the '->constant()' values
0N/A fprintf(fp, "(inst%d->_opnds[%d]->constant() /* %d.%s */",
0N/A left_index, left_op_index, left_index, left_op );
0N/A fprintf(fp, " == ");
0N/A fprintf(fp, "/* %d.%s */ inst%d->_opnds[%d]->constant())",
0N/A right_index, right_op, right_index, right_op_index );
0N/A break;
0N/A }
0N/A case Form::memory_interface: {
0N/A // Compare 'base', 'index', 'scale', and 'disp'
0N/A // base
0N/A fprintf(fp, "( \n");
0N/A fprintf(fp, " (inst%d->_opnds[%d]->base(ra_,inst%d,inst%d_idx%d) /* %d.%s$$base */",
0N/A left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op );
0N/A fprintf(fp, " == ");
0N/A fprintf(fp, "/* %d.%s$$base */ inst%d->_opnds[%d]->base(ra_,inst%d,inst%d_idx%d)) &&\n",
0N/A right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index );
0N/A // index
0N/A fprintf(fp, " (inst%d->_opnds[%d]->index(ra_,inst%d,inst%d_idx%d) /* %d.%s$$index */",
0N/A left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op );
0N/A fprintf(fp, " == ");
0N/A fprintf(fp, "/* %d.%s$$index */ inst%d->_opnds[%d]->index(ra_,inst%d,inst%d_idx%d)) &&\n",
0N/A right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index );
0N/A // scale
0N/A fprintf(fp, " (inst%d->_opnds[%d]->scale() /* %d.%s$$scale */",
0N/A left_index, left_op_index, left_index, left_op );
0N/A fprintf(fp, " == ");
0N/A fprintf(fp, "/* %d.%s$$scale */ inst%d->_opnds[%d]->scale()) &&\n",
0N/A right_index, right_op, right_index, right_op_index );
0N/A // disp
0N/A fprintf(fp, " (inst%d->_opnds[%d]->disp(ra_,inst%d,inst%d_idx%d) /* %d.%s$$disp */",
0N/A left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op );
0N/A fprintf(fp, " == ");
0N/A fprintf(fp, "/* %d.%s$$disp */ inst%d->_opnds[%d]->disp(ra_,inst%d,inst%d_idx%d))\n",
0N/A right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index );
0N/A fprintf(fp, ") \n");
0N/A break;
0N/A }
0N/A case Form::conditional_interface: {
0N/A // Compare the condition code being tested
0N/A assert( false, "Unimplemented()" );
0N/A break;
0N/A }
0N/A default: {
0N/A assert( false, "ShouldNotReachHere()" );
0N/A break;
0N/A }
0N/A }
0N/A
0N/A // Advance to next constraint
0N/A pconstraint = pconstraint->next();
0N/A first_constraint = false;
0N/A }
0N/A
0N/A fprintf(fp, ";\n");
0N/A }
0N/A}
0N/A
0N/A// // EXPERIMENTAL -- TEMPORARY code
0N/A// static Form::DataType get_operand_type(FormDict &globals, InstructForm *instr, const char *op_name ) {
0N/A// int op_index = instr->operand_position(op_name, Component::USE);
0N/A// if( op_index == -1 ) {
0N/A// op_index = instr->operand_position(op_name, Component::DEF);
0N/A// if( op_index == -1 ) {
0N/A// op_index = instr->operand_position(op_name, Component::USE_DEF);
0N/A// }
0N/A// }
0N/A// assert( op_index != NameList::Not_in_list, "Did not find operand in instruction");
0N/A//
0N/A// ComponentList components_right = instr->_components;
0N/A// char *right_comp_type = components_right.at(op_index)->_type;
0N/A// OpClassForm *right_opclass = globals[right_comp_type]->is_opclass();
0N/A// Form::InterfaceType right_interface_type = right_opclass->interface_type(globals);
0N/A//
0N/A// return;
0N/A// }
0N/A
0N/A// Construct the new sub-tree
0N/Astatic void generate_peepreplace( FILE *fp, FormDict &globals, PeepMatch *pmatch, PeepConstraint *pconstraint, PeepReplace *preplace, int max_position ) {
0N/A fprintf(fp, " // IF instructions and constraints matched\n");
0N/A fprintf(fp, " if( matches ) {\n");
0N/A fprintf(fp, " // generate the new sub-tree\n");
0N/A fprintf(fp, " assert( true, \"Debug stopping point\");\n");
0N/A if( preplace != NULL ) {
0N/A // Get the root of the new sub-tree
0N/A const char *root_inst = NULL;
0N/A preplace->next_instruction(root_inst);
0N/A InstructForm *root_form = globals[root_inst]->is_instruction();
0N/A assert( root_form != NULL, "Replacement instruction was not previously defined");
0N/A fprintf(fp, " %sNode *root = new (C) %sNode();\n", root_inst, root_inst);
0N/A
603N/A int inst_num;
0N/A const char *op_name;
0N/A int opnds_index = 0; // define result operand
0N/A // Then install the use-operands for the new sub-tree
0N/A // preplace->reset(); // reset breaks iteration
0N/A for( preplace->next_operand( inst_num, op_name );
0N/A op_name != NULL;
0N/A preplace->next_operand( inst_num, op_name ) ) {
0N/A InstructForm *inst_form;
0N/A inst_form = globals[pmatch->instruction_name(inst_num)]->is_instruction();
0N/A assert( inst_form, "Parser should guaranty this is an instruction");
0N/A int inst_op_num = inst_form->operand_position(op_name, Component::USE);
0N/A if( inst_op_num == NameList::Not_in_list )
0N/A inst_op_num = inst_form->operand_position(op_name, Component::USE_DEF);
0N/A assert( inst_op_num != NameList::Not_in_list, "Did not find operand as USE");
0N/A // find the name of the OperandForm from the local name
0N/A const Form *form = inst_form->_localNames[op_name];
0N/A OperandForm *op_form = form->is_operand();
0N/A if( opnds_index == 0 ) {
0N/A // Initial setup of new instruction
0N/A fprintf(fp, " // ----- Initial setup -----\n");
0N/A //
0N/A // Add control edge for this node
0N/A fprintf(fp, " root->add_req(_in[0]); // control edge\n");
0N/A // Add unmatched edges from root of match tree
0N/A int op_base = root_form->oper_input_base(globals);
0N/A for( int unmatched_edge = 1; unmatched_edge < op_base; ++unmatched_edge ) {
603N/A fprintf(fp, " root->add_req(inst%d->in(%d)); // unmatched ideal edge\n",
0N/A inst_num, unmatched_edge);
0N/A }
0N/A // If new instruction captures bottom type
1461N/A if( root_form->captures_bottom_type(globals) ) {
0N/A // Get bottom type from instruction whose result we are replacing
603N/A fprintf(fp, " root->_bottom_type = inst%d->bottom_type();\n", inst_num);
0N/A }
0N/A // Define result register and result operand
603N/A fprintf(fp, " ra_->add_reference(root, inst%d);\n", inst_num);
603N/A fprintf(fp, " ra_->set_oop (root, ra_->is_oop(inst%d));\n", inst_num);
603N/A fprintf(fp, " ra_->set_pair(root->_idx, ra_->get_reg_second(inst%d), ra_->get_reg_first(inst%d));\n", inst_num, inst_num);
603N/A fprintf(fp, " root->_opnds[0] = inst%d->_opnds[0]->clone(C); // result\n", inst_num);
0N/A fprintf(fp, " // ----- Done with initial setup -----\n");
0N/A } else {
0N/A if( (op_form == NULL) || (op_form->is_base_constant(globals) == Form::none) ) {
0N/A // Do not have ideal edges for constants after matching
603N/A fprintf(fp, " for( unsigned x%d = inst%d_idx%d; x%d < inst%d_idx%d; x%d++ )\n",
0N/A inst_op_num, inst_num, inst_op_num,
0N/A inst_op_num, inst_num, inst_op_num+1, inst_op_num );
603N/A fprintf(fp, " root->add_req( inst%d->in(x%d) );\n",
0N/A inst_num, inst_op_num );
0N/A } else {
0N/A fprintf(fp, " // no ideal edge for constants after matching\n");
0N/A }
603N/A fprintf(fp, " root->_opnds[%d] = inst%d->_opnds[%d]->clone(C);\n",
0N/A opnds_index, inst_num, inst_op_num );
0N/A }
0N/A ++opnds_index;
0N/A }
0N/A }else {
0N/A // Replacing subtree with empty-tree
0N/A assert( false, "ShouldNotReachHere();");
0N/A }
0N/A
0N/A // Return the new sub-tree
0N/A fprintf(fp, " deleted = %d;\n", max_position+1 /*zero to one based*/);
0N/A fprintf(fp, " return root; // return new root;\n");
0N/A fprintf(fp, " }\n");
0N/A}
0N/A
0N/A
0N/A// Define the Peephole method for an instruction node
0N/Avoid ArchDesc::definePeephole(FILE *fp, InstructForm *node) {
0N/A // Generate Peephole function header
0N/A fprintf(fp, "MachNode *%sNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {\n", node->_ident);
0N/A fprintf(fp, " bool matches = true;\n");
0N/A
0N/A // Identify the maximum instruction position,
0N/A // generate temporaries that hold current instruction
0N/A //
0N/A // MachNode *inst0 = NULL;
0N/A // ...
0N/A // MachNode *instMAX = NULL;
0N/A //
0N/A int max_position = 0;
0N/A Peephole *peep;
0N/A for( peep = node->peepholes(); peep != NULL; peep = peep->next() ) {
0N/A PeepMatch *pmatch = peep->match();
0N/A assert( pmatch != NULL, "fatal(), missing peepmatch rule");
0N/A if( max_position < pmatch->max_position() ) max_position = pmatch->max_position();
0N/A }
0N/A for( int i = 0; i <= max_position; ++i ) {
0N/A if( i == 0 ) {
603N/A fprintf(fp, " MachNode *inst0 = this;\n");
0N/A } else {
0N/A fprintf(fp, " MachNode *inst%d = NULL;\n", i);
0N/A }
0N/A }
0N/A
0N/A // For each peephole rule in architecture description
0N/A // Construct a test for the desired instruction sub-tree
0N/A // then check the constraints
0N/A // If these match, Generate the new subtree
0N/A for( peep = node->peepholes(); peep != NULL; peep = peep->next() ) {
0N/A int peephole_number = peep->peephole_number();
0N/A PeepMatch *pmatch = peep->match();
0N/A PeepConstraint *pconstraint = peep->constraints();
0N/A PeepReplace *preplace = peep->replacement();
0N/A
0N/A // Root of this peephole is the current MachNode
0N/A assert( true, // %%name?%% strcmp( node->_ident, pmatch->name(0) ) == 0,
0N/A "root of PeepMatch does not match instruction");
0N/A
0N/A // Make each peephole rule individually selectable
0N/A fprintf(fp, " if( (OptoPeepholeAt == -1) || (OptoPeepholeAt==%d) ) {\n", peephole_number);
0N/A fprintf(fp, " matches = true;\n");
0N/A // Scan the peepmatch and output a test for each instruction
0N/A check_peepmatch_instruction_sequence( fp, pmatch, pconstraint );
0N/A
0N/A // Check constraints and build replacement inside scope
0N/A fprintf(fp, " // If instruction subtree matches\n");
0N/A fprintf(fp, " if( matches ) {\n");
0N/A
0N/A // Generate tests for the constraints
0N/A check_peepconstraints( fp, _globalNames, pmatch, pconstraint );
0N/A
0N/A // Construct the new sub-tree
0N/A generate_peepreplace( fp, _globalNames, pmatch, pconstraint, preplace, max_position );
0N/A
0N/A // End of scope for this peephole's constraints
0N/A fprintf(fp, " }\n");
0N/A // Closing brace '}' to make each peephole rule individually selectable
0N/A fprintf(fp, " } // end of peephole rule #%d\n", peephole_number);
0N/A fprintf(fp, "\n");
0N/A }
0N/A
0N/A fprintf(fp, " return NULL; // No peephole rules matched\n");
0N/A fprintf(fp, "}\n");
0N/A fprintf(fp, "\n");
0N/A}
0N/A
0N/A// Define the Expand method for an instruction node
0N/Avoid ArchDesc::defineExpand(FILE *fp, InstructForm *node) {
0N/A unsigned cnt = 0; // Count nodes we have expand into
0N/A unsigned i;
0N/A
0N/A // Generate Expand function header
1915N/A fprintf(fp, "MachNode* %sNode::Expand(State* state, Node_List& proj_list, Node* mem) {\n", node->_ident);
1915N/A fprintf(fp, " Compile* C = Compile::current();\n");
0N/A // Generate expand code
0N/A if( node->expands() ) {
0N/A const char *opid;
0N/A int new_pos, exp_pos;
0N/A const char *new_id = NULL;
0N/A const Form *frm = NULL;
0N/A InstructForm *new_inst = NULL;
0N/A OperandForm *new_oper = NULL;
0N/A unsigned numo = node->num_opnds() +
0N/A node->_exprule->_newopers.count();
0N/A
0N/A // If necessary, generate any operands created in expand rule
0N/A if (node->_exprule->_newopers.count()) {
0N/A for(node->_exprule->_newopers.reset();
0N/A (new_id = node->_exprule->_newopers.iter()) != NULL; cnt++) {
0N/A frm = node->_localNames[new_id];
0N/A assert(frm, "Invalid entry in new operands list of expand rule");
0N/A new_oper = frm->is_operand();
0N/A char *tmp = (char *)node->_exprule->_newopconst[new_id];
0N/A if (tmp == NULL) {
0N/A fprintf(fp," MachOper *op%d = new (C) %sOper();\n",
0N/A cnt, new_oper->_ident);
0N/A }
0N/A else {
0N/A fprintf(fp," MachOper *op%d = new (C) %sOper(%s);\n",
0N/A cnt, new_oper->_ident, tmp);
0N/A }
0N/A }
0N/A }
0N/A cnt = 0;
0N/A // Generate the temps to use for DAG building
0N/A for(i = 0; i < numo; i++) {
0N/A if (i < node->num_opnds()) {
0N/A fprintf(fp," MachNode *tmp%d = this;\n", i);
0N/A }
0N/A else {
0N/A fprintf(fp," MachNode *tmp%d = NULL;\n", i);
0N/A }
0N/A }
0N/A // Build mapping from num_edges to local variables
0N/A fprintf(fp," unsigned num0 = 0;\n");
0N/A for( i = 1; i < node->num_opnds(); i++ ) {
0N/A fprintf(fp," unsigned num%d = opnd_array(%d)->num_edges();\n",i,i);
0N/A }
0N/A
0N/A // Build a mapping from operand index to input edges
0N/A fprintf(fp," unsigned idx0 = oper_input_base();\n");
113N/A
1203N/A // The order in which the memory input is added to a node is very
113N/A // strange. Store nodes get a memory input before Expand is
1203N/A // called and other nodes get it afterwards or before depending on
1203N/A // match order so oper_input_base is wrong during expansion. This
1203N/A // code adjusts it so that expansion will work correctly.
1203N/A int has_memory_edge = node->_matrule->needs_ideal_memory_edge(_globalNames);
1203N/A if (has_memory_edge) {
1203N/A fprintf(fp," if (mem == (Node*)1) {\n");
1203N/A fprintf(fp," idx0--; // Adjust base because memory edge hasn't been inserted yet\n");
1203N/A fprintf(fp," }\n");
113N/A }
113N/A
0N/A for( i = 0; i < node->num_opnds(); i++ ) {
0N/A fprintf(fp," unsigned idx%d = idx%d + num%d;\n",
0N/A i+1,i,i);
0N/A }
0N/A
0N/A // Declare variable to hold root of expansion
0N/A fprintf(fp," MachNode *result = NULL;\n");
0N/A
0N/A // Iterate over the instructions 'node' expands into
0N/A ExpandRule *expand = node->_exprule;
0N/A NameAndList *expand_instr = NULL;
0N/A for(expand->reset_instructions();
0N/A (expand_instr = expand->iter_instructions()) != NULL; cnt++) {
0N/A new_id = expand_instr->name();
0N/A
0N/A InstructForm* expand_instruction = (InstructForm*)globalAD->globalNames()[new_id];
0N/A if (expand_instruction->has_temps()) {
0N/A globalAD->syntax_err(node->_linenum, "In %s: expand rules using instructs with TEMPs aren't supported: %s",
0N/A node->_ident, new_id);
0N/A }
0N/A
0N/A // Build the node for the instruction
0N/A fprintf(fp,"\n %sNode *n%d = new (C) %sNode();\n", new_id, cnt, new_id);
0N/A // Add control edge for this node
0N/A fprintf(fp," n%d->add_req(_in[0]);\n", cnt);
0N/A // Build the operand for the value this node defines.
0N/A Form *form = (Form*)_globalNames[new_id];
0N/A assert( form, "'new_id' must be a defined form name");
0N/A // Grab the InstructForm for the new instruction
0N/A new_inst = form->is_instruction();
0N/A assert( new_inst, "'new_id' must be an instruction name");
0N/A if( node->is_ideal_if() && new_inst->is_ideal_if() ) {
0N/A fprintf(fp, " ((MachIfNode*)n%d)->_prob = _prob;\n",cnt);
0N/A fprintf(fp, " ((MachIfNode*)n%d)->_fcnt = _fcnt;\n",cnt);
0N/A }
0N/A
0N/A if( node->is_ideal_fastlock() && new_inst->is_ideal_fastlock() ) {
0N/A fprintf(fp, " ((MachFastLockNode*)n%d)->_counters = _counters;\n",cnt);
0N/A }
0N/A
4020N/A // Fill in the bottom_type where requested
4020N/A if (node->captures_bottom_type(_globalNames) &&
4020N/A new_inst->captures_bottom_type(_globalNames)) {
4020N/A fprintf(fp, " ((MachTypeNode*)n%d)->_bottom_type = bottom_type();\n", cnt);
4020N/A }
4020N/A
0N/A const char *resultOper = new_inst->reduce_result();
0N/A fprintf(fp," n%d->set_opnd_array(0, state->MachOperGenerator( %s, C ));\n",
0N/A cnt, machOperEnum(resultOper));
0N/A
0N/A // get the formal operand NameList
0N/A NameList *formal_lst = &new_inst->_parameters;
0N/A formal_lst->reset();
0N/A
0N/A // Handle any memory operand
0N/A int memory_operand = new_inst->memory_operand(_globalNames);
0N/A if( memory_operand != InstructForm::NO_MEMORY_OPERAND ) {
0N/A int node_mem_op = node->memory_operand(_globalNames);
0N/A assert( node_mem_op != InstructForm::NO_MEMORY_OPERAND,
0N/A "expand rule member needs memory but top-level inst doesn't have any" );
1203N/A if (has_memory_edge) {
113N/A // Copy memory edge
1203N/A fprintf(fp," if (mem != (Node*)1) {\n");
1203N/A fprintf(fp," n%d->add_req(_in[1]);\t// Add memory edge\n", cnt);
1203N/A fprintf(fp," }\n");
113N/A }
0N/A }
0N/A
0N/A // Iterate over the new instruction's operands
415N/A int prev_pos = -1;
0N/A for( expand_instr->reset(); (opid = expand_instr->iter()) != NULL; ) {
0N/A // Use 'parameter' at current position in list of new instruction's formals
0N/A // instead of 'opid' when looking up info internal to new_inst
0N/A const char *parameter = formal_lst->iter();
0N/A // Check for an operand which is created in the expand rule
0N/A if ((exp_pos = node->_exprule->_newopers.index(opid)) != -1) {
0N/A new_pos = new_inst->operand_position(parameter,Component::USE);
0N/A exp_pos += node->num_opnds();
0N/A // If there is no use of the created operand, just skip it
4033N/A if (new_pos != NameList::Not_in_list) {
0N/A //Copy the operand from the original made above
0N/A fprintf(fp," n%d->set_opnd_array(%d, op%d->clone(C)); // %s\n",
0N/A cnt, new_pos, exp_pos-node->num_opnds(), opid);
0N/A // Check for who defines this operand & add edge if needed
0N/A fprintf(fp," if(tmp%d != NULL)\n", exp_pos);
0N/A fprintf(fp," n%d->add_req(tmp%d);\n", cnt, exp_pos);
0N/A }
0N/A }
0N/A else {
0N/A // Use operand name to get an index into instruction component list
0N/A // ins = (InstructForm *) _globalNames[new_id];
0N/A exp_pos = node->operand_position_format(opid);
0N/A assert(exp_pos != -1, "Bad expand rule");
415N/A if (prev_pos > exp_pos && expand_instruction->_matrule != NULL) {
415N/A // For the add_req calls below to work correctly they need
415N/A // to added in the same order that a match would add them.
415N/A // This means that they would need to be in the order of
415N/A // the components list instead of the formal parameters.
415N/A // This is a sort of hidden invariant that previously
415N/A // wasn't checked and could lead to incorrectly
415N/A // constructed nodes.
415N/A syntax_err(node->_linenum, "For expand in %s to work, parameter declaration order in %s must follow matchrule\n",
415N/A node->_ident, new_inst->_ident);
415N/A }
415N/A prev_pos = exp_pos;
0N/A
0N/A new_pos = new_inst->operand_position(parameter,Component::USE);
0N/A if (new_pos != -1) {
0N/A // Copy the operand from the ExpandNode to the new node
0N/A fprintf(fp," n%d->set_opnd_array(%d, opnd_array(%d)->clone(C)); // %s\n",
0N/A cnt, new_pos, exp_pos, opid);
0N/A // For each operand add appropriate input edges by looking at tmp's
0N/A fprintf(fp," if(tmp%d == this) {\n", exp_pos);
0N/A // Grab corresponding edges from ExpandNode and insert them here
0N/A fprintf(fp," for(unsigned i = 0; i < num%d; i++) {\n", exp_pos);
0N/A fprintf(fp," n%d->add_req(_in[i + idx%d]);\n", cnt, exp_pos);
0N/A fprintf(fp," }\n");
0N/A fprintf(fp," }\n");
0N/A // This value is generated by one of the new instructions
0N/A fprintf(fp," else n%d->add_req(tmp%d);\n", cnt, exp_pos);
0N/A }
0N/A }
0N/A
0N/A // Update the DAG tmp's for values defined by this instruction
0N/A int new_def_pos = new_inst->operand_position(parameter,Component::DEF);
0N/A Effect *eform = (Effect *)new_inst->_effects[parameter];
0N/A // If this operand is a definition in either an effects rule
0N/A // or a match rule
0N/A if((eform) && (is_def(eform->_use_def))) {
0N/A // Update the temp associated with this operand
0N/A fprintf(fp," tmp%d = n%d;\n", exp_pos, cnt);
0N/A }
0N/A else if( new_def_pos != -1 ) {
0N/A // Instruction defines a value but user did not declare it
0N/A // in the 'effect' clause
0N/A fprintf(fp," tmp%d = n%d;\n", exp_pos, cnt);
0N/A }
0N/A } // done iterating over a new instruction's operands
0N/A
0N/A // Invoke Expand() for the newly created instruction.
1203N/A fprintf(fp," result = n%d->Expand( state, proj_list, mem );\n", cnt);
0N/A assert( !new_inst->expands(), "Do not have complete support for recursive expansion");
0N/A } // done iterating over new instructions
0N/A fprintf(fp,"\n");
0N/A } // done generating expand rule
0N/A
2126N/A // Generate projections for instruction's additional DEFs and KILLs
2126N/A if( ! node->expands() && (node->needs_projections() || node->has_temps())) {
2126N/A // Get string representing the MachNode that projections point at
2126N/A const char *machNode = "this";
2126N/A // Generate the projections
2126N/A fprintf(fp," // Add projection edges for additional defs or kills\n");
2126N/A
2126N/A // Examine each component to see if it is a DEF or KILL
2126N/A node->_components.reset();
2126N/A // Skip the first component, if already handled as (SET dst (...))
2126N/A Component *comp = NULL;
2126N/A // For kills, the choice of projection numbers is arbitrary
2126N/A int proj_no = 1;
2126N/A bool declared_def = false;
2126N/A bool declared_kill = false;
2126N/A
2126N/A while( (comp = node->_components.iter()) != NULL ) {
2126N/A // Lookup register class associated with operand type
2126N/A Form *form = (Form*)_globalNames[comp->_type];
2126N/A assert( form, "component type must be a defined form");
2126N/A OperandForm *op = form->is_operand();
2126N/A
2126N/A if (comp->is(Component::TEMP)) {
2126N/A fprintf(fp, " // TEMP %s\n", comp->_name);
2126N/A if (!declared_def) {
2126N/A // Define the variable "def" to hold new MachProjNodes
2126N/A fprintf(fp, " MachTempNode *def;\n");
2126N/A declared_def = true;
2126N/A }
2126N/A if (op && op->_interface && op->_interface->is_RegInterface()) {
2126N/A fprintf(fp," def = new (C) MachTempNode(state->MachOperGenerator( %s, C ));\n",
2126N/A machOperEnum(op->_ident));
2126N/A fprintf(fp," add_req(def);\n");
2126N/A // The operand for TEMP is already constructed during
2126N/A // this mach node construction, see buildMachNode().
2126N/A //
2126N/A // int idx = node->operand_position_format(comp->_name);
2126N/A // fprintf(fp," set_opnd_array(%d, state->MachOperGenerator( %s, C ));\n",
2126N/A // idx, machOperEnum(op->_ident));
2126N/A } else {
2126N/A assert(false, "can't have temps which aren't registers");
2126N/A }
2126N/A } else if (comp->isa(Component::KILL)) {
2126N/A fprintf(fp, " // DEF/KILL %s\n", comp->_name);
2126N/A
2126N/A if (!declared_kill) {
2126N/A // Define the variable "kill" to hold new MachProjNodes
2126N/A fprintf(fp, " MachProjNode *kill;\n");
2126N/A declared_kill = true;
2126N/A }
2126N/A
2126N/A assert( op, "Support additional KILLS for base operands");
2126N/A const char *regmask = reg_mask(*op);
2126N/A const char *ideal_type = op->ideal_type(_globalNames, _register);
2126N/A
2126N/A if (!op->is_bound_register()) {
2126N/A syntax_err(node->_linenum, "In %s only bound registers can be killed: %s %s\n",
2126N/A node->_ident, comp->_type, comp->_name);
2126N/A }
2126N/A
2126N/A fprintf(fp," kill = ");
4022N/A fprintf(fp,"new (C) MachProjNode( %s, %d, (%s), Op_%s );\n",
2126N/A machNode, proj_no++, regmask, ideal_type);
2126N/A fprintf(fp," proj_list.push(kill);\n");
2126N/A }
2126N/A }
2126N/A }
2126N/A
2126N/A if( !node->expands() && node->_matrule != NULL ) {
0N/A // Remove duplicated operands and inputs which use the same name.
0N/A // Seach through match operands for the same name usage.
0N/A uint cur_num_opnds = node->num_opnds();
0N/A if( cur_num_opnds > 1 && cur_num_opnds != node->num_unique_opnds() ) {
0N/A Component *comp = NULL;
0N/A // Build mapping from num_edges to local variables
0N/A fprintf(fp," unsigned num0 = 0;\n");
0N/A for( i = 1; i < cur_num_opnds; i++ ) {
4033N/A fprintf(fp," unsigned num%d = opnd_array(%d)->num_edges();",i,i);
4033N/A fprintf(fp, " \t// %s\n", node->opnd_ident(i));
0N/A }
0N/A // Build a mapping from operand index to input edges
0N/A fprintf(fp," unsigned idx0 = oper_input_base();\n");
0N/A for( i = 0; i < cur_num_opnds; i++ ) {
0N/A fprintf(fp," unsigned idx%d = idx%d + num%d;\n",
0N/A i+1,i,i);
0N/A }
0N/A
0N/A uint new_num_opnds = 1;
0N/A node->_components.reset();
0N/A // Skip first unique operands.
0N/A for( i = 1; i < cur_num_opnds; i++ ) {
0N/A comp = node->_components.iter();
0N/A if( (int)i != node->unique_opnds_idx(i) ) {
0N/A break;
0N/A }
0N/A new_num_opnds++;
0N/A }
0N/A // Replace not unique operands with next unique operands.
0N/A for( ; i < cur_num_opnds; i++ ) {
0N/A comp = node->_components.iter();
0N/A int j = node->unique_opnds_idx(i);
0N/A // unique_opnds_idx(i) is unique if unique_opnds_idx(j) is not unique.
0N/A if( j != node->unique_opnds_idx(j) ) {
0N/A fprintf(fp," set_opnd_array(%d, opnd_array(%d)->clone(C)); // %s\n",
0N/A new_num_opnds, i, comp->_name);
0N/A // delete not unique edges here
0N/A fprintf(fp," for(unsigned i = 0; i < num%d; i++) {\n", i);
0N/A fprintf(fp," set_req(i + idx%d, _in[i + idx%d]);\n", new_num_opnds, i);
0N/A fprintf(fp," }\n");
0N/A fprintf(fp," num%d = num%d;\n", new_num_opnds, i);
0N/A fprintf(fp," idx%d = idx%d + num%d;\n", new_num_opnds+1, new_num_opnds, new_num_opnds);
0N/A new_num_opnds++;
0N/A }
0N/A }
0N/A // delete the rest of edges
0N/A fprintf(fp," for(int i = idx%d - 1; i >= (int)idx%d; i--) {\n", cur_num_opnds, new_num_opnds);
603N/A fprintf(fp," del_req(i);\n");
0N/A fprintf(fp," }\n");
0N/A fprintf(fp," _num_opnds = %d;\n", new_num_opnds);
785N/A assert(new_num_opnds == node->num_unique_opnds(), "what?");
0N/A }
0N/A }
0N/A
1915N/A // If the node is a MachConstantNode, insert the MachConstantBaseNode edge.
1915N/A // NOTE: this edge must be the last input (see MachConstantNode::mach_constant_base_node_input).
1915N/A if (node->is_mach_constant()) {
1915N/A fprintf(fp," add_req(C->mach_constant_base_node());\n");
1915N/A }
1915N/A
0N/A fprintf(fp,"\n");
0N/A if( node->expands() ) {
603N/A fprintf(fp," return result;\n");
0N/A } else {
0N/A fprintf(fp," return this;\n");
0N/A }
0N/A fprintf(fp,"}\n");
0N/A fprintf(fp,"\n");
0N/A}
0N/A
0N/A
0N/A//------------------------------Emit Routines----------------------------------
0N/A// Special classes and routines for defining node emit routines which output
0N/A// target specific instruction object encodings.
0N/A// Define the ___Node::emit() routine
0N/A//
0N/A// (1) void ___Node::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
0N/A// (2) // ... encoding defined by user
0N/A// (3)
0N/A// (4) }
0N/A//
0N/A
0N/Aclass DefineEmitState {
0N/Aprivate:
0N/A enum reloc_format { RELOC_NONE = -1,
0N/A RELOC_IMMEDIATE = 0,
0N/A RELOC_DISP = 1,
0N/A RELOC_CALL_DISP = 2 };
0N/A enum literal_status{ LITERAL_NOT_SEEN = 0,
0N/A LITERAL_SEEN = 1,
0N/A LITERAL_ACCESSED = 2,
0N/A LITERAL_OUTPUT = 3 };
0N/A // Temporaries that describe current operand
0N/A bool _cleared;
0N/A OpClassForm *_opclass;
0N/A OperandForm *_operand;
0N/A int _operand_idx;
0N/A const char *_local_name;
0N/A const char *_operand_name;
0N/A bool _doing_disp;
0N/A bool _doing_constant;
0N/A Form::DataType _constant_type;
0N/A DefineEmitState::literal_status _constant_status;
0N/A DefineEmitState::literal_status _reg_status;
0N/A bool _doing_emit8;
0N/A bool _doing_emit_d32;
0N/A bool _doing_emit_d16;
0N/A bool _doing_emit_hi;
0N/A bool _doing_emit_lo;
0N/A bool _may_reloc;
0N/A bool _must_reloc;
0N/A reloc_format _reloc_form;
0N/A const char * _reloc_type;
0N/A bool _processing_noninput;
0N/A
0N/A NameList _strings_to_emit;
0N/A
0N/A // Stable state, set by constructor
0N/A ArchDesc &_AD;
0N/A FILE *_fp;
0N/A EncClass &_encoding;
0N/A InsEncode &_ins_encode;
0N/A InstructForm &_inst;
0N/A
0N/Apublic:
0N/A DefineEmitState(FILE *fp, ArchDesc &AD, EncClass &encoding,
0N/A InsEncode &ins_encode, InstructForm &inst)
0N/A : _AD(AD), _fp(fp), _encoding(encoding), _ins_encode(ins_encode), _inst(inst) {
0N/A clear();
0N/A }
0N/A
0N/A void clear() {
0N/A _cleared = true;
0N/A _opclass = NULL;
0N/A _operand = NULL;
0N/A _operand_idx = 0;
0N/A _local_name = "";
0N/A _operand_name = "";
0N/A _doing_disp = false;
0N/A _doing_constant= false;
0N/A _constant_type = Form::none;
0N/A _constant_status = LITERAL_NOT_SEEN;
0N/A _reg_status = LITERAL_NOT_SEEN;
0N/A _doing_emit8 = false;
0N/A _doing_emit_d32= false;
0N/A _doing_emit_d16= false;
0N/A _doing_emit_hi = false;
0N/A _doing_emit_lo = false;
0N/A _may_reloc = false;
0N/A _must_reloc = false;
0N/A _reloc_form = RELOC_NONE;
0N/A _reloc_type = AdlcVMDeps::none_reloc_type();
0N/A _strings_to_emit.clear();
0N/A }
0N/A
0N/A // Track necessary state when identifying a replacement variable
4033N/A // @arg rep_var: The formal parameter of the encoding.
0N/A void update_state(const char *rep_var) {
0N/A // A replacement variable or one of its subfields
0N/A // Obtain replacement variable from list
0N/A if ( (*rep_var) != '$' ) {
0N/A // A replacement variable, '$' prefix
0N/A // check_rep_var( rep_var );
0N/A if ( Opcode::as_opcode_type(rep_var) != Opcode::NOT_AN_OPCODE ) {
0N/A // No state needed.
0N/A assert( _opclass == NULL,
0N/A "'primary', 'secondary' and 'tertiary' don't follow operand.");
1915N/A }
1915N/A else if ((strcmp(rep_var, "constanttablebase") == 0) ||
1915N/A (strcmp(rep_var, "constantoffset") == 0) ||
1915N/A (strcmp(rep_var, "constantaddress") == 0)) {
1915N/A if (!_inst.is_mach_constant()) {
1915N/A _AD.syntax_err(_encoding._linenum,
1915N/A "Replacement variable %s not allowed in instruct %s (only in MachConstantNode).\n",
1915N/A rep_var, _encoding._name);
1915N/A }
1915N/A }
1915N/A else {
4033N/A // Lookup its position in (formal) parameter list of encoding
0N/A int param_no = _encoding.rep_var_index(rep_var);
0N/A if ( param_no == -1 ) {
0N/A _AD.syntax_err( _encoding._linenum,
0N/A "Replacement variable %s not found in enc_class %s.\n",
0N/A rep_var, _encoding._name);
0N/A }
0N/A
0N/A // Lookup the corresponding ins_encode parameter
4033N/A // This is the argument (actual parameter) to the encoding.
0N/A const char *inst_rep_var = _ins_encode.rep_var_name(_inst, param_no);
0N/A if (inst_rep_var == NULL) {
0N/A _AD.syntax_err( _ins_encode._linenum,
0N/A "Parameter %s not passed to enc_class %s from instruct %s.\n",
0N/A rep_var, _encoding._name, _inst._ident);
0N/A }
0N/A
0N/A // Check if instruction's actual parameter is a local name in the instruction
0N/A const Form *local = _inst._localNames[inst_rep_var];
0N/A OpClassForm *opc = (local != NULL) ? local->is_opclass() : NULL;
0N/A // Note: assert removed to allow constant and symbolic parameters
0N/A // assert( opc, "replacement variable was not found in local names");
0N/A // Lookup the index position iff the replacement variable is a localName
0N/A int idx = (opc != NULL) ? _inst.operand_position_format(inst_rep_var) : -1;
0N/A
0N/A if ( idx != -1 ) {
0N/A // This is a local in the instruction
0N/A // Update local state info.
0N/A _opclass = opc;
0N/A _operand_idx = idx;
0N/A _local_name = rep_var;
0N/A _operand_name = inst_rep_var;
0N/A
0N/A // !!!!!
0N/A // Do not support consecutive operands.
0N/A assert( _operand == NULL, "Unimplemented()");
0N/A _operand = opc->is_operand();
0N/A }
0N/A else if( ADLParser::is_literal_constant(inst_rep_var) ) {
0N/A // Instruction provided a constant expression
0N/A // Check later that encoding specifies $$$constant to resolve as constant
0N/A _constant_status = LITERAL_SEEN;
0N/A }
0N/A else if( Opcode::as_opcode_type(inst_rep_var) != Opcode::NOT_AN_OPCODE ) {
0N/A // Instruction provided an opcode: "primary", "secondary", "tertiary"
0N/A // Check later that encoding specifies $$$constant to resolve as constant
0N/A _constant_status = LITERAL_SEEN;
0N/A }
0N/A else if((_AD.get_registers() != NULL ) && (_AD.get_registers()->getRegDef(inst_rep_var) != NULL)) {
0N/A // Instruction provided a literal register name for this parameter
0N/A // Check that encoding specifies $$$reg to resolve.as register.
0N/A _reg_status = LITERAL_SEEN;
0N/A }
0N/A else {
0N/A // Check for unimplemented functionality before hard failure
0N/A assert( strcmp(opc->_ident,"label")==0, "Unimplemented() Label");
0N/A assert( false, "ShouldNotReachHere()");
0N/A }
0N/A } // done checking which operand this is.
0N/A } else {
0N/A //
0N/A // A subfield variable, '$$' prefix
0N/A // Check for fields that may require relocation information.
0N/A // Then check that literal register parameters are accessed with 'reg' or 'constant'
0N/A //
0N/A if ( strcmp(rep_var,"$disp") == 0 ) {
0N/A _doing_disp = true;
0N/A assert( _opclass, "Must use operand or operand class before '$disp'");
0N/A if( _operand == NULL ) {
0N/A // Only have an operand class, generate run-time check for relocation
0N/A _may_reloc = true;
0N/A _reloc_form = RELOC_DISP;
0N/A _reloc_type = AdlcVMDeps::oop_reloc_type();
0N/A } else {
0N/A // Do precise check on operand: is it a ConP or not
0N/A //
0N/A // Check interface for value of displacement
0N/A assert( ( _operand->_interface != NULL ),
0N/A "$disp can only follow memory interface operand");
0N/A MemInterface *mem_interface= _operand->_interface->is_MemInterface();
0N/A assert( mem_interface != NULL,
0N/A "$disp can only follow memory interface operand");
0N/A const char *disp = mem_interface->_disp;
0N/A
0N/A if( disp != NULL && (*disp == '$') ) {
0N/A // MemInterface::disp contains a replacement variable,
0N/A // Check if this matches a ConP
0N/A //
0N/A // Lookup replacement variable, in operand's component list
0N/A const char *rep_var_name = disp + 1; // Skip '$'
0N/A const Component *comp = _operand->_components.search(rep_var_name);
0N/A assert( comp != NULL,"Replacement variable not found in components");
0N/A const char *type = comp->_type;
0N/A // Lookup operand form for replacement variable's type
0N/A const Form *form = _AD.globalNames()[type];
0N/A assert( form != NULL, "Replacement variable's type not found");
0N/A OperandForm *op = form->is_operand();
0N/A assert( op, "Attempting to emit a non-register or non-constant");
0N/A // Check if this is a constant
0N/A if (op->_matrule && op->_matrule->is_base_constant(_AD.globalNames())) {
0N/A // Check which constant this name maps to: _c0, _c1, ..., _cn
0N/A // const int idx = _operand.constant_position(_AD.globalNames(), comp);
0N/A // assert( idx != -1, "Constant component not found in operand");
0N/A Form::DataType dtype = op->is_base_constant(_AD.globalNames());
0N/A if ( dtype == Form::idealP ) {
0N/A _may_reloc = true;
0N/A // No longer true that idealP is always an oop
0N/A _reloc_form = RELOC_DISP;
0N/A _reloc_type = AdlcVMDeps::oop_reloc_type();
0N/A }
0N/A }
0N/A
0N/A else if( _operand->is_user_name_for_sReg() != Form::none ) {
0N/A // The only non-constant allowed access to disp is an operand sRegX in a stackSlotX
0N/A assert( op->ideal_to_sReg_type(type) != Form::none, "StackSlots access displacements using 'sRegs'");
0N/A _may_reloc = false;
0N/A } else {
0N/A assert( false, "fatal(); Only stackSlots can access a non-constant using 'disp'");
0N/A }
0N/A }
0N/A } // finished with precise check of operand for relocation.
0N/A } // finished with subfield variable
0N/A else if ( strcmp(rep_var,"$constant") == 0 ) {
0N/A _doing_constant = true;
0N/A if ( _constant_status == LITERAL_NOT_SEEN ) {
0N/A // Check operand for type of constant
0N/A assert( _operand, "Must use operand before '$$constant'");
0N/A Form::DataType dtype = _operand->is_base_constant(_AD.globalNames());
0N/A _constant_type = dtype;
0N/A if ( dtype == Form::idealP ) {
0N/A _may_reloc = true;
0N/A // No longer true that idealP is always an oop
0N/A // // _must_reloc = true;
0N/A _reloc_form = RELOC_IMMEDIATE;
0N/A _reloc_type = AdlcVMDeps::oop_reloc_type();
0N/A } else {
0N/A // No relocation information needed
0N/A }
0N/A } else {
0N/A // User-provided literals may not require relocation information !!!!!
0N/A assert( _constant_status == LITERAL_SEEN, "Must know we are processing a user-provided literal");
0N/A }
0N/A }
0N/A else if ( strcmp(rep_var,"$label") == 0 ) {
0N/A // Calls containing labels require relocation
0N/A if ( _inst.is_ideal_call() ) {
0N/A _may_reloc = true;
0N/A // !!!!! !!!!!
0N/A _reloc_type = AdlcVMDeps::none_reloc_type();
0N/A }
0N/A }
0N/A
0N/A // literal register parameter must be accessed as a 'reg' field.
0N/A if ( _reg_status != LITERAL_NOT_SEEN ) {
0N/A assert( _reg_status == LITERAL_SEEN, "Must have seen register literal before now");
0N/A if (strcmp(rep_var,"$reg") == 0 || reg_conversion(rep_var) != NULL) {
0N/A _reg_status = LITERAL_ACCESSED;
0N/A } else {
0N/A assert( false, "invalid access to literal register parameter");
0N/A }
0N/A }
0N/A // literal constant parameters must be accessed as a 'constant' field
0N/A if ( _constant_status != LITERAL_NOT_SEEN ) {
0N/A assert( _constant_status == LITERAL_SEEN, "Must have seen constant literal before now");
0N/A if( strcmp(rep_var,"$constant") == 0 ) {
0N/A _constant_status = LITERAL_ACCESSED;
0N/A } else {
0N/A assert( false, "invalid access to literal constant parameter");
0N/A }
0N/A }
0N/A } // end replacement and/or subfield
0N/A
0N/A }
0N/A
0N/A void add_rep_var(const char *rep_var) {
0N/A // Handle subfield and replacement variables.
0N/A if ( ( *rep_var == '$' ) && ( *(rep_var+1) == '$' ) ) {
0N/A // Check for emit prefix, '$$emit32'
0N/A assert( _cleared, "Can not nest $$$emit32");
0N/A if ( strcmp(rep_var,"$$emit32") == 0 ) {
0N/A _doing_emit_d32 = true;
0N/A }
0N/A else if ( strcmp(rep_var,"$$emit16") == 0 ) {
0N/A _doing_emit_d16 = true;
0N/A }
0N/A else if ( strcmp(rep_var,"$$emit_hi") == 0 ) {
0N/A _doing_emit_hi = true;
0N/A }
0N/A else if ( strcmp(rep_var,"$$emit_lo") == 0 ) {
0N/A _doing_emit_lo = true;
0N/A }
0N/A else if ( strcmp(rep_var,"$$emit8") == 0 ) {
0N/A _doing_emit8 = true;
0N/A }
0N/A else {
0N/A _AD.syntax_err(_encoding._linenum, "Unsupported $$operation '%s'\n",rep_var);
0N/A assert( false, "fatal();");
0N/A }
0N/A }
0N/A else {
0N/A // Update state for replacement variables
0N/A update_state( rep_var );
0N/A _strings_to_emit.addName(rep_var);
0N/A }
0N/A _cleared = false;
0N/A }
0N/A
0N/A void emit_replacement() {
0N/A // A replacement variable or one of its subfields
0N/A // Obtain replacement variable from list
0N/A // const char *ec_rep_var = encoding->_rep_vars.iter();
0N/A const char *rep_var;
0N/A _strings_to_emit.reset();
0N/A while ( (rep_var = _strings_to_emit.iter()) != NULL ) {
0N/A
0N/A if ( (*rep_var) == '$' ) {
0N/A // A subfield variable, '$$' prefix
0N/A emit_field( rep_var );
0N/A } else {
624N/A if (_strings_to_emit.peek() != NULL &&
624N/A strcmp(_strings_to_emit.peek(), "$Address") == 0) {
624N/A fprintf(_fp, "Address::make_raw(");
624N/A
624N/A emit_rep_var( rep_var );
624N/A fprintf(_fp,"->base(ra_,this,idx%d), ", _operand_idx);
624N/A
624N/A _reg_status = LITERAL_ACCESSED;
624N/A emit_rep_var( rep_var );
624N/A fprintf(_fp,"->index(ra_,this,idx%d), ", _operand_idx);
624N/A
624N/A _reg_status = LITERAL_ACCESSED;
624N/A emit_rep_var( rep_var );
624N/A fprintf(_fp,"->scale(), ");
624N/A
624N/A _reg_status = LITERAL_ACCESSED;
624N/A emit_rep_var( rep_var );
624N/A Form::DataType stack_type = _operand ? _operand->is_user_name_for_sReg() : Form::none;
624N/A if( _operand && _operand_idx==0 && stack_type != Form::none ) {
624N/A fprintf(_fp,"->disp(ra_,this,0), ");
624N/A } else {
624N/A fprintf(_fp,"->disp(ra_,this,idx%d), ", _operand_idx);
624N/A }
624N/A
624N/A _reg_status = LITERAL_ACCESSED;
624N/A emit_rep_var( rep_var );
624N/A fprintf(_fp,"->disp_is_oop())");
624N/A
624N/A // skip trailing $Address
624N/A _strings_to_emit.iter();
624N/A } else {
624N/A // A replacement variable, '$' prefix
624N/A const char* next = _strings_to_emit.peek();
624N/A const char* next2 = _strings_to_emit.peek(2);
624N/A if (next != NULL && next2 != NULL && strcmp(next2, "$Register") == 0 &&
624N/A (strcmp(next, "$base") == 0 || strcmp(next, "$index") == 0)) {
624N/A // handle $rev_var$$base$$Register and $rev_var$$index$$Register by
624N/A // producing as_Register(opnd_array(#)->base(ra_,this,idx1)).
624N/A fprintf(_fp, "as_Register(");
624N/A // emit the operand reference
624N/A emit_rep_var( rep_var );
624N/A rep_var = _strings_to_emit.iter();
624N/A assert(strcmp(rep_var, "$base") == 0 || strcmp(rep_var, "$index") == 0, "bad pattern");
624N/A // handle base or index
624N/A emit_field(rep_var);
624N/A rep_var = _strings_to_emit.iter();
624N/A assert(strcmp(rep_var, "$Register") == 0, "bad pattern");
624N/A // close up the parens
624N/A fprintf(_fp, ")");
624N/A } else {
624N/A emit_rep_var( rep_var );
624N/A }
624N/A }
0N/A } // end replacement and/or subfield
0N/A }
0N/A }
0N/A
0N/A void emit_reloc_type(const char* type) {
0N/A fprintf(_fp, "%s", type)
0N/A ;
0N/A }
0N/A
0N/A
0N/A void gen_emit_x_reloc(const char *d32_lo_hi ) {
0N/A fprintf(_fp,"emit_%s_reloc(cbuf, ", d32_lo_hi );
0N/A emit_replacement(); fprintf(_fp,", ");
0N/A emit_reloc_type( _reloc_type ); fprintf(_fp,", ");
0N/A fprintf(_fp, "%d", _reloc_form);fprintf(_fp, ");");
0N/A }
0N/A
0N/A
0N/A void emit() {
0N/A //
0N/A // "emit_d32_reloc(" or "emit_hi_reloc" or "emit_lo_reloc"
0N/A //
0N/A // Emit the function name when generating an emit function
0N/A if ( _doing_emit_d32 || _doing_emit_hi || _doing_emit_lo ) {
0N/A const char *d32_hi_lo = _doing_emit_d32 ? "d32" : (_doing_emit_hi ? "hi" : "lo");
0N/A // In general, relocatable isn't known at compiler compile time.
0N/A // Check results of prior scan
0N/A if ( ! _may_reloc ) {
0N/A // Definitely don't need relocation information
0N/A fprintf( _fp, "emit_%s(cbuf, ", d32_hi_lo );
0N/A emit_replacement(); fprintf(_fp, ")");
0N/A }
0N/A else if ( _must_reloc ) {
0N/A // Must emit relocation information
0N/A gen_emit_x_reloc( d32_hi_lo );
0N/A }
0N/A else {
0N/A // Emit RUNTIME CHECK to see if value needs relocation info
0N/A // If emitting a relocatable address, use 'emit_d32_reloc'
0N/A const char *disp_constant = _doing_disp ? "disp" : _doing_constant ? "constant" : "INVALID";
0N/A assert( (_doing_disp || _doing_constant)
0N/A && !(_doing_disp && _doing_constant),
0N/A "Must be emitting either a displacement or a constant");
0N/A fprintf(_fp,"\n");
0N/A fprintf(_fp,"if ( opnd_array(%d)->%s_is_oop() ) {\n",
0N/A _operand_idx, disp_constant);
0N/A fprintf(_fp," ");
0N/A gen_emit_x_reloc( d32_hi_lo ); fprintf(_fp,"\n");
0N/A fprintf(_fp,"} else {\n");
0N/A fprintf(_fp," emit_%s(cbuf, ", d32_hi_lo);
0N/A emit_replacement(); fprintf(_fp, ");\n"); fprintf(_fp,"}");
0N/A }
0N/A }
0N/A else if ( _doing_emit_d16 ) {
0N/A // Relocation of 16-bit values is not supported
0N/A fprintf(_fp,"emit_d16(cbuf, ");
0N/A emit_replacement(); fprintf(_fp, ")");
0N/A // No relocation done for 16-bit values
0N/A }
0N/A else if ( _doing_emit8 ) {
0N/A // Relocation of 8-bit values is not supported
0N/A fprintf(_fp,"emit_d8(cbuf, ");
0N/A emit_replacement(); fprintf(_fp, ")");
0N/A // No relocation done for 8-bit values
0N/A }
0N/A else {
0N/A // Not an emit# command, just output the replacement string.
0N/A emit_replacement();
0N/A }
0N/A
0N/A // Get ready for next state collection.
0N/A clear();
0N/A }
0N/A
0N/Aprivate:
0N/A
0N/A // recognizes names which represent MacroAssembler register types
0N/A // and return the conversion function to build them from OptoReg
0N/A const char* reg_conversion(const char* rep_var) {
0N/A if (strcmp(rep_var,"$Register") == 0) return "as_Register";
0N/A if (strcmp(rep_var,"$FloatRegister") == 0) return "as_FloatRegister";
0N/A#if defined(IA32) || defined(AMD64)
0N/A if (strcmp(rep_var,"$XMMRegister") == 0) return "as_XMMRegister";
0N/A#endif
0N/A return NULL;
0N/A }
0N/A
0N/A void emit_field(const char *rep_var) {
0N/A const char* reg_convert = reg_conversion(rep_var);
0N/A
0N/A // A subfield variable, '$$subfield'
0N/A if ( strcmp(rep_var, "$reg") == 0 || reg_convert != NULL) {
0N/A // $reg form or the $Register MacroAssembler type conversions
0N/A assert( _operand_idx != -1,
0N/A "Must use this subfield after operand");
0N/A if( _reg_status == LITERAL_NOT_SEEN ) {
0N/A if (_processing_noninput) {
0N/A const Form *local = _inst._localNames[_operand_name];
0N/A OperandForm *oper = local->is_operand();
0N/A const RegDef* first = oper->get_RegClass()->find_first_elem();
0N/A if (reg_convert != NULL) {
0N/A fprintf(_fp, "%s(%s_enc)", reg_convert, first->_regname);
0N/A } else {
0N/A fprintf(_fp, "%s_enc", first->_regname);
0N/A }
0N/A } else {
0N/A fprintf(_fp,"->%s(ra_,this", reg_convert != NULL ? reg_convert : "reg");
0N/A // Add parameter for index position, if not result operand
0N/A if( _operand_idx != 0 ) fprintf(_fp,",idx%d", _operand_idx);
0N/A fprintf(_fp,")");
4033N/A fprintf(_fp, "/* %s */", _operand_name);
0N/A }
0N/A } else {
0N/A assert( _reg_status == LITERAL_OUTPUT, "should have output register literal in emit_rep_var");
0N/A // Register literal has already been sent to output file, nothing more needed
0N/A }
0N/A }
0N/A else if ( strcmp(rep_var,"$base") == 0 ) {
0N/A assert( _operand_idx != -1,
0N/A "Must use this subfield after operand");
0N/A assert( ! _may_reloc, "UnImplemented()");
0N/A fprintf(_fp,"->base(ra_,this,idx%d)", _operand_idx);
0N/A }
0N/A else if ( strcmp(rep_var,"$index") == 0 ) {
0N/A assert( _operand_idx != -1,
0N/A "Must use this subfield after operand");
0N/A assert( ! _may_reloc, "UnImplemented()");
0N/A fprintf(_fp,"->index(ra_,this,idx%d)", _operand_idx);
0N/A }
0N/A else if ( strcmp(rep_var,"$scale") == 0 ) {
0N/A assert( ! _may_reloc, "UnImplemented()");
0N/A fprintf(_fp,"->scale()");
0N/A }
0N/A else if ( strcmp(rep_var,"$cmpcode") == 0 ) {
0N/A assert( ! _may_reloc, "UnImplemented()");
0N/A fprintf(_fp,"->ccode()");
0N/A }
0N/A else if ( strcmp(rep_var,"$constant") == 0 ) {
0N/A if( _constant_status == LITERAL_NOT_SEEN ) {
0N/A if ( _constant_type == Form::idealD ) {
0N/A fprintf(_fp,"->constantD()");
0N/A } else if ( _constant_type == Form::idealF ) {
0N/A fprintf(_fp,"->constantF()");
0N/A } else if ( _constant_type == Form::idealL ) {
0N/A fprintf(_fp,"->constantL()");
0N/A } else {
0N/A fprintf(_fp,"->constant()");
0N/A }
0N/A } else {
0N/A assert( _constant_status == LITERAL_OUTPUT, "should have output constant literal in emit_rep_var");
4033N/A // Constant literal has already been sent to output file, nothing more needed
0N/A }
0N/A }
0N/A else if ( strcmp(rep_var,"$disp") == 0 ) {
0N/A Form::DataType stack_type = _operand ? _operand->is_user_name_for_sReg() : Form::none;
0N/A if( _operand && _operand_idx==0 && stack_type != Form::none ) {
0N/A fprintf(_fp,"->disp(ra_,this,0)");
0N/A } else {
0N/A fprintf(_fp,"->disp(ra_,this,idx%d)", _operand_idx);
0N/A }
0N/A }
0N/A else if ( strcmp(rep_var,"$label") == 0 ) {
0N/A fprintf(_fp,"->label()");
0N/A }
0N/A else if ( strcmp(rep_var,"$method") == 0 ) {
0N/A fprintf(_fp,"->method()");
0N/A }
0N/A else {
0N/A printf("emit_field: %s\n",rep_var);
4033N/A globalAD->syntax_err(_inst._linenum, "Unknown replacement variable %s in format statement of %s.",
4033N/A rep_var, _inst._ident);
0N/A assert( false, "UnImplemented()");
0N/A }
0N/A }
0N/A
0N/A
0N/A void emit_rep_var(const char *rep_var) {
0N/A _processing_noninput = false;
0N/A // A replacement variable, originally '$'
0N/A if ( Opcode::as_opcode_type(rep_var) != Opcode::NOT_AN_OPCODE ) {
415N/A if (!_inst._opcode->print_opcode(_fp, Opcode::as_opcode_type(rep_var) )) {
415N/A // Missing opcode
415N/A _AD.syntax_err( _inst._linenum,
415N/A "Missing $%s opcode definition in %s, used by encoding %s\n",
415N/A rep_var, _inst._ident, _encoding._name);
415N/A }
0N/A }
1915N/A else if (strcmp(rep_var, "constanttablebase") == 0) {
1915N/A fprintf(_fp, "as_Register(ra_->get_encode(in(mach_constant_base_node_input())))");
1915N/A }
1915N/A else if (strcmp(rep_var, "constantoffset") == 0) {
1915N/A fprintf(_fp, "constant_offset()");
1915N/A }
1915N/A else if (strcmp(rep_var, "constantaddress") == 0) {
1915N/A fprintf(_fp, "InternalAddress(__ code()->consts()->start() + constant_offset())");
1915N/A }
0N/A else {
0N/A // Lookup its position in parameter list
0N/A int param_no = _encoding.rep_var_index(rep_var);
0N/A if ( param_no == -1 ) {
0N/A _AD.syntax_err( _encoding._linenum,
0N/A "Replacement variable %s not found in enc_class %s.\n",
0N/A rep_var, _encoding._name);
0N/A }
0N/A // Lookup the corresponding ins_encode parameter
0N/A const char *inst_rep_var = _ins_encode.rep_var_name(_inst, param_no);
0N/A
0N/A // Check if instruction's actual parameter is a local name in the instruction
0N/A const Form *local = _inst._localNames[inst_rep_var];
0N/A OpClassForm *opc = (local != NULL) ? local->is_opclass() : NULL;
0N/A // Note: assert removed to allow constant and symbolic parameters
0N/A // assert( opc, "replacement variable was not found in local names");
0N/A // Lookup the index position iff the replacement variable is a localName
0N/A int idx = (opc != NULL) ? _inst.operand_position_format(inst_rep_var) : -1;
0N/A if( idx != -1 ) {
0N/A if (_inst.is_noninput_operand(idx)) {
0N/A // This operand isn't a normal input so printing it is done
0N/A // specially.
0N/A _processing_noninput = true;
0N/A } else {
0N/A // Output the emit code for this operand
0N/A fprintf(_fp,"opnd_array(%d)",idx);
0N/A }
0N/A assert( _operand == opc->is_operand(),
0N/A "Previous emit $operand does not match current");
0N/A }
0N/A else if( ADLParser::is_literal_constant(inst_rep_var) ) {
0N/A // else check if it is a constant expression
0N/A // Removed following assert to allow primitive C types as arguments to encodings
0N/A // assert( _constant_status == LITERAL_ACCESSED, "Must be processing a literal constant parameter");
0N/A fprintf(_fp,"(%s)", inst_rep_var);
0N/A _constant_status = LITERAL_OUTPUT;
0N/A }
0N/A else if( Opcode::as_opcode_type(inst_rep_var) != Opcode::NOT_AN_OPCODE ) {
0N/A // else check if "primary", "secondary", "tertiary"
0N/A assert( _constant_status == LITERAL_ACCESSED, "Must be processing a literal constant parameter");
415N/A if (!_inst._opcode->print_opcode(_fp, Opcode::as_opcode_type(inst_rep_var) )) {
415N/A // Missing opcode
415N/A _AD.syntax_err( _inst._linenum,
415N/A "Missing $%s opcode definition in %s\n",
415N/A rep_var, _inst._ident);
415N/A
415N/A }
0N/A _constant_status = LITERAL_OUTPUT;
0N/A }
0N/A else if((_AD.get_registers() != NULL ) && (_AD.get_registers()->getRegDef(inst_rep_var) != NULL)) {
0N/A // Instruction provided a literal register name for this parameter
0N/A // Check that encoding specifies $$$reg to resolve.as register.
0N/A assert( _reg_status == LITERAL_ACCESSED, "Must be processing a literal register parameter");
0N/A fprintf(_fp,"(%s_enc)", inst_rep_var);
0N/A _reg_status = LITERAL_OUTPUT;
0N/A }
0N/A else {
0N/A // Check for unimplemented functionality before hard failure
0N/A assert( strcmp(opc->_ident,"label")==0, "Unimplemented() Label");
0N/A assert( false, "ShouldNotReachHere()");
0N/A }
0N/A // all done
0N/A }
0N/A }
0N/A
0N/A}; // end class DefineEmitState
0N/A
0N/A
0N/Avoid ArchDesc::defineSize(FILE *fp, InstructForm &inst) {
0N/A
0N/A //(1)
0N/A // Output instruction's emit prototype
4033N/A fprintf(fp,"uint %sNode::size(PhaseRegAlloc *ra_) const {\n",
0N/A inst._ident);
0N/A
4033N/A fprintf(fp, " assert(VerifyOops || MachNode::size(ra_) <= %s, \"bad fixed size\");\n", inst._size);
113N/A
0N/A //(2)
0N/A // Print the size
4033N/A fprintf(fp, " return (VerifyOops ? MachNode::size(ra_) : %s);\n", inst._size);
0N/A
0N/A // (3) and (4)
0N/A fprintf(fp,"}\n");
0N/A}
0N/A
1915N/A// defineEmit -----------------------------------------------------------------
1915N/Avoid ArchDesc::defineEmit(FILE* fp, InstructForm& inst) {
1915N/A InsEncode* encode = inst._insencode;
0N/A
0N/A // (1)
0N/A // Output instruction's emit prototype
1915N/A fprintf(fp, "void %sNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {\n", inst._ident);
0N/A
0N/A // If user did not define an encode section,
0N/A // provide stub that does not generate any machine code.
1915N/A if( (_encode == NULL) || (encode == NULL) ) {
0N/A fprintf(fp, " // User did not define an encode section.\n");
1915N/A fprintf(fp, "}\n");
0N/A return;
0N/A }
0N/A
0N/A // Save current instruction's starting address (helps with relocation).
1915N/A fprintf(fp, " cbuf.set_insts_mark();\n");
1915N/A
1915N/A // For MachConstantNodes which are ideal jump nodes, fill the jump table.
1915N/A if (inst.is_mach_constant() && inst.is_ideal_jump()) {
1915N/A fprintf(fp, " ra_->C->constant_table().fill_jump_table(cbuf, (MachConstantNode*) this, _index2label);\n");
1915N/A }
0N/A
0N/A // Output each operand's offset into the array of registers.
1915N/A inst.index_temps(fp, _globalNames);
0N/A
0N/A // Output this instruction's encodings
0N/A const char *ec_name;
0N/A bool user_defined = false;
1915N/A encode->reset();
1915N/A while ((ec_name = encode->encode_class_iter()) != NULL) {
1915N/A fprintf(fp, " {\n");
0N/A // Output user-defined encoding
0N/A user_defined = true;
0N/A
0N/A const char *ec_code = NULL;
0N/A const char *ec_rep_var = NULL;
0N/A EncClass *encoding = _encode->encClass(ec_name);
0N/A if (encoding == NULL) {
0N/A fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name);
0N/A abort();
0N/A }
0N/A
1915N/A if (encode->current_encoding_num_args() != encoding->num_args()) {
1915N/A globalAD->syntax_err(encode->_linenum, "In %s: passing %d arguments to %s but expecting %d",
1915N/A inst._ident, encode->current_encoding_num_args(),
0N/A ec_name, encoding->num_args());
0N/A }
0N/A
1915N/A DefineEmitState pending(fp, *this, *encoding, *encode, inst);
0N/A encoding->_code.reset();
0N/A encoding->_rep_vars.reset();
0N/A // Process list of user-defined strings,
0N/A // and occurrences of replacement variables.
0N/A // Replacement Vars are pushed into a list and then output
1915N/A while ((ec_code = encoding->_code.iter()) != NULL) {
1915N/A if (!encoding->_code.is_signal(ec_code)) {
0N/A // Emit pending code
0N/A pending.emit();
0N/A pending.clear();
0N/A // Emit this code section
1915N/A fprintf(fp, "%s", ec_code);
0N/A } else {
0N/A // A replacement variable or one of its subfields
0N/A // Obtain replacement variable from list
0N/A ec_rep_var = encoding->_rep_vars.iter();
0N/A pending.add_rep_var(ec_rep_var);
0N/A }
0N/A }
0N/A // Emit pending code
0N/A pending.emit();
0N/A pending.clear();
1915N/A fprintf(fp, " }\n");
0N/A } // end while instruction's encodings
0N/A
0N/A // Check if user stated which encoding to user
0N/A if ( user_defined == false ) {
0N/A fprintf(fp, " // User did not define which encode class to use.\n");
0N/A }
0N/A
0N/A // (3) and (4)
4033N/A fprintf(fp, "}\n\n");
1915N/A}
1915N/A
1915N/A// defineEvalConstant ---------------------------------------------------------
1915N/Avoid ArchDesc::defineEvalConstant(FILE* fp, InstructForm& inst) {
1915N/A InsEncode* encode = inst._constant;
1915N/A
1915N/A // (1)
1915N/A // Output instruction's emit prototype
1915N/A fprintf(fp, "void %sNode::eval_constant(Compile* C) {\n", inst._ident);
1915N/A
2957N/A // For ideal jump nodes, add a jump-table entry.
1915N/A if (inst.is_ideal_jump()) {
2957N/A fprintf(fp, " _constant = C->constant_table().add_jump_table(this);\n");
1915N/A }
1915N/A
1915N/A // If user did not define an encode section,
1915N/A // provide stub that does not generate any machine code.
1915N/A if ((_encode == NULL) || (encode == NULL)) {
1915N/A fprintf(fp, " // User did not define an encode section.\n");
1915N/A fprintf(fp, "}\n");
1915N/A return;
1915N/A }
1915N/A
1915N/A // Output this instruction's encodings
1915N/A const char *ec_name;
1915N/A bool user_defined = false;
1915N/A encode->reset();
1915N/A while ((ec_name = encode->encode_class_iter()) != NULL) {
1915N/A fprintf(fp, " {\n");
1915N/A // Output user-defined encoding
1915N/A user_defined = true;
1915N/A
1915N/A const char *ec_code = NULL;
1915N/A const char *ec_rep_var = NULL;
1915N/A EncClass *encoding = _encode->encClass(ec_name);
1915N/A if (encoding == NULL) {
1915N/A fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name);
1915N/A abort();
1915N/A }
1915N/A
1915N/A if (encode->current_encoding_num_args() != encoding->num_args()) {
1915N/A globalAD->syntax_err(encode->_linenum, "In %s: passing %d arguments to %s but expecting %d",
1915N/A inst._ident, encode->current_encoding_num_args(),
1915N/A ec_name, encoding->num_args());
1915N/A }
1915N/A
1915N/A DefineEmitState pending(fp, *this, *encoding, *encode, inst);
1915N/A encoding->_code.reset();
1915N/A encoding->_rep_vars.reset();
1915N/A // Process list of user-defined strings,
1915N/A // and occurrences of replacement variables.
1915N/A // Replacement Vars are pushed into a list and then output
1915N/A while ((ec_code = encoding->_code.iter()) != NULL) {
1915N/A if (!encoding->_code.is_signal(ec_code)) {
1915N/A // Emit pending code
1915N/A pending.emit();
1915N/A pending.clear();
1915N/A // Emit this code section
1915N/A fprintf(fp, "%s", ec_code);
1915N/A } else {
1915N/A // A replacement variable or one of its subfields
1915N/A // Obtain replacement variable from list
1915N/A ec_rep_var = encoding->_rep_vars.iter();
1915N/A pending.add_rep_var(ec_rep_var);
1915N/A }
1915N/A }
1915N/A // Emit pending code
1915N/A pending.emit();
1915N/A pending.clear();
1915N/A fprintf(fp, " }\n");
1915N/A } // end while instruction's encodings
1915N/A
1915N/A // Check if user stated which encoding to user
1915N/A if (user_defined == false) {
1915N/A fprintf(fp, " // User did not define which encode class to use.\n");
1915N/A }
1915N/A
1915N/A // (3) and (4)
1915N/A fprintf(fp, "}\n");
0N/A}
0N/A
0N/A// ---------------------------------------------------------------------------
0N/A//--------Utilities to build MachOper and MachNode derived Classes------------
0N/A// ---------------------------------------------------------------------------
0N/A
0N/A//------------------------------Utilities to build Operand Classes------------
0N/Astatic void defineIn_RegMask(FILE *fp, FormDict &globals, OperandForm &oper) {
0N/A uint num_edges = oper.num_edges(globals);
0N/A if( num_edges != 0 ) {
0N/A // Method header
0N/A fprintf(fp, "const RegMask *%sOper::in_RegMask(int index) const {\n",
0N/A oper._ident);
0N/A
0N/A // Assert that the index is in range.
0N/A fprintf(fp, " assert(0 <= index && index < %d, \"index out of range\");\n",
0N/A num_edges);
0N/A
0N/A // Figure out if all RegMasks are the same.
0N/A const char* first_reg_class = oper.in_reg_class(0, globals);
0N/A bool all_same = true;
0N/A assert(first_reg_class != NULL, "did not find register mask");
0N/A
0N/A for (uint index = 1; all_same && index < num_edges; index++) {
0N/A const char* some_reg_class = oper.in_reg_class(index, globals);
0N/A assert(some_reg_class != NULL, "did not find register mask");
0N/A if (strcmp(first_reg_class, some_reg_class) != 0) {
0N/A all_same = false;
0N/A }
0N/A }
0N/A
0N/A if (all_same) {
0N/A // Return the sole RegMask.
0N/A if (strcmp(first_reg_class, "stack_slots") == 0) {
0N/A fprintf(fp," return &(Compile::current()->FIRST_STACK_mask());\n");
0N/A } else {
4446N/A const char* first_reg_class_to_upper = toUpper(first_reg_class);
4446N/A fprintf(fp," return &%s_mask();\n", first_reg_class_to_upper);
4446N/A delete[] first_reg_class_to_upper;
0N/A }
0N/A } else {
0N/A // Build a switch statement to return the desired mask.
0N/A fprintf(fp," switch (index) {\n");
0N/A
0N/A for (uint index = 0; index < num_edges; index++) {
0N/A const char *reg_class = oper.in_reg_class(index, globals);
0N/A assert(reg_class != NULL, "did not find register mask");
0N/A if( !strcmp(reg_class, "stack_slots") ) {
0N/A fprintf(fp, " case %d: return &(Compile::current()->FIRST_STACK_mask());\n", index);
0N/A } else {
4446N/A const char* reg_class_to_upper = toUpper(reg_class);
4446N/A fprintf(fp, " case %d: return &%s_mask();\n", index, reg_class_to_upper);
4446N/A delete[] reg_class_to_upper;
0N/A }
0N/A }
0N/A fprintf(fp," }\n");
0N/A fprintf(fp," ShouldNotReachHere();\n");
0N/A fprintf(fp," return NULL;\n");
0N/A }
0N/A
0N/A // Method close
0N/A fprintf(fp, "}\n\n");
0N/A }
0N/A}
0N/A
0N/A// generate code to create a clone for a class derived from MachOper
0N/A//
0N/A// (0) MachOper *MachOperXOper::clone(Compile* C) const {
0N/A// (1) return new (C) MachXOper( _ccode, _c0, _c1, ..., _cn);
0N/A// (2) }
0N/A//
0N/Astatic void defineClone(FILE *fp, FormDict &globalNames, OperandForm &oper) {
4033N/A fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper._ident);
0N/A // Check for constants that need to be copied over
0N/A const int num_consts = oper.num_consts(globalNames);
0N/A const bool is_ideal_bool = oper.is_ideal_bool();
0N/A if( (num_consts > 0) ) {
4033N/A fprintf(fp," return new (C) %sOper(", oper._ident);
0N/A // generate parameters for constants
0N/A int i = 0;
0N/A fprintf(fp,"_c%d", i);
0N/A for( i = 1; i < num_consts; ++i) {
0N/A fprintf(fp,", _c%d", i);
0N/A }
0N/A // finish line (1)
0N/A fprintf(fp,");\n");
0N/A }
0N/A else {
0N/A assert( num_consts == 0, "Currently support zero or one constant per operand clone function");
4033N/A fprintf(fp," return new (C) %sOper();\n", oper._ident);
0N/A }
0N/A // finish method
0N/A fprintf(fp,"}\n");
0N/A}
0N/A
0N/A// Helper functions for bug 4796752, abstracted with minimal modification
0N/A// from define_oper_interface()
0N/AOperandForm *rep_var_to_operand(const char *encoding, OperandForm &oper, FormDict &globals) {
0N/A OperandForm *op = NULL;
0N/A // Check for replacement variable
0N/A if( *encoding == '$' ) {
0N/A // Replacement variable
0N/A const char *rep_var = encoding + 1;
0N/A // Lookup replacement variable, rep_var, in operand's component list
0N/A const Component *comp = oper._components.search(rep_var);
0N/A assert( comp != NULL, "Replacement variable not found in components");
0N/A // Lookup operand form for replacement variable's type
0N/A const char *type = comp->_type;
0N/A Form *form = (Form*)globals[type];
0N/A assert( form != NULL, "Replacement variable's type not found");
0N/A op = form->is_operand();
0N/A assert( op, "Attempting to emit a non-register or non-constant");
0N/A }
0N/A
0N/A return op;
0N/A}
0N/A
0N/Aint rep_var_to_constant_index(const char *encoding, OperandForm &oper, FormDict &globals) {
0N/A int idx = -1;
0N/A // Check for replacement variable
0N/A if( *encoding == '$' ) {
0N/A // Replacement variable
0N/A const char *rep_var = encoding + 1;
0N/A // Lookup replacement variable, rep_var, in operand's component list
0N/A const Component *comp = oper._components.search(rep_var);
0N/A assert( comp != NULL, "Replacement variable not found in components");
0N/A // Lookup operand form for replacement variable's type
0N/A const char *type = comp->_type;
0N/A Form *form = (Form*)globals[type];
0N/A assert( form != NULL, "Replacement variable's type not found");
0N/A OperandForm *op = form->is_operand();
0N/A assert( op, "Attempting to emit a non-register or non-constant");
0N/A // Check that this is a constant and find constant's index:
0N/A if (op->_matrule && op->_matrule->is_base_constant(globals)) {
0N/A idx = oper.constant_position(globals, comp);
0N/A }
0N/A }
0N/A
0N/A return idx;
0N/A}
0N/A
0N/Abool is_regI(const char *encoding, OperandForm &oper, FormDict &globals ) {
0N/A bool is_regI = false;
0N/A
0N/A OperandForm *op = rep_var_to_operand(encoding, oper, globals);
0N/A if( op != NULL ) {
0N/A // Check that this is a register
0N/A if ( (op->_matrule && op->_matrule->is_base_register(globals)) ) {
0N/A // Register
0N/A const char* ideal = op->ideal_type(globals);
0N/A is_regI = (ideal && (op->ideal_to_Reg_type(ideal) == Form::idealI));
0N/A }
0N/A }
0N/A
0N/A return is_regI;
0N/A}
0N/A
0N/Abool is_conP(const char *encoding, OperandForm &oper, FormDict &globals ) {
0N/A bool is_conP = false;
0N/A
0N/A OperandForm *op = rep_var_to_operand(encoding, oper, globals);
0N/A if( op != NULL ) {
0N/A // Check that this is a constant pointer
0N/A if (op->_matrule && op->_matrule->is_base_constant(globals)) {
0N/A // Constant
0N/A Form::DataType dtype = op->is_base_constant(globals);
0N/A is_conP = (dtype == Form::idealP);
0N/A }
0N/A }
0N/A
0N/A return is_conP;
0N/A}
0N/A
0N/A
0N/A// Define a MachOper interface methods
0N/Avoid ArchDesc::define_oper_interface(FILE *fp, OperandForm &oper, FormDict &globals,
0N/A const char *name, const char *encoding) {
0N/A bool emit_position = false;
0N/A int position = -1;
0N/A
0N/A fprintf(fp," virtual int %s", name);
0N/A // Generate access method for base, index, scale, disp, ...
0N/A if( (strcmp(name,"base") == 0) || (strcmp(name,"index") == 0) ) {
0N/A fprintf(fp,"(PhaseRegAlloc *ra_, const Node *node, int idx) const { \n");
0N/A emit_position = true;
0N/A } else if ( (strcmp(name,"disp") == 0) ) {
0N/A fprintf(fp,"(PhaseRegAlloc *ra_, const Node *node, int idx) const { \n");
0N/A } else {
4033N/A fprintf(fp,"() const { \n");
0N/A }
0N/A
0N/A // Check for hexadecimal value OR replacement variable
0N/A if( *encoding == '$' ) {
0N/A // Replacement variable
0N/A const char *rep_var = encoding + 1;
4033N/A fprintf(fp," // Replacement variable: %s\n", encoding+1);
0N/A // Lookup replacement variable, rep_var, in operand's component list
0N/A const Component *comp = oper._components.search(rep_var);
0N/A assert( comp != NULL, "Replacement variable not found in components");
0N/A // Lookup operand form for replacement variable's type
0N/A const char *type = comp->_type;
0N/A Form *form = (Form*)globals[type];
0N/A assert( form != NULL, "Replacement variable's type not found");
0N/A OperandForm *op = form->is_operand();
0N/A assert( op, "Attempting to emit a non-register or non-constant");
0N/A // Check that this is a register or a constant and generate code:
0N/A if ( (op->_matrule && op->_matrule->is_base_register(globals)) ) {
0N/A // Register
0N/A int idx_offset = oper.register_position( globals, rep_var);
0N/A position = idx_offset;
0N/A fprintf(fp," return (int)ra_->get_encode(node->in(idx");
0N/A if ( idx_offset > 0 ) fprintf(fp, "+%d",idx_offset);
0N/A fprintf(fp,"));\n");
0N/A } else if ( op->ideal_to_sReg_type(op->_ident) != Form::none ) {
0N/A // StackSlot for an sReg comes either from input node or from self, when idx==0
0N/A fprintf(fp," if( idx != 0 ) {\n");
4033N/A fprintf(fp," // Access stack offset (register number) for input operand\n");
0N/A fprintf(fp," return ra_->reg2offset(ra_->get_reg_first(node->in(idx)));/* sReg */\n");
0N/A fprintf(fp," }\n");
4033N/A fprintf(fp," // Access stack offset (register number) from myself\n");
0N/A fprintf(fp," return ra_->reg2offset(ra_->get_reg_first(node));/* sReg */\n");
0N/A } else if (op->_matrule && op->_matrule->is_base_constant(globals)) {
0N/A // Constant
0N/A // Check which constant this name maps to: _c0, _c1, ..., _cn
0N/A const int idx = oper.constant_position(globals, comp);
0N/A assert( idx != -1, "Constant component not found in operand");
0N/A // Output code for this constant, type dependent.
0N/A fprintf(fp," return (int)" );
0N/A oper.access_constant(fp, globals, (uint)idx /* , const_type */);
0N/A fprintf(fp,";\n");
0N/A } else {
0N/A assert( false, "Attempting to emit a non-register or non-constant");
0N/A }
0N/A }
0N/A else if( *encoding == '0' && *(encoding+1) == 'x' ) {
0N/A // Hex value
4033N/A fprintf(fp," return %s;\n", encoding);
0N/A } else {
0N/A assert( false, "Do not support octal or decimal encode constants");
0N/A }
0N/A fprintf(fp," }\n");
0N/A
0N/A if( emit_position && (position != -1) && (oper.num_edges(globals) > 0) ) {
0N/A fprintf(fp," virtual int %s_position() const { return %d; }\n", name, position);
0N/A MemInterface *mem_interface = oper._interface->is_MemInterface();
0N/A const char *base = mem_interface->_base;
0N/A const char *disp = mem_interface->_disp;
0N/A if( emit_position && (strcmp(name,"base") == 0)
0N/A && base != NULL && is_regI(base, oper, globals)
0N/A && disp != NULL && is_conP(disp, oper, globals) ) {
0N/A // Found a memory access using a constant pointer for a displacement
0N/A // and a base register containing an integer offset.
0N/A // In this case the base and disp are reversed with respect to what
0N/A // is expected by MachNode::get_base_and_disp() and MachNode::adr_type().
0N/A // Provide a non-NULL return for disp_as_type() that will allow adr_type()
0N/A // to correctly compute the access type for alias analysis.
0N/A //
0N/A // See BugId 4796752, operand indOffset32X in i486.ad
0N/A int idx = rep_var_to_constant_index(disp, oper, globals);
0N/A fprintf(fp," virtual const TypePtr *disp_as_type() const { return _c%d; }\n", idx);
0N/A }
0N/A }
0N/A}
0N/A
0N/A//
0N/A// Construct the method to copy _idx, inputs and operands to new node.
0N/Astatic void define_fill_new_machnode(bool used, FILE *fp_cpp) {
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "// Copy _idx, inputs and operands to new node\n");
0N/A fprintf(fp_cpp, "void MachNode::fill_new_machnode( MachNode* node, Compile* C) const {\n");
0N/A if( !used ) {
0N/A fprintf(fp_cpp, " // This architecture does not have cisc or short branch instructions\n");
0N/A fprintf(fp_cpp, " ShouldNotCallThis();\n");
0N/A fprintf(fp_cpp, "}\n");
0N/A } else {
0N/A // New node must use same node index for access through allocator's tables
0N/A fprintf(fp_cpp, " // New node must use same node index\n");
0N/A fprintf(fp_cpp, " node->set_idx( _idx );\n");
0N/A // Copy machine-independent inputs
0N/A fprintf(fp_cpp, " // Copy machine-independent inputs\n");
0N/A fprintf(fp_cpp, " for( uint j = 0; j < req(); j++ ) {\n");
0N/A fprintf(fp_cpp, " node->add_req(in(j));\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A // Copy machine operands to new MachNode
0N/A fprintf(fp_cpp, " // Copy my operands, except for cisc position\n");
0N/A fprintf(fp_cpp, " int nopnds = num_opnds();\n");
0N/A fprintf(fp_cpp, " assert( node->num_opnds() == (uint)nopnds, \"Must have same number of operands\");\n");
0N/A fprintf(fp_cpp, " MachOper **to = node->_opnds;\n");
0N/A fprintf(fp_cpp, " for( int i = 0; i < nopnds; i++ ) {\n");
0N/A fprintf(fp_cpp, " if( i != cisc_operand() ) \n");
0N/A fprintf(fp_cpp, " to[i] = _opnds[i]->clone(C);\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A fprintf(fp_cpp, "}\n");
0N/A }
0N/A fprintf(fp_cpp, "\n");
0N/A}
0N/A
0N/A//------------------------------defineClasses----------------------------------
0N/A// Define members of MachNode and MachOper classes based on
0N/A// operand and instruction lists
0N/Avoid ArchDesc::defineClasses(FILE *fp) {
0N/A
0N/A // Define the contents of an array containing the machine register names
0N/A defineRegNames(fp, _register);
0N/A // Define an array containing the machine register encoding values
0N/A defineRegEncodes(fp, _register);
0N/A // Generate an enumeration of user-defined register classes
0N/A // and a list of register masks, one for each class.
0N/A // Only define the RegMask value objects in the expand file.
0N/A // Declare each as an extern const RegMask ...; in ad_<arch>.hpp
0N/A declare_register_masks(_HPP_file._fp);
0N/A // build_register_masks(fp);
0N/A build_register_masks(_CPP_EXPAND_file._fp);
0N/A // Define the pipe_classes
0N/A build_pipe_classes(_CPP_PIPELINE_file._fp);
0N/A
0N/A // Generate Machine Classes for each operand defined in AD file
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"//------------------Define classes derived from MachOper---------------------\n");
0N/A // Iterate through all operands
0N/A _operands.reset();
0N/A OperandForm *oper;
0N/A for( ; (oper = (OperandForm*)_operands.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( oper->ideal_only() ) continue;
0N/A // !!!!!
0N/A // The declaration of labelOper is in machine-independent file: machnode
0N/A if ( strcmp(oper->_ident,"label") == 0 ) {
0N/A defineIn_RegMask(_CPP_MISC_file._fp, _globalNames, *oper);
0N/A
0N/A fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper->_ident);
0N/A fprintf(fp," return new (C) %sOper(_label, _block_num);\n", oper->_ident);
0N/A fprintf(fp,"}\n");
0N/A
0N/A fprintf(fp,"uint %sOper::opcode() const { return %s; }\n",
0N/A oper->_ident, machOperEnum(oper->_ident));
0N/A // // Currently all XXXOper::Hash() methods are identical (990820)
0N/A // define_hash(fp, oper->_ident);
0N/A // // Currently all XXXOper::Cmp() methods are identical (990820)
0N/A // define_cmp(fp, oper->_ident);
0N/A fprintf(fp,"\n");
0N/A
0N/A continue;
0N/A }
0N/A
0N/A // The declaration of methodOper is in machine-independent file: machnode
0N/A if ( strcmp(oper->_ident,"method") == 0 ) {
0N/A defineIn_RegMask(_CPP_MISC_file._fp, _globalNames, *oper);
0N/A
0N/A fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper->_ident);
0N/A fprintf(fp," return new (C) %sOper(_method);\n", oper->_ident);
0N/A fprintf(fp,"}\n");
0N/A
0N/A fprintf(fp,"uint %sOper::opcode() const { return %s; }\n",
0N/A oper->_ident, machOperEnum(oper->_ident));
0N/A // // Currently all XXXOper::Hash() methods are identical (990820)
0N/A // define_hash(fp, oper->_ident);
0N/A // // Currently all XXXOper::Cmp() methods are identical (990820)
0N/A // define_cmp(fp, oper->_ident);
0N/A fprintf(fp,"\n");
0N/A
0N/A continue;
0N/A }
0N/A
0N/A defineIn_RegMask(fp, _globalNames, *oper);
0N/A defineClone(_CPP_CLONE_file._fp, _globalNames, *oper);
0N/A // // Currently all XXXOper::Hash() methods are identical (990820)
0N/A // define_hash(fp, oper->_ident);
0N/A // // Currently all XXXOper::Cmp() methods are identical (990820)
0N/A // define_cmp(fp, oper->_ident);
0N/A
0N/A // side-call to generate output that used to be in the header file:
0N/A extern void gen_oper_format(FILE *fp, FormDict &globals, OperandForm &oper, bool for_c_file);
0N/A gen_oper_format(_CPP_FORMAT_file._fp, _globalNames, *oper, true);
0N/A
0N/A }
0N/A
0N/A
0N/A // Generate Machine Classes for each instruction defined in AD file
0N/A fprintf(fp,"//------------------Define members for classes derived from MachNode----------\n");
0N/A // Output the definitions for out_RegMask() // & kill_RegMask()
0N/A _instructions.reset();
0N/A InstructForm *instr;
0N/A MachNodeForm *machnode;
0N/A for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( instr->ideal_only() ) continue;
0N/A
0N/A defineOut_RegMask(_CPP_MISC_file._fp, instr->_ident, reg_mask(*instr));
0N/A }
0N/A
0N/A bool used = false;
0N/A // Output the definitions for expand rules & peephole rules
0N/A _instructions.reset();
0N/A for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( instr->ideal_only() ) continue;
0N/A // If there are multiple defs/kills, or an explicit expand rule, build rule
0N/A if( instr->expands() || instr->needs_projections() ||
0N/A instr->has_temps() ||
1915N/A instr->is_mach_constant() ||
0N/A instr->_matrule != NULL &&
0N/A instr->num_opnds() != instr->num_unique_opnds() )
0N/A defineExpand(_CPP_EXPAND_file._fp, instr);
0N/A // If there is an explicit peephole rule, build it
0N/A if ( instr->peepholes() )
0N/A definePeephole(_CPP_PEEPHOLE_file._fp, instr);
0N/A
0N/A // Output code to convert to the cisc version, if applicable
0N/A used |= instr->define_cisc_version(*this, fp);
0N/A
0N/A // Output code to convert to the short branch version, if applicable
1461N/A used |= instr->define_short_branch_methods(*this, fp);
0N/A }
0N/A
0N/A // Construct the method called by cisc_version() to copy inputs and operands.
0N/A define_fill_new_machnode(used, fp);
0N/A
0N/A // Output the definitions for labels
0N/A _instructions.reset();
0N/A while( (instr = (InstructForm*)_instructions.iter()) != NULL ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( instr->ideal_only() ) continue;
0N/A
0N/A // Access the fields for operand Label
0N/A int label_position = instr->label_position();
0N/A if( label_position != -1 ) {
0N/A // Set the label
2664N/A fprintf(fp,"void %sNode::label_set( Label* label, uint block_num ) {\n", instr->_ident);
0N/A fprintf(fp," labelOper* oper = (labelOper*)(opnd_array(%d));\n",
0N/A label_position );
2664N/A fprintf(fp," oper->_label = label;\n");
0N/A fprintf(fp," oper->_block_num = block_num;\n");
0N/A fprintf(fp,"}\n");
2678N/A // Save the label
2678N/A fprintf(fp,"void %sNode::save_label( Label** label, uint* block_num ) {\n", instr->_ident);
2678N/A fprintf(fp," labelOper* oper = (labelOper*)(opnd_array(%d));\n",
2678N/A label_position );
2678N/A fprintf(fp," *label = oper->_label;\n");
2678N/A fprintf(fp," *block_num = oper->_block_num;\n");
2678N/A fprintf(fp,"}\n");
0N/A }
0N/A }
0N/A
0N/A // Output the definitions for methods
0N/A _instructions.reset();
0N/A while( (instr = (InstructForm*)_instructions.iter()) != NULL ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( instr->ideal_only() ) continue;
0N/A
0N/A // Access the fields for operand Label
0N/A int method_position = instr->method_position();
0N/A if( method_position != -1 ) {
0N/A // Access the method's address
0N/A fprintf(fp,"void %sNode::method_set( intptr_t method ) {\n", instr->_ident);
0N/A fprintf(fp," ((methodOper*)opnd_array(%d))->_method = method;\n",
0N/A method_position );
0N/A fprintf(fp,"}\n");
0N/A fprintf(fp,"\n");
0N/A }
0N/A }
0N/A
0N/A // Define this instruction's number of relocation entries, base is '0'
0N/A _instructions.reset();
0N/A while( (instr = (InstructForm*)_instructions.iter()) != NULL ) {
0N/A // Output the definition for number of relocation entries
0N/A uint reloc_size = instr->reloc(_globalNames);
0N/A if ( reloc_size != 0 ) {
4033N/A fprintf(fp,"int %sNode::reloc() const {\n", instr->_ident);
4033N/A fprintf(fp," return %d;\n", reloc_size);
0N/A fprintf(fp,"}\n");
0N/A fprintf(fp,"\n");
0N/A }
0N/A }
0N/A fprintf(fp,"\n");
0N/A
0N/A // Output the definitions for code generation
0N/A //
0N/A // address ___Node::emit(address ptr, PhaseRegAlloc *ra_) const {
0N/A // // ... encoding defined by user
0N/A // return ptr;
0N/A // }
0N/A //
0N/A _instructions.reset();
0N/A for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( instr->ideal_only() ) continue;
0N/A
1915N/A if (instr->_insencode) defineEmit (fp, *instr);
1915N/A if (instr->is_mach_constant()) defineEvalConstant(fp, *instr);
1915N/A if (instr->_size) defineSize (fp, *instr);
0N/A
0N/A // side-call to generate output that used to be in the header file:
0N/A extern void gen_inst_format(FILE *fp, FormDict &globals, InstructForm &oper, bool for_c_file);
0N/A gen_inst_format(_CPP_FORMAT_file._fp, _globalNames, *instr, true);
0N/A }
0N/A
0N/A // Output the definitions for alias analysis
0N/A _instructions.reset();
0N/A for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( instr->ideal_only() ) continue;
0N/A
0N/A // Analyze machine instructions that either USE or DEF memory.
0N/A int memory_operand = instr->memory_operand(_globalNames);
0N/A // Some guys kill all of memory
0N/A if ( instr->is_wide_memory_kill(_globalNames) ) {
0N/A memory_operand = InstructForm::MANY_MEMORY_OPERANDS;
0N/A }
0N/A
0N/A if ( memory_operand != InstructForm::NO_MEMORY_OPERAND ) {
0N/A if( memory_operand == InstructForm::MANY_MEMORY_OPERANDS ) {
0N/A fprintf(fp,"const TypePtr *%sNode::adr_type() const { return TypePtr::BOTTOM; }\n", instr->_ident);
0N/A fprintf(fp,"const MachOper* %sNode::memory_operand() const { return (MachOper*)-1; }\n", instr->_ident);
0N/A } else {
0N/A fprintf(fp,"const MachOper* %sNode::memory_operand() const { return _opnds[%d]; }\n", instr->_ident, memory_operand);
0N/A }
0N/A }
0N/A }
0N/A
0N/A // Get the length of the longest identifier
0N/A int max_ident_len = 0;
0N/A _instructions.reset();
0N/A
0N/A for ( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A if (instr->_ins_pipe && _pipeline->_classlist.search(instr->_ins_pipe)) {
0N/A int ident_len = (int)strlen(instr->_ident);
0N/A if( max_ident_len < ident_len )
0N/A max_ident_len = ident_len;
0N/A }
0N/A }
0N/A
0N/A // Emit specifically for Node(s)
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline_class() { return %s; }\n",
0N/A max_ident_len, "Node", _pipeline ? "(&pipeline_class_Zero_Instructions)" : "NULL");
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline() const { return %s; }\n",
0N/A max_ident_len, "Node", _pipeline ? "(&pipeline_class_Zero_Instructions)" : "NULL");
0N/A fprintf(_CPP_PIPELINE_file._fp, "\n");
0N/A
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline_class() { return %s; }\n",
0N/A max_ident_len, "MachNode", _pipeline ? "(&pipeline_class_Unknown_Instructions)" : "NULL");
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline() const { return pipeline_class(); }\n",
0N/A max_ident_len, "MachNode");
0N/A fprintf(_CPP_PIPELINE_file._fp, "\n");
0N/A
0N/A // Output the definitions for machine node specific pipeline data
0N/A _machnodes.reset();
0N/A
0N/A for ( ; (machnode = (MachNodeForm*)_machnodes.iter()) != NULL; ) {
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %sNode::pipeline() const { return (&pipeline_class_%03d); }\n",
0N/A machnode->_ident, ((class PipeClassForm *)_pipeline->_classdict[machnode->_machnode_pipe])->_num);
0N/A }
0N/A
0N/A fprintf(_CPP_PIPELINE_file._fp, "\n");
0N/A
0N/A // Output the definitions for instruction pipeline static data references
0N/A _instructions.reset();
0N/A
0N/A for ( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A if (instr->_ins_pipe && _pipeline->_classlist.search(instr->_ins_pipe)) {
0N/A fprintf(_CPP_PIPELINE_file._fp, "\n");
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*sNode::pipeline_class() { return (&pipeline_class_%03d); }\n",
0N/A max_ident_len, instr->_ident, ((class PipeClassForm *)_pipeline->_classdict[instr->_ins_pipe])->_num);
0N/A fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*sNode::pipeline() const { return (&pipeline_class_%03d); }\n",
0N/A max_ident_len, instr->_ident, ((class PipeClassForm *)_pipeline->_classdict[instr->_ins_pipe])->_num);
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/A// -------------------------------- maps ------------------------------------
0N/A
0N/A// Information needed to generate the ReduceOp mapping for the DFA
0N/Aclass OutputReduceOp : public OutputMap {
0N/Apublic:
0N/A OutputReduceOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
4033N/A : OutputMap(hpp, cpp, globals, AD, "reduceOp") {};
0N/A
0N/A void declaration() { fprintf(_hpp, "extern const int reduceOp[];\n"); }
0N/A void definition() { fprintf(_cpp, "const int reduceOp[] = {\n"); }
0N/A void closing() { fprintf(_cpp, " 0 // no trailing comma\n");
0N/A OutputMap::closing();
0N/A }
0N/A void map(OpClassForm &opc) {
0N/A const char *reduce = opc._ident;
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(OperandForm &oper) {
0N/A // Most operands without match rules, e.g. eFlagsReg, do not have a result operand
0N/A const char *reduce = (oper._matrule ? oper.reduce_result() : NULL);
0N/A // operand stackSlot does not have a match rule, but produces a stackSlot
0N/A if( oper.is_user_name_for_sReg() != Form::none ) reduce = oper.reduce_result();
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(InstructForm &inst) {
0N/A const char *reduce = (inst._matrule ? inst.reduce_result() : NULL);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(char *reduce) {
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A};
0N/A
0N/A// Information needed to generate the LeftOp mapping for the DFA
0N/Aclass OutputLeftOp : public OutputMap {
0N/Apublic:
0N/A OutputLeftOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
4033N/A : OutputMap(hpp, cpp, globals, AD, "leftOp") {};
0N/A
0N/A void declaration() { fprintf(_hpp, "extern const int leftOp[];\n"); }
0N/A void definition() { fprintf(_cpp, "const int leftOp[] = {\n"); }
0N/A void closing() { fprintf(_cpp, " 0 // no trailing comma\n");
0N/A OutputMap::closing();
0N/A }
0N/A void map(OpClassForm &opc) { fprintf(_cpp, " 0"); }
0N/A void map(OperandForm &oper) {
0N/A const char *reduce = oper.reduce_left(_globals);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(char *name) {
0N/A const char *reduce = _AD.reduceLeft(name);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(InstructForm &inst) {
0N/A const char *reduce = inst.reduce_left(_globals);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A};
0N/A
0N/A
0N/A// Information needed to generate the RightOp mapping for the DFA
0N/Aclass OutputRightOp : public OutputMap {
0N/Apublic:
0N/A OutputRightOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
4033N/A : OutputMap(hpp, cpp, globals, AD, "rightOp") {};
0N/A
0N/A void declaration() { fprintf(_hpp, "extern const int rightOp[];\n"); }
0N/A void definition() { fprintf(_cpp, "const int rightOp[] = {\n"); }
0N/A void closing() { fprintf(_cpp, " 0 // no trailing comma\n");
0N/A OutputMap::closing();
0N/A }
0N/A void map(OpClassForm &opc) { fprintf(_cpp, " 0"); }
0N/A void map(OperandForm &oper) {
0N/A const char *reduce = oper.reduce_right(_globals);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(char *name) {
0N/A const char *reduce = _AD.reduceRight(name);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A void map(InstructForm &inst) {
0N/A const char *reduce = inst.reduce_right(_globals);
0N/A if( reduce ) fprintf(_cpp, " %s_rule", reduce);
0N/A else fprintf(_cpp, " 0");
0N/A }
0N/A};
0N/A
0N/A
0N/A// Information needed to generate the Rule names for the DFA
0N/Aclass OutputRuleName : public OutputMap {
0N/Apublic:
0N/A OutputRuleName(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
4033N/A : OutputMap(hpp, cpp, globals, AD, "ruleName") {};
0N/A
0N/A void declaration() { fprintf(_hpp, "extern const char *ruleName[];\n"); }
0N/A void definition() { fprintf(_cpp, "const char *ruleName[] = {\n"); }
4033N/A void closing() { fprintf(_cpp, " \"invalid rule name\" // no trailing comma\n");
0N/A OutputMap::closing();
0N/A }
0N/A void map(OpClassForm &opc) { fprintf(_cpp, " \"%s\"", _AD.machOperEnum(opc._ident) ); }
0N/A void map(OperandForm &oper) { fprintf(_cpp, " \"%s\"", _AD.machOperEnum(oper._ident) ); }
0N/A void map(char *name) { fprintf(_cpp, " \"%s\"", name ? name : "0"); }
0N/A void map(InstructForm &inst){ fprintf(_cpp, " \"%s\"", inst._ident ? inst._ident : "0"); }
0N/A};
0N/A
0N/A
0N/A// Information needed to generate the swallowed mapping for the DFA
0N/Aclass OutputSwallowed : public OutputMap {
0N/Apublic:
0N/A OutputSwallowed(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
4033N/A : OutputMap(hpp, cpp, globals, AD, "swallowed") {};
0N/A
0N/A void declaration() { fprintf(_hpp, "extern const bool swallowed[];\n"); }
0N/A void definition() { fprintf(_cpp, "const bool swallowed[] = {\n"); }
0N/A void closing() { fprintf(_cpp, " false // no trailing comma\n");
0N/A OutputMap::closing();
0N/A }
0N/A void map(OperandForm &oper) { // Generate the entry for this opcode
0N/A const char *swallowed = oper.swallowed(_globals) ? "true" : "false";
0N/A fprintf(_cpp, " %s", swallowed);
0N/A }
0N/A void map(OpClassForm &opc) { fprintf(_cpp, " false"); }
0N/A void map(char *name) { fprintf(_cpp, " false"); }
0N/A void map(InstructForm &inst){ fprintf(_cpp, " false"); }
0N/A};
0N/A
0N/A
0N/A// Information needed to generate the decision array for instruction chain rule
0N/Aclass OutputInstChainRule : public OutputMap {
0N/Apublic:
0N/A OutputInstChainRule(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
4033N/A : OutputMap(hpp, cpp, globals, AD, "instruction_chain_rule") {};
0N/A
0N/A void declaration() { fprintf(_hpp, "extern const bool instruction_chain_rule[];\n"); }
0N/A void definition() { fprintf(_cpp, "const bool instruction_chain_rule[] = {\n"); }
0N/A void closing() { fprintf(_cpp, " false // no trailing comma\n");
0N/A OutputMap::closing();
0N/A }
0N/A void map(OpClassForm &opc) { fprintf(_cpp, " false"); }
0N/A void map(OperandForm &oper) { fprintf(_cpp, " false"); }
0N/A void map(char *name) { fprintf(_cpp, " false"); }
0N/A void map(InstructForm &inst) { // Check for simple chain rule
0N/A const char *chain = inst.is_simple_chain_rule(_globals) ? "true" : "false";
0N/A fprintf(_cpp, " %s", chain);
0N/A }
0N/A};
0N/A
0N/A
0N/A//---------------------------build_map------------------------------------
0N/A// Build mapping from enumeration for densely packed operands
0N/A// TO result and child types.
0N/Avoid ArchDesc::build_map(OutputMap &map) {
0N/A FILE *fp_hpp = map.decl_file();
0N/A FILE *fp_cpp = map.def_file();
0N/A int idx = 0;
0N/A OperandForm *op;
0N/A OpClassForm *opc;
0N/A InstructForm *inst;
0N/A
0N/A // Construct this mapping
0N/A map.declaration();
0N/A fprintf(fp_cpp,"\n");
0N/A map.definition();
0N/A
0N/A // Output the mapping for operands
0N/A map.record_position(OutputMap::BEGIN_OPERANDS, idx );
0N/A _operands.reset();
0N/A for(; (op = (OperandForm*)_operands.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( op->ideal_only() ) continue;
0N/A
0N/A // Generate the entry for this opcode
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(*op); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A fprintf(fp_cpp, " // last operand\n");
0N/A
0N/A // Place all user-defined operand classes into the mapping
0N/A map.record_position(OutputMap::BEGIN_OPCLASSES, idx );
0N/A _opclass.reset();
0N/A for(; (opc = (OpClassForm*)_opclass.iter()) != NULL; ) {
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(*opc); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A fprintf(fp_cpp, " // last operand class\n");
0N/A
0N/A // Place all internally defined operands into the mapping
0N/A map.record_position(OutputMap::BEGIN_INTERNALS, idx );
0N/A _internalOpNames.reset();
0N/A char *name = NULL;
0N/A for(; (name = (char *)_internalOpNames.iter()) != NULL; ) {
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(name); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A fprintf(fp_cpp, " // last internally defined operand\n");
0N/A
0N/A // Place all user-defined instructions into the mapping
0N/A if( map.do_instructions() ) {
0N/A map.record_position(OutputMap::BEGIN_INSTRUCTIONS, idx );
0N/A // Output all simple instruction chain rules first
0N/A map.record_position(OutputMap::BEGIN_INST_CHAIN_RULES, idx );
0N/A {
0N/A _instructions.reset();
0N/A for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( inst->ideal_only() ) continue;
0N/A if ( ! inst->is_simple_chain_rule(_globalNames) ) continue;
0N/A if ( inst->rematerialize(_globalNames, get_registers()) ) continue;
0N/A
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A map.record_position(OutputMap::BEGIN_REMATERIALIZE, idx );
0N/A _instructions.reset();
0N/A for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( inst->ideal_only() ) continue;
0N/A if ( ! inst->is_simple_chain_rule(_globalNames) ) continue;
0N/A if ( ! inst->rematerialize(_globalNames, get_registers()) ) continue;
0N/A
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A map.record_position(OutputMap::END_INST_CHAIN_RULES, idx );
0N/A }
0N/A // Output all instructions that are NOT simple chain rules
0N/A {
0N/A _instructions.reset();
0N/A for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( inst->ideal_only() ) continue;
0N/A if ( inst->is_simple_chain_rule(_globalNames) ) continue;
0N/A if ( ! inst->rematerialize(_globalNames, get_registers()) ) continue;
0N/A
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A map.record_position(OutputMap::END_REMATERIALIZE, idx );
0N/A _instructions.reset();
0N/A for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( inst->ideal_only() ) continue;
0N/A if ( inst->is_simple_chain_rule(_globalNames) ) continue;
0N/A if ( inst->rematerialize(_globalNames, get_registers()) ) continue;
0N/A
4033N/A fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n");
0N/A ++idx;
0N/A };
0N/A }
0N/A fprintf(fp_cpp, " // last instruction\n");
0N/A map.record_position(OutputMap::END_INSTRUCTIONS, idx );
0N/A }
0N/A // Finish defining table
0N/A map.closing();
0N/A};
0N/A
0N/A
0N/A// Helper function for buildReduceMaps
0N/Achar reg_save_policy(const char *calling_convention) {
0N/A char callconv;
0N/A
0N/A if (!strcmp(calling_convention, "NS")) callconv = 'N';
0N/A else if (!strcmp(calling_convention, "SOE")) callconv = 'E';
0N/A else if (!strcmp(calling_convention, "SOC")) callconv = 'C';
0N/A else if (!strcmp(calling_convention, "AS")) callconv = 'A';
0N/A else callconv = 'Z';
0N/A
0N/A return callconv;
0N/A}
0N/A
0N/A//---------------------------generate_assertion_checks-------------------
0N/Avoid ArchDesc::generate_adlc_verification(FILE *fp_cpp) {
0N/A fprintf(fp_cpp, "\n");
0N/A
0N/A fprintf(fp_cpp, "#ifndef PRODUCT\n");
0N/A fprintf(fp_cpp, "void Compile::adlc_verification() {\n");
0N/A globalDefs().print_asserts(fp_cpp);
0N/A fprintf(fp_cpp, "}\n");
0N/A fprintf(fp_cpp, "#endif\n");
0N/A fprintf(fp_cpp, "\n");
0N/A}
0N/A
0N/A//---------------------------addSourceBlocks-----------------------------
0N/Avoid ArchDesc::addSourceBlocks(FILE *fp_cpp) {
0N/A if (_source.count() > 0)
0N/A _source.output(fp_cpp);
0N/A
0N/A generate_adlc_verification(fp_cpp);
0N/A}
0N/A//---------------------------addHeaderBlocks-----------------------------
0N/Avoid ArchDesc::addHeaderBlocks(FILE *fp_hpp) {
0N/A if (_header.count() > 0)
0N/A _header.output(fp_hpp);
0N/A}
0N/A//-------------------------addPreHeaderBlocks----------------------------
0N/Avoid ArchDesc::addPreHeaderBlocks(FILE *fp_hpp) {
0N/A // Output #defines from definition block
0N/A globalDefs().print_defines(fp_hpp);
0N/A
0N/A if (_pre_header.count() > 0)
0N/A _pre_header.output(fp_hpp);
0N/A}
0N/A
0N/A//---------------------------buildReduceMaps-----------------------------
0N/A// Build mapping from enumeration for densely packed operands
0N/A// TO result and child types.
0N/Avoid ArchDesc::buildReduceMaps(FILE *fp_hpp, FILE *fp_cpp) {
0N/A RegDef *rdef;
0N/A RegDef *next;
0N/A
0N/A // The emit bodies currently require functions defined in the source block.
0N/A
0N/A // Build external declarations for mappings
0N/A fprintf(fp_hpp, "\n");
0N/A fprintf(fp_hpp, "extern const char register_save_policy[];\n");
0N/A fprintf(fp_hpp, "extern const char c_reg_save_policy[];\n");
0N/A fprintf(fp_hpp, "extern const int register_save_type[];\n");
0N/A fprintf(fp_hpp, "\n");
0N/A
0N/A // Construct Save-Policy array
0N/A fprintf(fp_cpp, "// Map from machine-independent register number to register_save_policy\n");
0N/A fprintf(fp_cpp, "const char register_save_policy[] = {\n");
0N/A _register->reset_RegDefs();
0N/A for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) {
0N/A next = _register->iter_RegDefs();
0N/A char policy = reg_save_policy(rdef->_callconv);
0N/A const char *comma = (next != NULL) ? "," : " // no trailing comma";
4033N/A fprintf(fp_cpp, " '%c'%s // %s\n", policy, comma, rdef->_regname);
0N/A }
0N/A fprintf(fp_cpp, "};\n\n");
0N/A
0N/A // Construct Native Save-Policy array
0N/A fprintf(fp_cpp, "// Map from machine-independent register number to c_reg_save_policy\n");
0N/A fprintf(fp_cpp, "const char c_reg_save_policy[] = {\n");
0N/A _register->reset_RegDefs();
0N/A for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) {
0N/A next = _register->iter_RegDefs();
0N/A char policy = reg_save_policy(rdef->_c_conv);
0N/A const char *comma = (next != NULL) ? "," : " // no trailing comma";
4033N/A fprintf(fp_cpp, " '%c'%s // %s\n", policy, comma, rdef->_regname);
0N/A }
0N/A fprintf(fp_cpp, "};\n\n");
0N/A
0N/A // Construct Register Save Type array
0N/A fprintf(fp_cpp, "// Map from machine-independent register number to register_save_type\n");
0N/A fprintf(fp_cpp, "const int register_save_type[] = {\n");
0N/A _register->reset_RegDefs();
0N/A for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) {
0N/A next = _register->iter_RegDefs();
0N/A const char *comma = (next != NULL) ? "," : " // no trailing comma";
0N/A fprintf(fp_cpp, " %s%s\n", rdef->_idealtype, comma);
0N/A }
0N/A fprintf(fp_cpp, "};\n\n");
0N/A
0N/A // Construct the table for reduceOp
0N/A OutputReduceOp output_reduce_op(fp_hpp, fp_cpp, _globalNames, *this);
0N/A build_map(output_reduce_op);
0N/A // Construct the table for leftOp
0N/A OutputLeftOp output_left_op(fp_hpp, fp_cpp, _globalNames, *this);
0N/A build_map(output_left_op);
0N/A // Construct the table for rightOp
0N/A OutputRightOp output_right_op(fp_hpp, fp_cpp, _globalNames, *this);
0N/A build_map(output_right_op);
0N/A // Construct the table of rule names
0N/A OutputRuleName output_rule_name(fp_hpp, fp_cpp, _globalNames, *this);
0N/A build_map(output_rule_name);
0N/A // Construct the boolean table for subsumed operands
0N/A OutputSwallowed output_swallowed(fp_hpp, fp_cpp, _globalNames, *this);
0N/A build_map(output_swallowed);
0N/A // // // Preserve in case we decide to use this table instead of another
0N/A //// Construct the boolean table for instruction chain rules
0N/A //OutputInstChainRule output_inst_chain(fp_hpp, fp_cpp, _globalNames, *this);
0N/A //build_map(output_inst_chain);
0N/A
0N/A}
0N/A
0N/A
0N/A//---------------------------buildMachOperGenerator---------------------------
0N/A
0N/A// Recurse through match tree, building path through corresponding state tree,
0N/A// Until we reach the constant we are looking for.
0N/Astatic void path_to_constant(FILE *fp, FormDict &globals,
0N/A MatchNode *mnode, uint idx) {
0N/A if ( ! mnode) return;
0N/A
0N/A unsigned position = 0;
0N/A const char *result = NULL;
0N/A const char *name = NULL;
0N/A const char *optype = NULL;
0N/A
0N/A // Base Case: access constant in ideal node linked to current state node
0N/A // Each type of constant has its own access function
0N/A if ( (mnode->_lChild == NULL) && (mnode->_rChild == NULL)
0N/A && mnode->base_operand(position, globals, result, name, optype) ) {
0N/A if ( strcmp(optype,"ConI") == 0 ) {
0N/A fprintf(fp, "_leaf->get_int()");
0N/A } else if ( (strcmp(optype,"ConP") == 0) ) {
0N/A fprintf(fp, "_leaf->bottom_type()->is_ptr()");
113N/A } else if ( (strcmp(optype,"ConN") == 0) ) {
113N/A fprintf(fp, "_leaf->bottom_type()->is_narrowoop()");
0N/A } else if ( (strcmp(optype,"ConF") == 0) ) {
0N/A fprintf(fp, "_leaf->getf()");
0N/A } else if ( (strcmp(optype,"ConD") == 0) ) {
0N/A fprintf(fp, "_leaf->getd()");
0N/A } else if ( (strcmp(optype,"ConL") == 0) ) {
0N/A fprintf(fp, "_leaf->get_long()");
0N/A } else if ( (strcmp(optype,"Con")==0) ) {
0N/A // !!!!! - Update if adding a machine-independent constant type
0N/A fprintf(fp, "_leaf->get_int()");
0N/A assert( false, "Unsupported constant type, pointer or indefinite");
0N/A } else if ( (strcmp(optype,"Bool") == 0) ) {
0N/A fprintf(fp, "_leaf->as_Bool()->_test._test");
0N/A } else {
0N/A assert( false, "Unsupported constant type");
0N/A }
0N/A return;
0N/A }
0N/A
0N/A // If constant is in left child, build path and recurse
0N/A uint lConsts = (mnode->_lChild) ? (mnode->_lChild->num_consts(globals) ) : 0;
0N/A uint rConsts = (mnode->_rChild) ? (mnode->_rChild->num_consts(globals) ) : 0;
0N/A if ( (mnode->_lChild) && (lConsts > idx) ) {
0N/A fprintf(fp, "_kids[0]->");
0N/A path_to_constant(fp, globals, mnode->_lChild, idx);
0N/A return;
0N/A }
0N/A // If constant is in right child, build path and recurse
0N/A if ( (mnode->_rChild) && (rConsts > (idx - lConsts) ) ) {
0N/A idx = idx - lConsts;
0N/A fprintf(fp, "_kids[1]->");
0N/A path_to_constant(fp, globals, mnode->_rChild, idx);
0N/A return;
0N/A }
0N/A assert( false, "ShouldNotReachHere()");
0N/A}
0N/A
0N/A// Generate code that is executed when generating a specific Machine Operand
0N/Astatic void genMachOperCase(FILE *fp, FormDict &globalNames, ArchDesc &AD,
0N/A OperandForm &op) {
0N/A const char *opName = op._ident;
0N/A const char *opEnumName = AD.machOperEnum(opName);
0N/A uint num_consts = op.num_consts(globalNames);
0N/A
0N/A // Generate the case statement for this opcode
0N/A fprintf(fp, " case %s:", opEnumName);
0N/A fprintf(fp, "\n return new (C) %sOper(", opName);
0N/A // Access parameters for constructor from the stat object
0N/A //
0N/A // Build access to condition code value
0N/A if ( (num_consts > 0) ) {
0N/A uint i = 0;
0N/A path_to_constant(fp, globalNames, op._matrule, i);
0N/A for ( i = 1; i < num_consts; ++i ) {
0N/A fprintf(fp, ", ");
0N/A path_to_constant(fp, globalNames, op._matrule, i);
0N/A }
0N/A }
0N/A fprintf(fp, " );\n");
0N/A}
0N/A
0N/A
0N/A// Build switch to invoke "new" MachNode or MachOper
0N/Avoid ArchDesc::buildMachOperGenerator(FILE *fp_cpp) {
0N/A int idx = 0;
0N/A
0N/A // Build switch to invoke 'new' for a specific MachOper
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp,
0N/A "//------------------------- MachOper Generator ---------------\n");
0N/A fprintf(fp_cpp,
0N/A "// A switch statement on the dense-packed user-defined type system\n"
0N/A "// that invokes 'new' on the corresponding class constructor.\n");
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "MachOper *State::MachOperGenerator");
0N/A fprintf(fp_cpp, "(int opcode, Compile* C)");
0N/A fprintf(fp_cpp, "{\n");
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, " switch(opcode) {\n");
0N/A
0N/A // Place all user-defined operands into the mapping
0N/A _operands.reset();
0N/A int opIndex = 0;
0N/A OperandForm *op;
0N/A for( ; (op = (OperandForm*)_operands.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( op->ideal_only() ) continue;
0N/A
0N/A genMachOperCase(fp_cpp, _globalNames, *this, *op);
0N/A };
0N/A
0N/A // Do not iterate over operand classes for the operand generator!!!
0N/A
0N/A // Place all internal operands into the mapping
0N/A _internalOpNames.reset();
0N/A const char *iopn;
0N/A for( ; (iopn = _internalOpNames.iter()) != NULL; ) {
0N/A const char *opEnumName = machOperEnum(iopn);
0N/A // Generate the case statement for this opcode
0N/A fprintf(fp_cpp, " case %s:", opEnumName);
0N/A fprintf(fp_cpp, " return NULL;\n");
0N/A };
0N/A
0N/A // Generate the default case for switch(opcode)
0N/A fprintf(fp_cpp, " \n");
0N/A fprintf(fp_cpp, " default:\n");
0N/A fprintf(fp_cpp, " fprintf(stderr, \"Default MachOper Generator invoked for: \\n\");\n");
0N/A fprintf(fp_cpp, " fprintf(stderr, \" opcode = %cd\\n\", opcode);\n", '%');
0N/A fprintf(fp_cpp, " break;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A
0N/A // Generate the closing for method Matcher::MachOperGenerator
0N/A fprintf(fp_cpp, " return NULL;\n");
0N/A fprintf(fp_cpp, "};\n");
0N/A}
0N/A
0N/A
0N/A//---------------------------buildMachNode-------------------------------------
0N/A// Build a new MachNode, for MachNodeGenerator or cisc-spilling
0N/Avoid ArchDesc::buildMachNode(FILE *fp_cpp, InstructForm *inst, const char *indent) {
0N/A const char *opType = NULL;
0N/A const char *opClass = inst->_ident;
0N/A
0N/A // Create the MachNode object
0N/A fprintf(fp_cpp, "%s %sNode *node = new (C) %sNode();\n",indent, opClass,opClass);
0N/A
0N/A if ( (inst->num_post_match_opnds() != 0) ) {
0N/A // Instruction that contains operands which are not in match rule.
0N/A //
0N/A // Check if the first post-match component may be an interesting def
0N/A bool dont_care = false;
0N/A ComponentList &comp_list = inst->_components;
0N/A Component *comp = NULL;
0N/A comp_list.reset();
0N/A if ( comp_list.match_iter() != NULL ) dont_care = true;
0N/A
0N/A // Insert operands that are not in match-rule.
0N/A // Only insert a DEF if the do_care flag is set
0N/A comp_list.reset();
0N/A while ( comp = comp_list.post_match_iter() ) {
0N/A // Check if we don't care about DEFs or KILLs that are not USEs
0N/A if ( dont_care && (! comp->isa(Component::USE)) ) {
0N/A continue;
0N/A }
0N/A dont_care = true;
0N/A // For each operand not in the match rule, call MachOperGenerator
2126N/A // with the enum for the opcode that needs to be built.
0N/A ComponentList clist = inst->_components;
4033N/A int index = clist.operand_position(comp->_name, comp->_usedef, inst);
0N/A const char *opcode = machOperEnum(comp->_type);
0N/A fprintf(fp_cpp, "%s node->set_opnd_array(%d, ", indent, index);
0N/A fprintf(fp_cpp, "MachOperGenerator(%s, C));\n", opcode);
0N/A }
0N/A }
0N/A else if ( inst->is_chain_of_constant(_globalNames, opType) ) {
0N/A // An instruction that chains from a constant!
0N/A // In this case, we need to subsume the constant into the node
0N/A // at operand position, oper_input_base().
0N/A //
0N/A // Fill in the constant
0N/A fprintf(fp_cpp, "%s node->_opnd_array[%d] = ", indent,
0N/A inst->oper_input_base(_globalNames));
0N/A // #####
0N/A // Check for multiple constants and then fill them in.
0N/A // Just like MachOperGenerator
0N/A const char *opName = inst->_matrule->_rChild->_opType;
0N/A fprintf(fp_cpp, "new (C) %sOper(", opName);
0N/A // Grab operand form
0N/A OperandForm *op = (_globalNames[opName])->is_operand();
0N/A // Look up the number of constants
0N/A uint num_consts = op->num_consts(_globalNames);
0N/A if ( (num_consts > 0) ) {
0N/A uint i = 0;
0N/A path_to_constant(fp_cpp, _globalNames, op->_matrule, i);
0N/A for ( i = 1; i < num_consts; ++i ) {
0N/A fprintf(fp_cpp, ", ");
0N/A path_to_constant(fp_cpp, _globalNames, op->_matrule, i);
0N/A }
0N/A }
0N/A fprintf(fp_cpp, " );\n");
0N/A // #####
0N/A }
0N/A
0N/A // Fill in the bottom_type where requested
1461N/A if ( inst->captures_bottom_type(_globalNames) ) {
0N/A fprintf(fp_cpp, "%s node->_bottom_type = _leaf->bottom_type();\n", indent);
0N/A }
0N/A if( inst->is_ideal_if() ) {
0N/A fprintf(fp_cpp, "%s node->_prob = _leaf->as_If()->_prob;\n", indent);
0N/A fprintf(fp_cpp, "%s node->_fcnt = _leaf->as_If()->_fcnt;\n", indent);
0N/A }
0N/A if( inst->is_ideal_fastlock() ) {
0N/A fprintf(fp_cpp, "%s node->_counters = _leaf->as_FastLock()->counters();\n", indent);
0N/A }
0N/A
0N/A}
0N/A
0N/A//---------------------------declare_cisc_version------------------------------
0N/A// Build CISC version of this instruction
0N/Avoid InstructForm::declare_cisc_version(ArchDesc &AD, FILE *fp_hpp) {
0N/A if( AD.can_cisc_spill() ) {
0N/A InstructForm *inst_cisc = cisc_spill_alternate();
0N/A if (inst_cisc != NULL) {
0N/A fprintf(fp_hpp, " virtual int cisc_operand() const { return %d; }\n", cisc_spill_operand());
0N/A fprintf(fp_hpp, " virtual MachNode *cisc_version(int offset, Compile* C);\n");
0N/A fprintf(fp_hpp, " virtual void use_cisc_RegMask();\n");
0N/A fprintf(fp_hpp, " virtual const RegMask *cisc_RegMask() const { return _cisc_RegMask; }\n");
0N/A }
0N/A }
0N/A}
0N/A
0N/A//---------------------------define_cisc_version-------------------------------
0N/A// Build CISC version of this instruction
0N/Abool InstructForm::define_cisc_version(ArchDesc &AD, FILE *fp_cpp) {
0N/A InstructForm *inst_cisc = this->cisc_spill_alternate();
0N/A if( AD.can_cisc_spill() && (inst_cisc != NULL) ) {
0N/A const char *name = inst_cisc->_ident;
0N/A assert( inst_cisc->num_opnds() == this->num_opnds(), "Must have same number of operands");
0N/A OperandForm *cisc_oper = AD.cisc_spill_operand();
0N/A assert( cisc_oper != NULL, "insanity check");
0N/A const char *cisc_oper_name = cisc_oper->_ident;
0N/A assert( cisc_oper_name != NULL, "insanity check");
0N/A //
0N/A // Set the correct reg_mask_or_stack for the cisc operand
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "void %sNode::use_cisc_RegMask() {\n", this->_ident);
0N/A // Lookup the correct reg_mask_or_stack
0N/A const char *reg_mask_name = cisc_reg_mask_name();
0N/A fprintf(fp_cpp, " _cisc_RegMask = &STACK_OR_%s;\n", reg_mask_name);
0N/A fprintf(fp_cpp, "}\n");
0N/A //
0N/A // Construct CISC version of this instruction
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "// Build CISC version of this instruction\n");
0N/A fprintf(fp_cpp, "MachNode *%sNode::cisc_version( int offset, Compile* C ) {\n", this->_ident);
0N/A // Create the MachNode object
0N/A fprintf(fp_cpp, " %sNode *node = new (C) %sNode();\n", name, name);
0N/A // Fill in the bottom_type where requested
1461N/A if ( this->captures_bottom_type(AD.globalNames()) ) {
0N/A fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n");
0N/A }
785N/A
785N/A uint cur_num_opnds = num_opnds();
785N/A if (cur_num_opnds > 1 && cur_num_opnds != num_unique_opnds()) {
785N/A fprintf(fp_cpp," node->_num_opnds = %d;\n", num_unique_opnds());
785N/A }
785N/A
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, " // Copy _idx, inputs and operands to new node\n");
0N/A fprintf(fp_cpp, " fill_new_machnode(node, C);\n");
0N/A // Construct operand to access [stack_pointer + offset]
0N/A fprintf(fp_cpp, " // Construct operand to access [stack_pointer + offset]\n");
0N/A fprintf(fp_cpp, " node->set_opnd_array(cisc_operand(), new (C) %sOper(offset));\n", cisc_oper_name);
0N/A fprintf(fp_cpp, "\n");
0N/A
0N/A // Return result and exit scope
0N/A fprintf(fp_cpp, " return node;\n");
0N/A fprintf(fp_cpp, "}\n");
0N/A fprintf(fp_cpp, "\n");
0N/A return true;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A//---------------------------declare_short_branch_methods----------------------
0N/A// Build prototypes for short branch methods
0N/Avoid InstructForm::declare_short_branch_methods(FILE *fp_hpp) {
0N/A if (has_short_branch_form()) {
0N/A fprintf(fp_hpp, " virtual MachNode *short_branch_version(Compile* C);\n");
0N/A }
0N/A}
0N/A
0N/A//---------------------------define_short_branch_methods-----------------------
0N/A// Build definitions for short branch methods
1461N/Abool InstructForm::define_short_branch_methods(ArchDesc &AD, FILE *fp_cpp) {
0N/A if (has_short_branch_form()) {
0N/A InstructForm *short_branch = short_branch_form();
0N/A const char *name = short_branch->_ident;
0N/A
0N/A // Construct short_branch_version() method.
0N/A fprintf(fp_cpp, "// Build short branch version of this instruction\n");
0N/A fprintf(fp_cpp, "MachNode *%sNode::short_branch_version(Compile* C) {\n", this->_ident);
0N/A // Create the MachNode object
0N/A fprintf(fp_cpp, " %sNode *node = new (C) %sNode();\n", name, name);
0N/A if( is_ideal_if() ) {
0N/A fprintf(fp_cpp, " node->_prob = _prob;\n");
0N/A fprintf(fp_cpp, " node->_fcnt = _fcnt;\n");
0N/A }
0N/A // Fill in the bottom_type where requested
1461N/A if ( this->captures_bottom_type(AD.globalNames()) ) {
0N/A fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n");
0N/A }
0N/A
0N/A fprintf(fp_cpp, "\n");
0N/A // Short branch version must use same node index for access
0N/A // through allocator's tables
0N/A fprintf(fp_cpp, " // Copy _idx, inputs and operands to new node\n");
0N/A fprintf(fp_cpp, " fill_new_machnode(node, C);\n");
0N/A
0N/A // Return result and exit scope
0N/A fprintf(fp_cpp, " return node;\n");
0N/A fprintf(fp_cpp, "}\n");
0N/A fprintf(fp_cpp,"\n");
0N/A return true;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A
0N/A//---------------------------buildMachNodeGenerator----------------------------
0N/A// Build switch to invoke appropriate "new" MachNode for an opcode
0N/Avoid ArchDesc::buildMachNodeGenerator(FILE *fp_cpp) {
0N/A
0N/A // Build switch to invoke 'new' for a specific MachNode
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp,
0N/A "//------------------------- MachNode Generator ---------------\n");
0N/A fprintf(fp_cpp,
0N/A "// A switch statement on the dense-packed user-defined type system\n"
0N/A "// that invokes 'new' on the corresponding class constructor.\n");
0N/A fprintf(fp_cpp, "\n");
0N/A fprintf(fp_cpp, "MachNode *State::MachNodeGenerator");
0N/A fprintf(fp_cpp, "(int opcode, Compile* C)");
0N/A fprintf(fp_cpp, "{\n");
0N/A fprintf(fp_cpp, " switch(opcode) {\n");
0N/A
0N/A // Provide constructor for all user-defined instructions
0N/A _instructions.reset();
0N/A int opIndex = operandFormCount();
0N/A InstructForm *inst;
0N/A for( ; (inst = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure that matrule is defined.
0N/A if ( inst->_matrule == NULL ) continue;
0N/A
0N/A int opcode = opIndex++;
0N/A const char *opClass = inst->_ident;
0N/A char *opType = NULL;
0N/A
0N/A // Generate the case statement for this instruction
0N/A fprintf(fp_cpp, " case %s_rule:", opClass);
0N/A
0N/A // Start local scope
4033N/A fprintf(fp_cpp, " {\n");
0N/A // Generate code to construct the new MachNode
0N/A buildMachNode(fp_cpp, inst, " ");
0N/A // Return result and exit scope
0N/A fprintf(fp_cpp, " return node;\n");
0N/A fprintf(fp_cpp, " }\n");
0N/A }
0N/A
0N/A // Generate the default case for switch(opcode)
0N/A fprintf(fp_cpp, " \n");
0N/A fprintf(fp_cpp, " default:\n");
0N/A fprintf(fp_cpp, " fprintf(stderr, \"Default MachNode Generator invoked for: \\n\");\n");
0N/A fprintf(fp_cpp, " fprintf(stderr, \" opcode = %cd\\n\", opcode);\n", '%');
0N/A fprintf(fp_cpp, " break;\n");
0N/A fprintf(fp_cpp, " };\n");
0N/A
0N/A // Generate the closing for method Matcher::MachNodeGenerator
0N/A fprintf(fp_cpp, " return NULL;\n");
0N/A fprintf(fp_cpp, "}\n");
0N/A}
0N/A
0N/A
0N/A//---------------------------buildInstructMatchCheck--------------------------
0N/A// Output the method to Matcher which checks whether or not a specific
0N/A// instruction has a matching rule for the host architecture.
0N/Avoid ArchDesc::buildInstructMatchCheck(FILE *fp_cpp) const {
0N/A fprintf(fp_cpp, "\n\n");
0N/A fprintf(fp_cpp, "const bool Matcher::has_match_rule(int opcode) {\n");
0N/A fprintf(fp_cpp, " assert(_last_machine_leaf < opcode && opcode < _last_opcode, \"opcode in range\");\n");
0N/A fprintf(fp_cpp, " return _hasMatchRule[opcode];\n");
0N/A fprintf(fp_cpp, "}\n\n");
0N/A
0N/A fprintf(fp_cpp, "const bool Matcher::_hasMatchRule[_last_opcode] = {\n");
0N/A int i;
0N/A for (i = 0; i < _last_opcode - 1; i++) {
0N/A fprintf(fp_cpp, " %-5s, // %s\n",
0N/A _has_match_rule[i] ? "true" : "false",
0N/A NodeClassNames[i]);
0N/A }
0N/A fprintf(fp_cpp, " %-5s // %s\n",
0N/A _has_match_rule[i] ? "true" : "false",
0N/A NodeClassNames[i]);
0N/A fprintf(fp_cpp, "};\n");
0N/A}
0N/A
0N/A//---------------------------buildFrameMethods---------------------------------
0N/A// Output the methods to Matcher which specify frame behavior
0N/Avoid ArchDesc::buildFrameMethods(FILE *fp_cpp) {
0N/A fprintf(fp_cpp,"\n\n");
0N/A // Stack Direction
0N/A fprintf(fp_cpp,"bool Matcher::stack_direction() const { return %s; }\n\n",
0N/A _frame->_direction ? "true" : "false");
0N/A // Sync Stack Slots
0N/A fprintf(fp_cpp,"int Compile::sync_stack_slots() const { return %s; }\n\n",
0N/A _frame->_sync_stack_slots);
0N/A // Java Stack Alignment
0N/A fprintf(fp_cpp,"uint Matcher::stack_alignment_in_bytes() { return %s; }\n\n",
0N/A _frame->_alignment);
0N/A // Java Return Address Location
0N/A fprintf(fp_cpp,"OptoReg::Name Matcher::return_addr() const {");
0N/A if (_frame->_return_addr_loc) {
0N/A fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n",
0N/A _frame->_return_addr);
0N/A }
0N/A else {
0N/A fprintf(fp_cpp," return OptoReg::stack2reg(%s); }\n\n",
0N/A _frame->_return_addr);
0N/A }
0N/A // Java Stack Slot Preservation
0N/A fprintf(fp_cpp,"uint Compile::in_preserve_stack_slots() ");
0N/A fprintf(fp_cpp,"{ return %s; }\n\n", _frame->_in_preserve_slots);
0N/A // Top Of Stack Slot Preservation, for both Java and C
0N/A fprintf(fp_cpp,"uint Compile::out_preserve_stack_slots() ");
0N/A fprintf(fp_cpp,"{ return SharedRuntime::out_preserve_stack_slots(); }\n\n");
0N/A // varargs C out slots killed
0N/A fprintf(fp_cpp,"uint Compile::varargs_C_out_slots_killed() const ");
0N/A fprintf(fp_cpp,"{ return %s; }\n\n", _frame->_varargs_C_out_slots_killed);
0N/A // Java Argument Position
0N/A fprintf(fp_cpp,"void Matcher::calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length, bool is_outgoing) {\n");
0N/A fprintf(fp_cpp,"%s\n", _frame->_calling_convention);
0N/A fprintf(fp_cpp,"}\n\n");
0N/A // Native Argument Position
0N/A fprintf(fp_cpp,"void Matcher::c_calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length) {\n");
0N/A fprintf(fp_cpp,"%s\n", _frame->_c_calling_convention);
0N/A fprintf(fp_cpp,"}\n\n");
0N/A // Java Return Value Location
0N/A fprintf(fp_cpp,"OptoRegPair Matcher::return_value(int ideal_reg, bool is_outgoing) {\n");
0N/A fprintf(fp_cpp,"%s\n", _frame->_return_value);
0N/A fprintf(fp_cpp,"}\n\n");
0N/A // Native Return Value Location
0N/A fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(int ideal_reg, bool is_outgoing) {\n");
0N/A fprintf(fp_cpp,"%s\n", _frame->_c_return_value);
0N/A fprintf(fp_cpp,"}\n\n");
0N/A
0N/A // Inline Cache Register, mask definition, and encoding
0N/A fprintf(fp_cpp,"OptoReg::Name Matcher::inline_cache_reg() {");
0N/A fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n",
0N/A _frame->_inline_cache_reg);
0N/A fprintf(fp_cpp,"int Matcher::inline_cache_reg_encode() {");
0N/A fprintf(fp_cpp," return _regEncode[inline_cache_reg()]; }\n\n");
0N/A
0N/A // Interpreter's Method Oop Register, mask definition, and encoding
0N/A fprintf(fp_cpp,"OptoReg::Name Matcher::interpreter_method_oop_reg() {");
0N/A fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n",
0N/A _frame->_interpreter_method_oop_reg);
0N/A fprintf(fp_cpp,"int Matcher::interpreter_method_oop_reg_encode() {");
0N/A fprintf(fp_cpp," return _regEncode[interpreter_method_oop_reg()]; }\n\n");
0N/A
0N/A // Interpreter's Frame Pointer Register, mask definition, and encoding
0N/A fprintf(fp_cpp,"OptoReg::Name Matcher::interpreter_frame_pointer_reg() {");
0N/A if (_frame->_interpreter_frame_pointer_reg == NULL)
0N/A fprintf(fp_cpp," return OptoReg::Bad; }\n\n");
0N/A else
0N/A fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n",
0N/A _frame->_interpreter_frame_pointer_reg);
0N/A
0N/A // Frame Pointer definition
0N/A /* CNC - I can not contemplate having a different frame pointer between
0N/A Java and native code; makes my head hurt to think about it.
0N/A fprintf(fp_cpp,"OptoReg::Name Matcher::frame_pointer() const {");
0N/A fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n",
0N/A _frame->_frame_pointer);
0N/A */
0N/A // (Native) Frame Pointer definition
0N/A fprintf(fp_cpp,"OptoReg::Name Matcher::c_frame_pointer() const {");
0N/A fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n",
0N/A _frame->_frame_pointer);
0N/A
0N/A // Number of callee-save + always-save registers for calling convention
0N/A fprintf(fp_cpp, "// Number of callee-save + always-save registers\n");
0N/A fprintf(fp_cpp, "int Matcher::number_of_saved_registers() {\n");
0N/A RegDef *rdef;
0N/A int nof_saved_registers = 0;
0N/A _register->reset_RegDefs();
0N/A while( (rdef = _register->iter_RegDefs()) != NULL ) {
0N/A if( !strcmp(rdef->_callconv, "SOE") || !strcmp(rdef->_callconv, "AS") )
0N/A ++nof_saved_registers;
0N/A }
0N/A fprintf(fp_cpp, " return %d;\n", nof_saved_registers);
0N/A fprintf(fp_cpp, "};\n\n");
0N/A}
0N/A
0N/A
0N/A
0N/A
0N/Astatic int PrintAdlcCisc = 0;
0N/A//---------------------------identify_cisc_spilling----------------------------
0N/A// Get info for the CISC_oracle and MachNode::cisc_version()
0N/Avoid ArchDesc::identify_cisc_spill_instructions() {
0N/A
4033N/A if (_frame == NULL)
4033N/A return;
4033N/A
0N/A // Find the user-defined operand for cisc-spilling
0N/A if( _frame->_cisc_spilling_operand_name != NULL ) {
0N/A const Form *form = _globalNames[_frame->_cisc_spilling_operand_name];
0N/A OperandForm *oper = form ? form->is_operand() : NULL;
0N/A // Verify the user's suggestion
0N/A if( oper != NULL ) {
0N/A // Ensure that match field is defined.
0N/A if ( oper->_matrule != NULL ) {
0N/A MatchRule &mrule = *oper->_matrule;
0N/A if( strcmp(mrule._opType,"AddP") == 0 ) {
0N/A MatchNode *left = mrule._lChild;
0N/A MatchNode *right= mrule._rChild;
0N/A if( left != NULL && right != NULL ) {
0N/A const Form *left_op = _globalNames[left->_opType]->is_operand();
0N/A const Form *right_op = _globalNames[right->_opType]->is_operand();
0N/A if( (left_op != NULL && right_op != NULL)
0N/A && (left_op->interface_type(_globalNames) == Form::register_interface)
0N/A && (right_op->interface_type(_globalNames) == Form::constant_interface) ) {
0N/A // Successfully verified operand
0N/A set_cisc_spill_operand( oper );
0N/A if( _cisc_spill_debug ) {
0N/A fprintf(stderr, "\n\nVerified CISC-spill operand %s\n\n", oper->_ident);
0N/A }
0N/A }
0N/A }
0N/A }
0N/A }
0N/A }
0N/A }
0N/A
0N/A if( cisc_spill_operand() != NULL ) {
0N/A // N^2 comparison of instructions looking for a cisc-spilling version
0N/A _instructions.reset();
0N/A InstructForm *instr;
0N/A for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure that match field is defined.
0N/A if ( instr->_matrule == NULL ) continue;
0N/A
0N/A MatchRule &mrule = *instr->_matrule;
0N/A Predicate *pred = instr->build_predicate();
0N/A
0N/A // Grab the machine type of the operand
0N/A const char *rootOp = instr->_ident;
0N/A mrule._machType = rootOp;
0N/A
0N/A // Find result type for match
0N/A const char *result = instr->reduce_result();
0N/A
0N/A if( PrintAdlcCisc ) fprintf(stderr, " new instruction %s \n", instr->_ident ? instr->_ident : " ");
0N/A bool found_cisc_alternate = false;
0N/A _instructions.reset2();
0N/A InstructForm *instr2;
0N/A for( ; !found_cisc_alternate && (instr2 = (InstructForm*)_instructions.iter2()) != NULL; ) {
0N/A // Ensure that match field is defined.
0N/A if( PrintAdlcCisc ) fprintf(stderr, " instr2 == %s \n", instr2->_ident ? instr2->_ident : " ");
0N/A if ( instr2->_matrule != NULL
0N/A && (instr != instr2 ) // Skip self
0N/A && (instr2->reduce_result() != NULL) // want same result
0N/A && (strcmp(result, instr2->reduce_result()) == 0)) {
0N/A MatchRule &mrule2 = *instr2->_matrule;
0N/A Predicate *pred2 = instr2->build_predicate();
0N/A found_cisc_alternate = instr->cisc_spills_to(*this, instr2);
0N/A }
0N/A }
0N/A }
0N/A }
0N/A}
0N/A
0N/A//---------------------------build_cisc_spilling-------------------------------
0N/A// Get info for the CISC_oracle and MachNode::cisc_version()
0N/Avoid ArchDesc::build_cisc_spill_instructions(FILE *fp_hpp, FILE *fp_cpp) {
0N/A // Output the table for cisc spilling
0N/A fprintf(fp_cpp, "// The following instructions can cisc-spill\n");
0N/A _instructions.reset();
0N/A InstructForm *inst = NULL;
0N/A for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) {
0N/A // Ensure this is a machine-world instruction
0N/A if ( inst->ideal_only() ) continue;
0N/A const char *inst_name = inst->_ident;
0N/A int operand = inst->cisc_spill_operand();
0N/A if( operand != AdlcVMDeps::Not_cisc_spillable ) {
0N/A InstructForm *inst2 = inst->cisc_spill_alternate();
0N/A fprintf(fp_cpp, "// %s can cisc-spill operand %d to %s\n", inst->_ident, operand, inst2->_ident);
0N/A }
0N/A }
0N/A fprintf(fp_cpp, "\n\n");
0N/A}
0N/A
0N/A//---------------------------identify_short_branches----------------------------
0N/A// Get info for our short branch replacement oracle.
0N/Avoid ArchDesc::identify_short_branches() {
0N/A // Walk over all instructions, checking to see if they match a short
0N/A // branching alternate.
0N/A _instructions.reset();
0N/A InstructForm *instr;
0N/A while( (instr = (InstructForm*)_instructions.iter()) != NULL ) {
0N/A // The instruction must have a match rule.
0N/A if (instr->_matrule != NULL &&
0N/A instr->is_short_branch()) {
0N/A
0N/A _instructions.reset2();
0N/A InstructForm *instr2;
0N/A while( (instr2 = (InstructForm*)_instructions.iter2()) != NULL ) {
0N/A instr2->check_branch_variant(*this, instr);
0N/A }
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/A//---------------------------identify_unique_operands---------------------------
0N/A// Identify unique operands.
0N/Avoid ArchDesc::identify_unique_operands() {
0N/A // Walk over all instructions.
0N/A _instructions.reset();
0N/A InstructForm *instr;
0N/A while( (instr = (InstructForm*)_instructions.iter()) != NULL ) {
0N/A // Ensure this is a machine-world instruction
0N/A if (!instr->ideal_only()) {
0N/A instr->set_unique_opnds();
0N/A }
0N/A }
0N/A}