3845N/A * Copyright (c) 2007, 2012, Oracle and/or its affiliates. All rights reserved. 0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 0N/A * This code is free software; you can redistribute it and/or modify it 0N/A * under the terms of the GNU General Public License version 2 only, as 0N/A * published by the Free Software Foundation. 0N/A * This code is distributed in the hope that it will be useful, but WITHOUT 0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 0N/A * version 2 for more details (a copy is included in the LICENSE file that 0N/A * accompanied this code). 0N/A * You should have received a copy of the GNU General Public License version 0N/A * 2 along with this work; if not, write to the Free Software Foundation, 0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 4024N/A//------------------------------VectorNode------------------------------------- 3969N/A // [Start, end) half-open range defining which operands are vectors 4024N/A//===========================Vector=ALU=Operations============================= 4024N/A//------------------------------AddVBNode-------------------------------------- 4024N/A//------------------------------AddVSNode-------------------------------------- 4024N/A//------------------------------AddVINode-------------------------------------- 4024N/A//------------------------------AddVLNode-------------------------------------- 4024N/A//------------------------------AddVFNode-------------------------------------- 4024N/A//------------------------------AddVDNode-------------------------------------- 4024N/A//------------------------------SubVBNode-------------------------------------- 0N/A// Vector subtract byte 4024N/A//------------------------------SubVSNode-------------------------------------- 0N/A// Vector subtract short 4024N/A//------------------------------SubVINode-------------------------------------- 0N/A// Vector subtract int 4024N/A//------------------------------SubVLNode-------------------------------------- 0N/A// Vector subtract long 4024N/A//------------------------------SubVFNode-------------------------------------- 0N/A// Vector subtract float 4024N/A//------------------------------SubVDNode-------------------------------------- 0N/A// Vector subtract double 4024N/A//------------------------------MulVSNode-------------------------------------- 4024N/A//------------------------------MulVINode-------------------------------------- 4024N/A//------------------------------MulVFNode-------------------------------------- 0N/A// Vector multiply float 4024N/A//------------------------------MulVDNode-------------------------------------- 0N/A// Vector multiply double 4024N/A//------------------------------DivVFNode-------------------------------------- 0N/A// Vector divide float 4024N/A//------------------------------DivVDNode-------------------------------------- 0N/A// Vector Divide double 4024N/A//------------------------------LShiftVBNode----------------------------------- 4024N/A//------------------------------LShiftVSNode----------------------------------- 4024N/A//------------------------------LShiftVINode----------------------------------- 4024N/A//------------------------------LShiftVLNode----------------------------------- 4024N/A//------------------------------RShiftVBNode----------------------------------- 3964N/A// Vector right arithmetic (signed) shift bytes 4024N/A//------------------------------RShiftVSNode----------------------------------- 3964N/A// Vector right arithmetic (signed) shift shorts 4024N/A//------------------------------RShiftVINode----------------------------------- 3964N/A// Vector right arithmetic (signed) shift ints 4024N/A//------------------------------RShiftVLNode----------------------------------- 3964N/A// Vector right arithmetic (signed) shift longs 4024N/A//------------------------------URShiftVBNode---------------------------------- 3964N/A// Vector right logical (unsigned) shift bytes 4024N/A//------------------------------URShiftVSNode---------------------------------- 3964N/A// Vector right logical (unsigned) shift shorts 4024N/A//------------------------------URShiftVINode---------------------------------- 3964N/A// Vector right logical (unsigned) shift ints 4024N/A//------------------------------URShiftVLNode---------------------------------- 3964N/A// Vector right logical (unsigned) shift longs 4024N/A//------------------------------LShiftCntVNode--------------------------------- 4024N/A//------------------------------RShiftCntVNode--------------------------------- 0N/A//------------------------------AndVNode--------------------------------------- 0N/A//------------------------------OrVNode--------------------------------------- 0N/A//------------------------------XorVNode--------------------------------------- 3845N/A//================================= M E M O R Y =============================== 3845N/A//------------------------------LoadVectorNode--------------------------------- 3845N/A//------------------------------StoreVectorNode-------------------------------- 3845N/A//=========================Promote_Scalar_to_Vector============================ 3845N/A//------------------------------ReplicateBNode--------------------------------- 3845N/A// Replicate byte scalar to be vector 3845N/A//------------------------------ReplicateSNode--------------------------------- 3845N/A// Replicate short scalar to be vector 3845N/A//------------------------------ReplicateINode--------------------------------- 3845N/A// Replicate int scalar to be vector 3845N/A//------------------------------ReplicateLNode--------------------------------- 3845N/A// Replicate long scalar to be vector 3845N/A//------------------------------ReplicateFNode--------------------------------- 3845N/A// Replicate float scalar to be vector 3845N/A//------------------------------ReplicateDNode--------------------------------- 3845N/A// Replicate double scalar to be vector 3845N/A//========================Pack_Scalars_into_a_Vector=========================== 0N/A//------------------------------PackNode--------------------------------------- 0N/A// Pack parent class (not for code generation). 0N/A // Create a binary tree form for Packs. [lo, hi) (half-open) range 4024N/A//------------------------------PackBNode-------------------------------------- 0N/A// Pack byte scalars into vector 4024N/A//------------------------------PackSNode-------------------------------------- 0N/A// Pack short scalars into a vector 4024N/A//------------------------------PackINode-------------------------------------- 0N/A// Pack integer scalars into a vector 4024N/A//------------------------------PackLNode-------------------------------------- 0N/A// Pack long scalars into a vector 4024N/A//------------------------------Pack2LNode------------------------------------- 3845N/A// Pack 2 long scalars into a vector 4024N/A//------------------------------PackFNode-------------------------------------- 0N/A// Pack float scalars into vector 4024N/A//------------------------------PackDNode-------------------------------------- 0N/A// Pack double scalars into a vector 4024N/A//------------------------------Pack2DNode------------------------------------- 3845N/A// Pack 2 double scalars into a vector 4024N/A//========================Extract_Scalar_from_Vector=========================== 4024N/A//------------------------------ExtractNode------------------------------------ 0N/A// Extract a scalar from a vector at position "pos" 4024N/A//------------------------------ExtractBNode----------------------------------- 0N/A// Extract a byte from a vector at position "pos" 4024N/A//------------------------------ExtractUBNode---------------------------------- 3845N/A// Extract a boolean from a vector at position "pos" 4024N/A//------------------------------ExtractCNode----------------------------------- 0N/A// Extract a char from a vector at position "pos" 4024N/A//------------------------------ExtractSNode----------------------------------- 0N/A// Extract a short from a vector at position "pos" 4024N/A//------------------------------ExtractINode----------------------------------- 0N/A// Extract an int from a vector at position "pos" 4024N/A//------------------------------ExtractLNode----------------------------------- 0N/A// Extract a long from a vector at position "pos" 4024N/A//------------------------------ExtractFNode----------------------------------- 0N/A// Extract a float from a vector at position "pos" 4024N/A//------------------------------ExtractDNode----------------------------------- 0N/A// Extract a double from a vector at position "pos" 1879N/A#
endif // SHARE_VM_OPTO_VECTORNODE_HPP