Searched defs:bit (Results 101 - 125 of 147) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/audio/drv/audioemu10k/
H A Daudioemu10k.c118 * be modified to support full 32-bit addressing. (And again, SB Live!
501 int offs, bit; local
504 bit = voice % 32;
508 tmp &= ~(1 << bit);
511 tmp |= (1 << bit);
605 sample = 0; /* 16 bit silence */
/illumos-gate/usr/src/uts/common/io/audio/impl/
H A Daudio_oss.c134 int bit; local
308 bit = 0;
314 name, desc.acd_enum[bit]);
317 desc.acd_enum[bit]);
325 ext->enumbit = bit;
330 bit++;
350 bit = 0;
353 ext->enum_present[bit / 8] |=
354 (1 << (bit % 8));
357 bit
2019 int bit; local
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/illumos-gate/usr/src/uts/common/io/bfe/
H A Dbfe.c311 bfe_wait_bit(bfe_t *bfe, uint32_t reg, uint32_t bit, argument
320 if (clear && !(v & bit))
323 if (!clear && (v & bit))
/illumos-gate/usr/src/uts/common/io/dmfe/
H A Ddmfe_main.c57 * speed & simplicity at the cost of a bit more memory.
100 * TX_FILTER_TYPE1 bit will cause a switchover to using
557 * The error summary bit and the error bits that it summarises
591 * error. Strangely, it doesn't set the packet error summary bit,
897 int bit = index % NBBY; local
900 if (dmfep->tx_mcast[byt] & bit) {
901 dmfep->tx_mcast[byt] &= ~bit;
904 } else if (dmfep->tx_bcast[byt] & bit) {
905 dmfep->tx_bcast[byt] &= ~bit;
1200 * Find the index of the relevant bit i
1213 int bit; local
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/illumos-gate/usr/src/uts/common/pcmcia/cs/
H A Dcs.c1098 * shares the same bit position. If this ever changes,
3011 * This function returns a bit mask of events.
3428 uint32_t bit = 0; local
3433 switch (event = CS_BIT_GET(client->events, bit)) {
3544 CS_BIT_CLEAR(client->events, bit);
3546 bit++;
4233 * have to set the SBM_BVD1 enable bit in the
4286 * PRR or that the READY bit in the PRR isn't
4287 * valid, then we simulate the READY bit by
/illumos-gate/usr/src/uts/i86pc/io/apix/
H A Dapix.c438 * Setting the 12th bit in the Spurious Interrupt Vector
452 * write a valid vector to LVT entries along with the mask bit
575 * bit on without clearing it with EOI. Since softint
1446 int bit, index, irr, pending; local
1453 bit = vecp->v_vector % 32;
1459 pending = (irr & (1 << bit)) ? 1 : 0;
1640 /* Restore mask bit */
1892 * Wait for the delivery status bit to be cleared. This should
1979 * If we waited and the Remote IRR bit is still not cleared,
1985 * Trying to clear the bit throug
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/illumos-gate/usr/src/uts/common/io/pciex/
H A Dpcie_fault.c65 #define PF_FIRST_AER_ERR(bit, adv) \
66 (bit & (1 << (adv->pcie_adv_ctl & PCIE_AER_CTL_FST_ERR_PTR_MASK)))
68 #define HAS_AER_LOGS(pfd_p, bit) \
70 PF_FIRST_AER_ERR(bit, PCIE_ADV_REG(pfd_p)))
72 #define PF_FIRST_SAER_ERR(bit, adv) \
73 (bit & (1 << (adv->pcie_sue_ctl & PCIE_AER_SCTL_FST_ERR_PTR_MASK)))
75 #define HAS_SAER_LOGS(pfd_p, bit) \
77 PF_FIRST_SAER_ERR(bit, PCIE_ADV_BDG_REG(pfd_p)))
88 uint32_t bit; /* Error bit */ member in struct:pf_fab_err_tbl
1471 uint32_t bit; local
1517 pf_analyse_ca_ur(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1560 pf_analyse_ma_ta(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1598 pf_analyse_pci(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1672 pf_analyse_perr_assert(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1772 pf_analyse_ptlp(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1864 pf_analyse_sc(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1893 pf_analyse_to(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1909 pf_analyse_uc(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1936 pf_analyse_uc_data(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1955 pf_no_panic(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
1963 pf_panic(ddi_fm_error_t *derr, uint32_t bit, pf_data_t *dq_head_p, pf_data_t *pfd_p) argument
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H A Dpcieb.c390 * If PCIE_LINKCTL_LINK_DISABLE bit in the PCIe Config
1436 * Some PCI-X to PCI-E bridges do not support full 64-bit addressing on the
1706 pcieb_dbg(uint_t bit, dev_info_t *dip, char *fmt, ...) argument
1715 ddi_get_instance(dip), pcieb_debug_sym[bit]);
1742 * first-in-chassis bit.
1819 * Create ranges for 32bit memory space
/illumos-gate/usr/src/uts/common/io/vr/
H A Dvr.c1564 * for this packet. The Interrupt Control (IC) bit in the transmit
1567 * more obscure interrupt suppress bit which is probably part of the
1999 * 48-bit Ethernet address. Incoming frames with multicast destination
2005 * significant 9 bits of the result as a bit index into the table. If the
2006 * indexed bit is set, the frame is accepted. If the bit is cleared, the frame
2019 * matching cell address (index) and compares this to the bit position in the
2020 * cam mask. If the bit is set, the packet is passed up. If CAM lookup does not
2087 * Disable the corresponding mask bit.
2123 * Turn bit[crc_inde
2175 uint32_t bit; local
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/illumos-gate/usr/src/uts/common/io/yge/
H A Dyge.c727 /* is error bit status stuck? */
1589 * It seems that Yukon II supports full 64 bit DMA operations.
1590 * But we limit it to 32 bits only for now. The 64 bit
2102 * Y2_IS_MST_ERR) or Target Abort (Y2_IS_IRQ_STAT) bit and
2546 * Disable Force Sync bit and Alloc bit in Tx RAM interface
2816 * When GM_PAR_MIB_CLR bit of GM_PHY_ADDR is set, reading lower
2923 int bit; local
2930 for (data = *addr++, bit = 0; bit <
3121 int bit; local
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/illumos-gate/usr/src/uts/common/io/mxfe/
H A Dmxfe.c1568 mxfe_miiwritebit(mxfe_t *mxfep, uint8_t bit) argument
1570 unsigned val = bit ? SPR_MII_DOUT : 0;
1581 uint8_t bit; local
1584 bit = (GETCSR(mxfep, CSR_SPR) & SPR_MII_DIN) ? 1 : 0;
1587 return (bit);
1607 /* send the 32 bit preamble */
1620 /* next we send the 5 bit phy address */
1625 /* the 5 bit register address goes next */
1634 /* read the 16 bit register value */
1676 /* send the 32 bit preambl
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/illumos-gate/usr/src/uts/sun4u/starcat/sys/
H A Daxq.h250 } bit; member in union:__anon10001
263 } bit; member in union:__anon10002
/illumos-gate/usr/src/uts/common/rpc/sec_gss/
H A Dsvc_rpcsec_gss.c416 uint_t bit; local
450 * If within sequence window, set the bit corresponding to it
454 bit = j > 0 ? (1 << j) : 1;
456 if (cl->seq_bits[i] & bit) {
460 cl->seq_bits[i] |= bit;
1546 * The client context handle is a 32-bit key (unsigned int).
/illumos-gate/usr/src/uts/common/fs/smbsrv/
H A Dsmb_kutil.c295 uint8_t bit; local
309 bit = pool->id_bit;
312 while (bit) {
313 if (byte & bit) {
314 bit = bit << 1;
318 pool->id_pool[pool->id_idx] |= bit;
321 pool->id_bit = bit;
/illumos-gate/usr/src/uts/common/io/arn/
H A Darn_main.c1113 * RXE bit is written, but it doesn't work
1170 * Clear RxAbort bit so that we can
2127 * interrupt when the TIM bit is set. For hardware
2337 uint32_t val, index, bit; local
2343 /* calculate XOR of eight 6bit values */
2350 bit = 1 << (pos % 32);
2354 mfilt[index] |= bit;
2357 mfilt[index] &= ~bit;
/illumos-gate/usr/src/uts/common/io/bge/
H A Dbge_main2.c1307 * Compute the index of the required bit in the multicast hash map.
1331 uint32_t bit; local
1343 bit = 1 << (index % 32u);
1347 hash, index, word, bit, *refp));
1350 * We must set the appropriate bit in the hash map (and the
1365 bgep->mcast_hash[word] |= bit;
1383 bgep->mcast_hash[word] &= ~bit;
/illumos-gate/usr/src/cmd/sgs/libconv/common/
H A Dcorenote.c1083 * Note: core_content_t is a 64-bit integer value, but our
1084 * conv_expn_field() logic is all built around 32-bit
1086 * but for now, we make do with the 32-bit engine. This works
1321 * However, SMSACCT and SSYS are special, and their bit values
1452 * system calls (sysset_t). These types use arrays of unsigned 32-bit
1467 * n_mask - # of 32-bit masks that make up this bitmask type.
1468 * maskarr - Array of n_mask 32-bit mask values
1484 /* If every bit of every mask is 0, return 0 as the result */
1492 * At least one bit is non-zero. Move through the masks
1515 * that bit a
1544 uint32_t bit = 0x00000001; local
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/illumos-gate/usr/src/common/mpi/
H A Dmpi.c915 step is a bit more complicated, but we save a fair number of
1137 int dig, bit; local
1157 for(bit = 0; bit < DIGIT_BIT; bit++) {
1512 int dig, bit; local
1540 for(bit = 0; bit < DIGIT_BIT; bit++) {
2159 /* Compute T = (P ** -1) mod MP_RADIX. Also works for 16-bit mp_digit
4354 mp_size dig, bit; local
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/psvc/psvcobj/
H A Dpsvcobj.c140 uint64_t bit; member in struct:bits
353 result |= feature_bits[i].bit;
1205 * Flip the bit if necessary (for active_low devices,
/illumos-gate/usr/src/cmd/cmd-inet/usr.sbin/ipsecutils/
H A Dikeadm.c976 * Adjust hexlen down if user gave us too small of a bit
1193 /* make sure we have at least 16-bit alignment */
1293 dbgstr(int bit) argument
1297 switch (bit) {
1322 gettext("<unknown flag 0x%x>"), bit);
1457 return (gettext("768-bit MODP (group 1)"));
1459 return (gettext("1024-bit MODP (group 2)"));
1465 return (gettext("1536-bit MODP (group 5)"));
1467 return (gettext("2048-bit MODP (group 14)"));
1469 return (gettext("3072-bit MOD
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/illumos-gate/usr/src/cmd/avs/rdc/
H A Dsndradm.c1071 char *host, *pri, *sec, *sbm, *bit, *mas, *sha, *ovr; local
1090 bit = strtok(NULL, " "); /* bitmap */
1100 (strcmp(bmp, bit) == 0)) {
1125 bit = strtok(NULL, " "); /* pbitmap */
1140 (strcmp(bmp, bit) == 0)) {
1166 (strcmp(bmp, bit) == 0)) {
1197 (strcmp(bmp, bit) == 0)) {
4028 /* gethostid(3c) is defined to return a 32bit value */
/illumos-gate/usr/src/uts/common/os/
H A Dcpu.c2399 char name[sizeof ("cpu_stat") + 10]; /* enough for 32-bit cpuids */
2475 char name[sizeof ("cpu_stat") + 10]; /* enough for 32-bit cpuids */
2784 uint_t bit; local
2791 bit = (uint_t)(lowbit(s->cpub[i]) - 1);
2792 ASSERT(bit != (uint_t)-1);
2793 *smallestid = bit + (i * BT_NBIPUL);
2804 bit = (uint_t)(highbit(s->cpub[j]) - 1);
2805 ASSERT(bit != (uint_t)-1);
2806 *largestid = bit + (j * BT_NBIPUL);
H A Dmem_config.c1706 /* delay a bit before retrying all procs again */
1791 * exclusive-wanted bit set), kaio read request threads (waiting for a
1813 pgcnt_t bit; local
1819 bit = pfn - mdsp->mds_base;
1820 if ((mdsp->mds_bitmap[bit / NBPBMW] &
1821 (1 << (bit % NBPBMW))) != 0) {
1847 mdsp->mds_bitmap[bit / NBPBMW] |=
1848 (1 << (bit % NBPBMW));
1881 mdsp->mds_bitmap[bit / NBPBMW]
1882 |= (1 << (bit
2295 pgcnt_t bit; local
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/illumos-gate/usr/src/uts/common/io/
H A Dgld.c335 * bit reversal lookup table.
688 * XXX Do bit-reversed devices store gldm_vendor in canonical
3867 * For each (understood) bit in the <notifications> argument, contruct
3879 uint32_t bit; local
3907 for (bit = 1; notifications != 0; bit <<= 1) {
3908 if ((notifications & bit) == 0)
3910 notifications &= ~bit;
3913 if (bit == DL_NOTE_PHYS_ADDR)
3927 switch (bit) {
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/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c6580 * Calculate the bit in the multicast address filter
6591 int bit; local
6597 for (bit = 0; bit < 8; bit++) {

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123456