2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * CDDL HEADER START
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The contents of this file are subject to the terms of the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Common Development and Distribution License (the "License").
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * You may not use this file except in compliance with the License.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * See the License for the specific language governing permissions
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * and limitations under the License.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * When distributing Covered Code, include this CDDL HEADER in each
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If applicable, add the following below this CDDL HEADER, with the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * fields enclosed by brackets "[]" replaced with your own identifying
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * information: Portions Copyright [yyyy] [name of copyright owner]
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * CDDL HEADER END
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Use is subject to license terms.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * VR in a nutshell
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The card uses two rings of data structures to communicate with the host.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * These are referred to as "descriptor rings" and there is one for transmit
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * (TX) and one for receive (RX).
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The driver uses a "DMA buffer" data type for mapping to those descriptor
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * rings. This is a structure with handles and a DMA'able buffer attached to it.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The receive ring is filled with DMA buffers. Received packets are copied into
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * a newly allocated mblk's and passed upstream.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Each transmit descriptor has a DMA buffer attached to it. The data of TX
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * packets is copied into the DMA buffer which is then enqueued for
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * transmission.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Reclaim of transmitted packets is done as a result of a transmit completion
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * interrupt which is generated 3 times per ring at minimum.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders#define VR_DEBUG(args) do ; _NOTE(CONSTANTCONDITION) while (0)
5815e35bec16e886bfd73f1badb4cc85ddcda92ejoostmnl@gmail.comstatic char vr_ident[] = "VIA Rhine Ethernet";
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Attributes for accessing registers and memory descriptors for this device.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic ddi_device_acc_attr_t vr_dev_dma_accattr = {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Attributes for accessing data.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic ddi_device_acc_attr_t vr_data_dma_accattr = {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * DMA attributes for descriptors for communication with the device
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This driver assumes that all descriptors of one ring fit in one consequitive
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * memory area of max 4K (256 descriptors) that does not cross a page boundary.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Therefore, we request 4K alignement.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders 0, /* low DMA address range */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders 0 /* DMA transfer flags */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * DMA attributes for the data moved to/from the device
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Note that the alignement is set to 2K so hat a 1500 byte packet never
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * crosses a page boundary and thus that a DMA transfer is not split up in
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * multiple cookies with a 4K/8K pagesize
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders 0, /* low DMA address range */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders 0 /* DMA transfer flags */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer MC_SETPROP|MC_GETPROP|MC_PROPINFO, /* Which callbacks are set */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_mac_getstat, /* Get the value of a statistic */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_mac_set_promisc, /* Enable or disable promiscuous mode */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_mac_set_multicast, /* Enable or disable a multicast addr */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_mac_set_ether_addr, /* Set the unicast MAC address */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_mac_tx_enqueue_list, /* Transmit a packet */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_mac_setprop, /* Set properties of the device */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer vr_mac_getprop, /* Get properties of the device */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer vr_mac_propinfo /* Get properties attributes */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Table with bugs and features for each incarnation of the card.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA Rhine Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT86C100A Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_BUG_NEEDMODE2PCEROPT | VR_BUG_NO_TXQUEUEING |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_BUG_NEEDMODE10T | VR_BUG_TXALIGN | VR_BUG_NO_MEMIO |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6102-A Rhine II Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6102-C Rhine II Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6105-A Rhine III Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6105-B Rhine III Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6105-LOM Rhine III Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6107-A0 Rhine III Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6107-A1 Rhine III Fast Ethernet",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6105M-A0 Rhine III Fast Ethernet Management Adapter",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_FEATURE_CAMSUPPORT | VR_FEATURE_VLANTAGGING |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "VIA VT6105M-B1 Rhine III Fast Ethernet Management Adapter",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (VR_FEATURE_RX_PAUSE_CAP | VR_FEATURE_TX_PAUSE_CAP |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_FEATURE_CAMSUPPORT | VR_FEATURE_VLANTAGGING |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Function prototypes
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic int32_t vr_cam_index(vr_t *vrp, const uint8_t *maddr);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic uint32_t ether_crc_be(const uint8_t *address);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_tx_enqueue_msg(vr_t *vrp, mblk_t *mp);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_log(vr_t *vrp, int level, const char *fmt, ...);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic vr_result_t vr_alloc_ring(vr_t *vrp, vr_ring_t *r, size_t n);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_free_ring(vr_ring_t *r, size_t n);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic vr_result_t vr_alloc_dmabuf(vr_t *vrp, vr_data_dma_t *dmap,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_free_dmabuf(vr_data_dma_t *dmap);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_periodic(void *p);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_phy_read(vr_t *vrp, int offset, uint16_t *value);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_phy_write(vr_t *vrp, int offset, uint16_t value);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic void vr_phy_autopoll_disable(vr_t *vrp);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic int vr_update_kstats(kstat_t *ksp, int access);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Store the name+instance of the module.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) snprintf(vrp->ifname, sizeof (vrp->ifname), "%s%d",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Bus initialization.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initialize default parameters.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Setup the descriptor rings.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initialize kstats.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Add interrupt to the OS.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_WARN, "vr_add_intr failed in attach");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Add mutexes.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders mutex_init(&vrp->intrlock, NULL, MUTEX_DRIVER,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders mutex_init(&vrp->oplock, NULL, MUTEX_DRIVER, NULL);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders mutex_init(&vrp->tx.lock, NULL, MUTEX_DRIVER, NULL);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable interrupt.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_intr_enable(vrp->intr_hdl) != DDI_SUCCESS) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "ddi_intr_enable failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Register with parent, mac.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((macreg = mac_alloc(MAC_VERSION)) == NULL) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_WARN, "mac_alloc failed in attach");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders macreg->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (mac_register(macreg, &vrp->machdl) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_WARN, "mac_register failed in attach");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Try to un-register from the MAC layer.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * quiesce the card for fast reboot.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp = (vr_t *)ddi_get_driver_private(dev_info);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Stop interrupts.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CTRL0, VR_CTRL0_DMA_STOP);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Add an interrupt for our device to the OS.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders rc = ddi_intr_alloc(vrp->devinfo, &vrp->intr_hdl,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders 0, /* number */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "ddi_intr_alloc failed: %d", rc);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders rc = ddi_intr_add_handler(vrp->intr_hdl, vr_intr, vrp, NULL);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "ddi_intr_add_handler failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_intr_free(vrp->intr_hdl) != DDI_SUCCESS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders rc = ddi_intr_get_pri(vrp->intr_hdl, &vrp->intr_pri);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "ddi_intr_get_pri failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_intr_remove_handler(vrp->intr_hdl) != DDI_SUCCESS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "ddi_intr_remove_handler failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_intr_free(vrp->intr_hdl) != DDI_SUCCESS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Remove our interrupt from the OS.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_intr_remove_handler(vrp->intr_hdl) != DDI_SUCCESS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "ddi_intr_remove_handler failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_intr_free(vrp->intr_hdl) != DDI_SUCCESS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Resume operation after suspend.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp = (vr_t *)ddi_get_driver_private(devinfo);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vrp->chip.state == CHIPSTATE_SUSPENDED_RUNNING)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Suspend operation.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp = (vr_t *)ddi_get_driver_private(devinfo);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.state = CHIPSTATE_SUSPENDED_RUNNING;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initial bus- and device configuration during attach(9E).
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get the reg property which describes the various access methods.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, vrp->devinfo,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders 0, "reg", (int **)®s, &elem) != DDI_PROP_SUCCESS) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_WARN, "Can't get reg property");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders nsets = (elem * sizeof (uint_t)) / sizeof (pci_regspec_t);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Setup access to all available sets.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->regset = kmem_zalloc(nsets * sizeof (vr_acc_t), KM_SLEEP);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (n = 0; n < nsets; n++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "Setup of register set %d failed", n);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders while (--n >= 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders kmem_free(vrp->regset, nsets * sizeof (vr_acc_t));
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders bcopy(®s[n], &vrp->regset[n].reg, sizeof (pci_regspec_t));
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Assign type-named pointers to the register sets.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (n = 0; n < nsets; n++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders addr = vrp->regset[n].reg.pci_phys_hi & PCI_REG_ADDR_M;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (addr == PCI_ADDR_CONFIG && vrp->acc_cfg == NULL)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders else if (addr == PCI_ADDR_IO && vrp->acc_io == NULL)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders else if (addr == PCI_ADDR_MEM32 && vrp->acc_mem == NULL)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Assure there is one of each type.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (n = 0; n < nsets; n++)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders kmem_free(vrp->regset, nsets * sizeof (vr_acc_t));
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "Config-, I/O- and memory sets not available");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.vendor = VR_GET16(vrp->acc_cfg, PCI_CONF_VENID);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.device = VR_GET16(vrp->acc_cfg, PCI_CONF_DEVID);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.revision = VR_GET16(vrp->acc_cfg, PCI_CONF_REVID);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Copy the matching chip_info_t structure.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders elem = sizeof (vr_chip_info) / sizeof (chip_info_t);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (n = 0; n < elem; n++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vrp->chip.revision >= vr_chip_info[n].revmin &&
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.revision <= vr_chip_info[n].revmax) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we didn't find a chip_info_t for this card, copy the first
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * entry of the info structures. This is a generic Rhine whith no
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * bugs and no features.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Tell what is found.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "pci%d,%d,%d: %s, revision 0x%0x",
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders PCI_REG_FUNC_G(vrp->acc_cfg->reg.pci_phys_hi),
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Assure that the device is prepared for memory space accesses
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This should be the default as the device advertises memory
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * access in it's BAR's. However, my VT6102 on a EPIA CL board doesn't
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * and thus we explicetely enable it.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_io, VR_CFGD, VR_CFGD_MMIOEN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Setup a handle for regular usage, prefer memory space accesses.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Store the vendor's MAC address.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (n = 0; n < ETHERADDRL; n++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->vendor_ether_addr[n] = VR_GET8(vrp->acc_reg,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free the register access handles.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders kmem_free(vrp->regset, vrp->nsets * sizeof (vr_acc_t));
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initialize parameter structures.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initialize default link configuration parameters.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.anadv_en = 1; /* Select 802.3 autonegotiation */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.anadv_en |= MII_ABILITY_100BASE_T4;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.anadv_en |= MII_ABILITY_100BASE_TX_FD;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.anadv_en |= MII_ABILITY_100BASE_TX;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.anadv_en |= MII_ABILITY_10BASE_T_FD;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders /* Not a PHY ability, but advertised on behalf of MAC */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Store the PHY identity.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_PHYIDH, &vrp->chip.mii.identh);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_PHYIDL, &vrp->chip.mii.identl);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Clear incapabilities imposed by PHY in phymask.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_STATUS, &vrp->chip.mii.status);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_10) == 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.an_phymask &= ~MII_ABILITY_10BASE_T;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_10_FD) == 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.an_phymask &= ~MII_ABILITY_10BASE_T_FD;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_100_BASEX) == 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.an_phymask &= ~MII_ABILITY_100BASE_TX;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_100_BASEX_FD) == 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.an_phymask &= ~MII_ABILITY_100BASE_TX_FD;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_100_BASE_T4) == 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->param.an_phymask &= ~MII_ABILITY_100BASE_T4;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Clear incapabilities imposed by MAC in macmask
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Note that flowcontrol (FCS?) is never masked. All of our adapters
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * have the ability to honor incoming pause frames. Only the newer can
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * transmit pause frames. Since there's no asym flowcontrol in 100Mbit
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Ethernet, we always advertise (symmetric) pause.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Advertised capabilities is enabled minus incapable.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (vrp->param.an_phymask & vrp->param.an_macmask);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Ensure that autoneg of the PHY matches our default.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Setup the descriptor rings.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Create a ring for receive.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vr_alloc_ring(vrp, &vrp->rxring, vrp->rx.ndesc) != VR_SUCCESS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Create a ring for transmit.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vr_alloc_ring(vrp, &vrp->txring, vrp->tx.ndesc) != VR_SUCCESS) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate a descriptor ring
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The number of descriptor entries must fit in a single page so that the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * whole ring fits in one consequtive space.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * i386: 4K page / 16 byte descriptor = 256 entries
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * sparc: 8K page / 16 byte descriptor = 512 entries
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_alloc_ring(vr_t *vrp, vr_ring_t *ring, size_t n)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate a DMA handle for the chip descriptors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "ddi_dma_alloc_handle in vr_alloc_ring failed.");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate memory for the chip descriptors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "ddi_dma_mem_alloc in vr_alloc_ring failed.");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Map the descriptor memory.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (rc != DDI_DMA_MAPPED || desc_cookiecnt > 1) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "ddi_dma_addr_bind_handle in vr_alloc_ring failed: "
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "rc = %d, cookiecnt = %d", rc, desc_cookiecnt);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ring->cdesc_paddr = desc_dma_cookie.dmac_address;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate memory for the host descriptor ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (vr_desc_t *)kmem_zalloc(n * sizeof (vr_desc_t), KM_SLEEP);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Interlink the descriptors and connect host- to chip descriptors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (i = 0; i < n; i++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Connect the host descriptor to a chip descriptor.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Store the DMA address and offset in the descriptor
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Offset is for ddi_dma_sync() and paddr is for ddi_get/-put().
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ring->desc[i].offset = i * sizeof (vr_chip_desc_t);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ring->desc[i].paddr = ring->cdesc_paddr + ring->desc[i].offset;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Link the previous descriptor to this one.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Make rings out of this list by pointing last to first.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(ring->acchdl, &ring->cdesc[i].next, ring->desc[0].paddr);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free the memory allocated for a ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Unmap and free the chip descriptors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free the memory for storing host descriptors
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initialize the receive ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set the read pointer at the start of the ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Assign a DMA buffer to each receive descriptor.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders while (--i >= 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Store the address of the dma buffer in the chip descriptor
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Put the buffer length in the chip descriptor. Ensure that
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * length fits in the 11 bits of stat1 (2047/0x7FF)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->rxring.acchdl, &rp->cdesc->stat1,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set descriptor ownership to the card
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->rxring.acchdl, &rp->cdesc->stat0, VR_RDES0_OWN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Sync the descriptor with main memory
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) ddi_dma_sync(vrp->rxring.handle, rp->offset,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders sizeof (vr_chip_desc_t), DDI_DMA_SYNC_FORDEV);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free the DMA buffers assigned to the receive ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set the write- and claim pointer.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * (Re)set the TX bookkeeping.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Every transmit decreases nfree. Every reclaim increases nfree.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Attach a DMA buffer to each transmit descriptor.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders while (--i >= 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Init & sync the TX descriptors so the device sees a valid ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->txring.acchdl, &wp->cdesc->stat0, 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->txring.acchdl, &wp->cdesc->stat1, 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->txring.acchdl, &wp->cdesc->data,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) ddi_dma_sync(vrp->txring.handle, wp->offset,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free the DMA buffers attached to the TX ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free the DMA buffers attached to the TX ring
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate a DMA buffer.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_alloc_dmabuf(vr_t *vrp, vr_data_dma_t *dmap, uint_t dmaflags)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate a DMA handle for the buffer
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "ddi_dma_alloc_handle failed in vr_alloc_dmabuf");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate the buffer
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The allocated buffer is aligned on 2K boundary. This ensures that
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * a 1500 byte frame never cross a page boundary and thus that the DMA
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * mapping can be established in 1 fragment.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "ddi_dma_mem_alloc failed in vr_alloc_dmabuf");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Map the memory
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The cookiecount should never > 1 because we requested 2K alignment
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "dma_addr_bind_handle failed in vr_alloc_dmabuf: "
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Destroy a DMA buffer.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Interrupt service routine
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * When our vector is shared with another device, av_dispatch_autovect calls
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * all service routines for the vector until *none* of them return claimed
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * That means that, when sharing vectors, this routine is called at least
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * twice for each interrupt.
5815e35bec16e886bfd73f1badb4cc85ddcda92ejoostmnl@gmail.com * If the driver is not in running state it is not our interrupt.
5815e35bec16e886bfd73f1badb4cc85ddcda92ejoostmnl@gmail.com * Shared interrupts can end up here without us being started.
5815e35bec16e886bfd73f1badb4cc85ddcda92ejoostmnl@gmail.com if (vrp->chip.state != CHIPSTATE_RUNNING) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Read the status register to see if the interrupt is from our device
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This read also ensures that posted writes are brought to main memory.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders status = VR_GET16(vrp->acc_reg, VR_ISR0) & VR_ICR0_CFG;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Status contains no configured interrupts
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The interrupt was not generated by our device.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Acknowledge the event(s) that caused interruption.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Receive completion.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((status & (VR_ISR0_RX_DONE | VR_ISR_RX_ERR_BITS)) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Received some packets.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * DMA stops after a conflict in the FIFO.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CTRL0, VR_CTRL0_DMA_GO);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders status &= ~(VR_ISR0_RX_DONE | VR_ISR_RX_ERR_BITS);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Transmit completion.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((status & (VR_ISR0_TX_DONE | VR_ISR_TX_ERR_BITS)) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Card done with transmitting some packets
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * TX_DONE is generated 3 times per ring but it appears
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * more often because it is also set when an RX_DONE
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * interrupt is generated.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders status &= ~(VR_ISR0_TX_DONE | VR_ISR_TX_ERR_BITS);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Link status change.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get new link state and inform the mac layer.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * We must have handled all things here.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Reset the device if requested
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The request can come from the periodic tx check or from the interrupt
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Pass up the list with received packets.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Inform the upper layer on the linkstatus if there was a change.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Restart transmissions if we were waiting for tx descriptors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Read something from the card to ensure that all of our configuration
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * writes are delivered to the device before the interrupt is ended.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Respond to an unforseen situation by resetting the card and our bookkeeping.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Collect received packets in a list.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (rxp = vrp->rx.rp; ; rxp = rxp->next, n++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Sync the descriptor before looking at it.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) ddi_dma_sync(vrp->rxring.handle, rxp->offset,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders sizeof (vr_chip_desc_t), DDI_DMA_SYNC_FORKERNEL);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get the status from the descriptor.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders rxstat0 = ddi_get32(vrp->rxring.acchdl, &rxp->cdesc->stat0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * We're done if the descriptor is owned by the card.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Received a good packet
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Sync the data.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Send a new copied message upstream.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Link this packet in the list.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Received with errors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Reset descriptor ownership to the MAC.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we do flowcontrol and if the card can transmit pause frames,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * increment the "available receive descriptors" register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (n > 0 && vrp->chip.link.flowctrl == VR_PAUSE_BIDIRECTIONAL) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Whenever the card moves a fragment to host memory it
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * decrements the RXBUFCOUNT register. If the value in the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * register reaches a low watermark, the card transmits a pause
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * frame. If the value in this register reaches a high
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * watermark, the card sends a "cancel pause" frame
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Non-zero values written to this byte register are added
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * by the chip to the register's contents, so we must write
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * the number of descriptors free'd.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_FCR0_RXBUFCOUNT, MIN(n, 0xFF));
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enqueue a list of packets for transmission
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Return the packets not transmitted.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Tell the chip to poll the TX ring.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CTRL0, VR_CTRL0_DMA_GO);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enqueue a message for transmission.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Copy the message into the pre-mapped buffer and free mp
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Clean padlen bytes of short packet.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Most of the statistics are updated on reclaim, after the actual
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * transmit. obytes is maintained here because the length is cleared
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * after transmission
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Sync the data so the device sees the new content too.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) ddi_dma_sync(dmap->handle, 0, pklen, DDI_DMA_SYNC_FORDEV);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we have reached the TX interrupt distance, enable a TX interrupt
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * for this packet. The Interrupt Control (IC) bit in the transmit
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * descriptor doesn't have any effect on the interrupt generation
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * despite the vague statements in the datasheet. Thus, we use the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * more obscure interrupt suppress bit which is probably part of the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * MAC's bookkeeping for TX interrupts and fragmented packets.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders nextp = ddi_get32(vrp->txring.acchdl, &wp->cdesc->next);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vrp->tx.intr_distance >= VR_TX_MAX_INTR_DISTANCE) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Don't suppress the interrupt for this packet.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Suppress the interrupt for this packet.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write and sync the chip's descriptor
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->txring.acchdl, &wp->cdesc->stat1,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders pklen | (VR_TDES1_STP | VR_TDES1_EDP | VR_TDES1_CHN));
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->txring.acchdl, &wp->cdesc->next, nextp);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_put32(vrp->txring.acchdl, &wp->cdesc->stat0, VR_TDES0_OWN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) ddi_dma_sync(vrp->txring.handle, wp->offset,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders sizeof (vr_chip_desc_t), DDI_DMA_SYNC_FORDEV);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The ticks counter is cleared by reclaim when it reclaimed some
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * descriptors and incremented by the periodic TX stall check.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Free transmitted descriptors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (cp = vrp->tx.cp; dirty > 0; cp = cp->next) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Sync & get descriptor status.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) ddi_dma_sync(vrp->txring.handle, cp->offset,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders stat0 = ddi_get32(vrp->txring.acchdl, &cp->cdesc->stat0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Do stats for the first descriptor in a chain.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders stat1 = ddi_get32(vrp->txring.acchdl, &cp->cdesc->stat1);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Abort and FIFO underflow stop the MAC.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packet queueing must be disabled with HD
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * links because otherwise the MAC is also lost
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * after a few of these events.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Check TX health every 2 seconds.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.link.state == VR_LINK_STATE_UP && vrp->reset == 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * No succesful reclaim in the last n
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * intervals. Reset the MAC.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "TX stalled, resetting MAC");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Increase until we find that we've
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * waited long enough.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Bring the device to our desired initial state.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Reset the MAC
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we don't wait long enough for the forced reset to complete,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * MAC looses sync with PHY. Result link up, no link change interrupt
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * and no data transfer.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_io, VR_CTRL1, VR_CTRL1_RESET);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_io, VR_MISC1, VR_MISC1_RESET);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } while ((VR_GET8(vrp->acc_io, VR_CTRL1) & VR_CTRL1_RESET) != 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Load the PROM contents into the MAC again.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_io, VR_PROMCTL, VR_PROMCTL_RELOAD);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Tell the MAC via IO space that we like to use memory space for
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * accessing registers.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_io, VR_CFGD, VR_CFGD_MMIOEN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Prepare and enable the card (MAC + PHY + PCI).
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate DMA buffers for RX.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "vr_rxring_init() failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Allocate DMA buffers for TX.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "vr_txring_init() failed");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Changes of the chip specific registers as done in VIA's fet driver
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * These bits are not in the datasheet and controlled by vr_chip_info.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.bugs & VR_BUG_NEEDMODE10T) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.bugs & VR_BUG_NEEDMODE2PCEROPT) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.features & VR_FEATURE_MRDLNMULTIPLE) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.bugs & VR_BUG_NEEDMIION) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * RX: Accept broadcast packets.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_RXCFG, VR_RXCFG_ACCEPTBROAD);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * RX: Start DMA when there are 256 bytes in the FIFO.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_RXCFG, VR_RXCFG_FIFO_THRESHOLD_BITS,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_BCR0, VR_BCR0_RX_FIFO_THRESHOLD_BITS,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * TX: Start transmit when there are 256 bytes in the FIFO.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_TXCFG, VR_TXCFG_FIFO_THRESHOLD_BITS,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_BCR1, VR_BCR1_TX_FIFO_THRESHOLD_BITS,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Burst transfers up to 256 bytes.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_BCR0, VR_BCR0_DMABITS, VR_BCR0_DMA256);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Disable TX autopolling as it is bad for RX performance
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * I assume this is because the RX process finds the bus often occupied
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * by the polling process.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_CTRL1, VR_CTRL1_NOAUTOPOLL);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Honor the PCI latency timer if it is reasonable.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders pci_latency = VR_GET8(vrp->acc_cfg, PCI_CONF_LATENCY_TIMER);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_CFGB, VR_CFGB_LATENCYTIMER);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_CLRBIT8(vrp->acc_reg, VR_CFGB, VR_CFGB_LATENCYTIMER);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Ensure that VLAN filtering is off, because this strips the tag.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.features & VR_FEATURE_VLANTAGGING) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_CLRBIT8(vrp->acc_reg, VR_BCR1, VR_BCR1_VLANFILTER);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_CLRBIT8(vrp->acc_reg, VR_TXCFG, VR_TXCFG_8021PQ_EN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Clear the CAM filter.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.features & VR_FEATURE_CAMSUPPORT) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_ENABLE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_DONE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_WRITE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_DONE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Give the start addresses of the descriptor rings to the DMA
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * controller on the MAC.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT32(vrp->acc_reg, VR_RXADDR, vrp->rx.rp->paddr);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT32(vrp->acc_reg, VR_TXADDR, vrp->tx.wp->paddr);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * We don't use the additionally invented interrupt ICR1 register,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * so make sure these are disabled.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable interrupts.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable the DMA controller.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CTRL0, VR_CTRL0_DMA_GO);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Configure the link. Rely on the link change interrupt for getting
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * the link state into the driver.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set the software view on the state to 'running'.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Stop DMA and interrupts.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Stop interrupts.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CTRL0, VR_CTRL0_DMA_STOP);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set the software view on the state to stopped.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Remove DMA buffers from the rings.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Reset the card.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Prepare and enable the card.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Configure a cyclic function to keep the card & driver from diverting.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ddi_periodic_add(vr_periodic, vrp, VR_CHECK_INTERVAL, DDI_IPL_0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Stop the device.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Remove the cyclic from the system.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Add or remove a multicast address to/from the filter
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * From the 21143 manual:
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The 21143 can store 512 bits serving as hash bucket heads, and one physical
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * 48-bit Ethernet address. Incoming frames with multicast destination
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * addresses are subjected to imperfect filtering. Frames with physical
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * destination addresses are checked against the single physical address.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * For any incoming frame with a multicast destination address, the 21143
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * applies the standard Ethernet cyclic redundancy check (CRC) function to the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * first 6 bytes containing the destination address, then it uses the most
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * significant 9 bits of the result as a bit index into the table. If the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * indexed bit is set, the frame is accepted. If the bit is cleared, the frame
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * is rejected. This filtering mode is called imperfect because multicast
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * frames not addressed to this station may slip through, but it still
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * decreases the number of frames that the host can receive.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * I assume the above is also the way the VIA chips work. There's not a single
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * word about the multicast filter in the datasheet.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Another word on the CAM filter on VT6105M controllers:
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The VT6105M has content addressable memory which can be used for perfect
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * filtering of 32 multicast addresses and a few VLAN id's
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * I think it works like this: When the controller receives a multicast
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * address, it looks up the address using CAM. When it is found, it takes the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * matching cell address (index) and compares this to the bit position in the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * cam mask. If the bit is set, the packet is passed up. If CAM lookup does not
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * result in a match, the packet is filtered using the hash based filter,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * if that matches, the packet is passed up and dropped otherwise
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Also, there's not a single word in the datasheet on how this cam is supposed
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * to work ...
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_mac_set_multicast(void *p, boolean_t add, const uint8_t *mca)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.features & VR_FEATURE_CAMSUPPORT) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Program the perfect filter.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders cam_mask = VR_GET32(vrp->acc_reg, VR_CAM_MASK);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get index of first empty slot.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Add address at cam_index.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_ADDR, cam_index);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT32(vrp->acc_reg, VR_CAM_MASK, cam_mask);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (a = 0; a < ETHERADDRL; a++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * No free CAM slots available
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Add mca to the imperfect filter.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Find the index of the entry to remove
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If the entry was not found (-1), the addition was
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * probably done when the table was full.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Disable the corresponding mask bit.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT32(vrp->acc_reg, VR_CAM_MASK, cam_mask);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The entry to be removed was not found
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The likely cause is that the CAM was full
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * during addition. The entry is added to the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * hash filter in that case and needs to be
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * removed there too.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * No CAM in the MAC, thus we need the hash filter.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get the CRC-32 of the multicast address
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The card uses the "MSB first" direction when calculating the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * the CRC. This is odd because ethernet is "LSB first"
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * We have to use that "big endian" approach as well.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Turn bit[crc_index] on.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Turn bit[crc_index] off.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * When not promiscuous write the filter now. When promiscuous,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * the filter is open and will be written when promiscuous ends.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable/disable multicast receivements based on mcount.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_RXCFG, VR_RXCFG_ACCEPTMULTI);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_CLRBIT8(vrp->acc_reg, VR_RXCFG, VR_RXCFG_ACCEPTMULTI);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Calculate the CRC32 for 6 bytes of multicast address in MSB(it) first order.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The MSB first order is a bit odd because Ethernet standard is LSB first
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (length = 0; length < ETHERADDRL; length++) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders carry = ((crc & 0x80000000U) ? 1 : 0) ^ (c & 0x01);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Return the CAM index (base 0) of maddr or -1 if maddr is not found
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If maddr is 0, return the index of an empty slot in CAM or -1 when no free
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * slots available.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Read the CAM mask from the controller.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If maddr is 0, return the first unused slot or -1 for no unused.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Look for the first unused position in mask.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Look for maddr in CAM.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders /* Look at enabled entries only */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_ENABLE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_READ);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (a = 0; a < ETHERADDRL; a++)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders taddr[a] = VR_GET8(vrp->acc_reg, VR_MCAM0 + a);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_CAM_CTRL, VR_CAM_CTRL_DONE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set promiscuous mode on or off.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_mac_set_promisc(void *p, boolean_t promiscflag)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get current receive configuration.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable promiscuous mode and open the multicast filter.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders rxcfg |= (VR_RXCFG_PROMISC | VR_RXCFG_ACCEPTMULTI);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Restore the multicast filter and disable promiscuous mode.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_mac_getstat(void *arg, uint_t stat, uint64_t *val)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anadv & MII_ABILITY_100BASE_T4) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anadv & MII_ABILITY_100BASE_TX_FD) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anadv & MII_ABILITY_100BASE_TX) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anadv & MII_ABILITY_10BASE_T_FD) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anadv & MII_ABILITY_10BASE_T) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.control & MII_CONTROL_ANE) != 0;
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore v = (vrp->chip.mii.anadv & MII_ABILITY_PAUSE) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anadv & MII_AN_ADVERT_REMFAULT) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_100_BASE_T4) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_100_BASEX_FD) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_100_BASEX) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_10_FD) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_10) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_CANAUTONEG) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_REMFAULT) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Number of times carrier was lost or never detected on a
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * transmission attempt.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets without collisions where first transmit attempt was
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * delayed because the medium was busy.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Frames where excess collisions occurred on transmit, causing
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * transmit failure.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets received with CRC errors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets successfully transmitted with exactly one collision.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.control & MII_CONTROL_ANE) != 0 &&
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (vrp->chip.mii.status & MII_STATUS_ANDONE) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.lpable & MII_ABILITY_100BASE_T4) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.lpable & MII_ABILITY_100BASE_TX_FD) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.lpable & MII_ABILITY_100BASE_TX) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.lpable & MII_ABILITY_10BASE_T_FD) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.lpable & MII_ABILITY_10BASE_T) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.anexp & MII_AN_EXP_LPCANAN) != 0;
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore v = (vrp->chip.mii.lpable & MII_ABILITY_PAUSE) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.status & MII_STATUS_REMFAULT) != 0;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets received with MAC errors, except align_errors,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * fcs_errors, and toolong_errors.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets encountering transmit MAC failures, except carrier
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * and collision failures.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets successfully transmitted with multiple collisions.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Number of times signal quality error was reported
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This one is reported by the PHY.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Packets received larger than the maximum permitted length.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Number of times a transmit collision occurred late
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * (after 512 bit times).
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * MII address in the 0 to 31 range of the physical layer
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * device in use for a given Ethernet device.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * MII transceiver manufacturer and device ID.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders v = (vrp->chip.mii.identh << 16) | vrp->chip.mii.identl;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vrp->chip.link.speed == VR_LINK_SPEED_100MBS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders else if (vrp->chip.link.speed == VR_LINK_SPEED_10MBS)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Isn't this something for the MAC layer to maintain?
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_mac_set_ether_addr(void *p, const uint8_t *ea)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set a new station address.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders for (i = 0; i < ETHERADDRL; i++)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_ETHERADDR + i, ea[i]);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Configure the ethernet link according to param and chip.mii.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.control & MII_CONTROL_ANE) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we do autoneg, ensure restart autoneg is ON.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The advertisements are prepared by param_init.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_write(vrp, MII_AN_ADVERT, vrp->chip.mii.anadv);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we don't autoneg, we need speed, duplex and flowcontrol
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * to configure the link. However, dladm doesn't allow changes
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * to speed and duplex (readonly). The way this is solved
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * (ahem) is to select the highest enabled combination
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Speed and duplex should be r/w when autoneg is off.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.mii.control &= ~MII_CONTROL_FDUPLEX;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.mii.control &= ~MII_CONTROL_FDUPLEX;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write the control register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_write(vrp, MII_CONTROL, vrp->chip.mii.control);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * With autoneg off we cannot rely on the link_change interrupt for
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * for getting the status into the driver.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.control & MII_CONTROL_ANE) == 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get link state in the driver and configure the MAC accordingly.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_STATUS, &vrp->chip.mii.status);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_CONTROL, &vrp->chip.mii.control);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_AN_ADVERT, &vrp->chip.mii.anadv);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_AN_LPABLE, &vrp->chip.mii.lpable);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_phy_read(vrp, MII_AN_EXPANSION, &vrp->chip.mii.anexp);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If we did autongeg, deduce the link type/speed by selecting the
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * highest common denominator.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.control & MII_CONTROL_ANE) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders mask = vrp->chip.mii.anadv & vrp->chip.mii.lpable;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((mask & MII_ABILITY_100BASE_TX_FD) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } else if ((mask & MII_ABILITY_100BASE_T4) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } else if ((mask & MII_ABILITY_100BASE_TX) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } else if ((mask & MII_ABILITY_10BASE_T_FD) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } else if ((mask & MII_ABILITY_10BASE_T) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.link.duplex = VR_LINK_DUPLEX_UNKNOWN;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Did we negotiate pause?
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vrp->chip.link.flowctrl = VR_PAUSE_BIDIRECTIONAL;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Did either one detect a AN fault?
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_REMFAULT) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "AN remote fault reported by LP.");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.lpable & MII_AN_ADVERT_REMFAULT) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_WARN, "AN remote fault caused for LP.");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * We didn't autoneg
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The link type is defined by the control register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.control & MII_CONTROL_100MB) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.control & MII_CONTROL_FDUPLEX) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * No pause on HDX links.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set the duplex mode on the MAC according to that of the PHY.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vrp->chip.link.duplex == VR_LINK_DUPLEX_FULL) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_CTRL1, VR_CTRL1_MACFULLDUPLEX);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable packet queueing on FDX links.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.bugs & VR_BUG_NO_TXQUEUEING) == 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_CLRBIT8(vrp->acc_reg, VR_CFGB, VR_CFGB_QPKTDIS);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_CLRBIT8(vrp->acc_reg, VR_CTRL1, VR_CTRL1_MACFULLDUPLEX);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Disable packet queueing on HDX links. With queueing enabled,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * this MAC get's lost after a TX abort (too many colisions).
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_CFGB, VR_CFGB_QPKTDIS);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set pause options on the MAC.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if (vrp->chip.link.flowctrl == VR_PAUSE_BIDIRECTIONAL) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * All of our MAC's can receive pause frames.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_MISC0, VR_MISC0_FDXRFEN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * VT6105 and above can transmit pause frames.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.features & VR_FEATURE_TX_PAUSE_CAP) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set the number of available receive descriptors
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Non-zero values written to this register are added
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * to the register's contents. Careful: Writing zero
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * clears the register and thus causes a (long) pause
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Request pause when we have 4 descs left.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Cancel the pause when there are 24 descriptors again.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Request a pause of FFFF bit-times. This long pause
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * is cancelled when the high watermark is reached.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT16(vrp->acc_reg, VR_FCR2_PAUSE, 0xFFFF);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Enable flow control on the MAC.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_MISC0, VR_MISC0_FDXTFEN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_FCR1, VR_FCR1_FD_RX_EN |
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Turn flow control OFF.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_MISC0, VR_MISC0_FDXRFEN | VR_MISC0_FDXTFEN);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.features & VR_FEATURE_TX_PAUSE_CAP) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set link state.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.status & MII_STATUS_LINKUP) != 0)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The PHY is automatically polled by the MAC once per 1024 MD clock cycles
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * MD is clocked once per 960ns so polling happens about every 1M ns, some
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * 1000 times per second
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This polling process is required for the functionality of the link change
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * interrupt. Polling process must be disabled in order to access PHY registers
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Turn off PHY polling so that the PHY registers can be accessed.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Special procedure to stop the autopolling.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.info.bugs & VR_BUG_MIIPOLLSTOP) != 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * If polling is enabled.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Wait for the end of a cycle (mdone set).
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "Timeout in "
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "disable MII polling");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Once paused, we can disable autopolling.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Turn off MII polling.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Wait for MIDLE in MII address register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "Timeout in disable MII polling");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Turn on PHY polling. PHY's registers cannot be accessed.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_MIIADDR, MII_STATUS|VR_MIIADDR_MAUTO);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_PUT8(vrp->acc_reg, VR_MIICMD, VR_MIICMD_MD_AUTO);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Wait for the polling process to finish.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "Timeout in enable MII polling");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } while ((VR_GET8(vrp->acc_reg, VR_MIIADDR) & VR_MIIADDR_MDONE) == 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initiate a polling.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_MIIADDR, VR_MIIADDR_MAUTO);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Read a register from the PHY using MDIO.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_phy_read(vr_t *vrp, int offset, uint16_t *value)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write the register number to the lower 5 bits of the MII address
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_MIIADDR, VR_MIIADDR_BITS, offset);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write a READ command to the MII control register
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This bit will be cleared when the read is finished.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_MIICMD, VR_MIICMD_MD_READ);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Wait until the read is done.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "Timeout in MII read command");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } while ((VR_GET8(vrp->acc_reg, VR_MIICMD) & VR_MIICMD_MD_READ) != 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write to a PHY's register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_phy_write(vr_t *vrp, int offset, uint16_t value)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write the register number to the MII address register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBITS8(vrp->acc_reg, VR_MIIADDR, VR_MIIADDR_BITS, offset);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Write the value to the data register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Issue the WRITE command to the command register.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * This bit will be cleared when the write is finished.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders VR_SETBIT8(vrp->acc_reg, VR_MIICMD, VR_MIICMD_MD_WRITE);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders vr_log(vrp, CE_NOTE, "Timeout in MII write command");
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders } while ((VR_GET8(vrp->acc_reg, VR_MIICMD) & VR_MIICMD_MD_WRITE) != 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Initialize and install some private kstats.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulderstypedef struct {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders nstats = sizeof (vr_driver_stats) / sizeof (vr_kstat_t);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders ksp = kstat_create(MODULENAME, ddi_get_instance(vrp->devinfo),
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders "driver", "net", KSTAT_TYPE_NAMED, nstats, 0);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders kstat_named_init(knp, vr_driver_stats[i].name,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (knp++)->value.ui64 = vrp->stats.intr_claimed;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (knp++)->value.ui64 = vrp->stats.intr_unclaimed;
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Remove 'private' kstats.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Get a property of the device/driver
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * - pr_val is always an integer of size pr_valsize
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * - ENABLED (EN) is what is configured via dladm
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * - ADVERTISED (ADV) is ENABLED minus constraints, like PHY/MAC capabilities
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * - DEFAULT are driver- and hardware defaults (DEFAULT is implemented as a
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * flag in pr_flags instead of MAC_PROP_DEFAULT_)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * - perm is the permission printed on ndd -get /.. \?
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_mac_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders /* Since we have no private properties */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer val = vrp->param.an_en == VR_LINK_AUTONEG_ON;
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer if (err == 0 && pr_num != MAC_PROP_PRIVATE) {
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyervr_mac_propinfo(void *arg, const char *pr_name, mac_prop_id_t pr_num,
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer /* Since we have no private properties */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * Writability depends on autoneg.
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Set a property of the device.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_mac_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders /* Since we have no private properties */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * The current set of public property values are passed as integers
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Private properties are passed as strings in pr_val length pr_valsize.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders if ((vrp->chip.mii.control & MII_CONTROL_ANE) == 0) {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (vrp->param.an_phymask & vrp->param.an_macmask);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders * Logging and debug functions.
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersstatic struct {
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders (void) vsnprintf(buf, sizeof (buf), fmt, args);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders cmn_err(prtdata.level, prtdata.fmt, prtdata.ifname, buf);
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Muldersvr_log(vr_t *vrp, int level, const char *fmt, ...)
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders#endif /* DEBUG */
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost MuldersDDI_DEFINE_STREAM_OPS(vr_dev_ops, nulldev, nulldev, vr_attach, vr_detach,
2ca5b6595b95478e6568b0e77c6c83c8a870867aJoost Mulders &mod_driverops, /* Type of module. This one is a driver */