VMM,REM: Allocate the FPU/SSE/AVX/FUTURE state stuff. We need to use pointers to substates anyway and this will make CPUMCPU much smaller.

CPUMCTX,CPUMHOST: Replaced the fpu (X86FXSAVE) member with an XState (X86XSAVEAREA) member.

Moving CPUMCPU about...

VMCPU: Added a iHostCpuSet field to go with the idHostCpu one. This allows for better GIP time & TSC code in raw-mode context.

DIS: #6251: AVX / VEX instructions support (two byte instructions only) and some fixes to the other tables.

VMM/GIM: More bits for Hyper-V implementation.

VMM/GIM: Mapping of GIM MMIO2 regions and Hyper-V provider work.

GIM: Skeleton, work in progress.

VMM/HMVMXR0: MSR optimizations for world-switch of 64-bit guests.

VMM/HM: Dispatch host NMIs on Intel. Added separate STAM counter for host NMIs with the necessary changes to old, new VT-x, AMD-V code.

Missed header update.

VMM: Optimized 64-bit host VT-x world-switch.

VMM: Fix for HM_PROFILE_EXIT_DISPATCH.

VMM: SELM and VMM early HM init changes.

Do HMR3Init first in vmR3InitRing3 so the other components can skip raw-mode bits during init.

Ring-1 compression patches, courtesy of trivirt AG: - main: diff to remove the hwvirt requirement for QNX - rem: diff for dealing with raw ring 0/1 selectors and general changes to allowed guest execution states - vmm: changes for using the guest's TSS selector index as our hypervisor TSS selector (makes str safe) (VBOX_WITH_SAFE_STR ) - vmm: changes for dealing with guest ring 1 code (VBOX_WITH_RAW_RING1) - vmm: change to emulate smsw in RC/R0 (QNX uses this old style instruction a lot so going to qemu for emulation is very expensive) - vmm: change (hack) to kick out patm virtual handlers in case they conflict with guest GDT/TSS write monitors; we should allow multiple handlers per page, but that change would be rather invasive

PDMCritSectRw: Early morphing stage - untested, ring-3 only.

Alignment.

VMM: HM cleanup.

VMM: Switcher and TRPM fixes wrt hypervisor traps and tstVMM.

VMMSwitcher: Drop the unused assembly switcher functions taking guest or host contexts as arguments.

CPUMCTX++: Rearranging the CPUMCTX structure in preparation of some hidden selector register improvments.

SUPDrv,VMM: Tracepoints in raw-mode.

VMM/PDM: Some simple tracepoint infastructure.

VMM: Make most of the tracing optional so we don't have to be afraid of adding lots more.

build fixes.

VMM: Renamed VM::fRawR0Enabled and VM::fRawR3Enabled, inverting their meaning.

Try to fix build

VMM,SUPDrv: Created DBGFTrace.

fix OSE