Searched refs:CR4 (Results 1 - 19 of 19) sorted by relevance
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseLib/Ia32/ |
H A D | ReadDr4.asm | 37 ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading
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H A D | ReadDr5.asm | 37 ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading
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H A D | WriteDr4.asm | 38 ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to
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H A D | WriteDr5.asm | 38 ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
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/vbox/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/ |
H A D | InitializeFpu.S | 55 # Set OSFXSR bit 9 in CR4
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H A D | InitializeFpu.asm | 61 ; Set OSFXSR bit 9 in CR4
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/vbox/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/X64/ |
H A D | InitializeFpu.S | 41 # Set OSFXSR bit 9 in CR4
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H A D | InitializeFpu.asm | 51 ; Set OSFXSR bit 9 in CR4
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/vbox/src/VBox/ValidationKit/bootsectors/ |
H A D | bootsector2-test1.asm | 98 ; Read CR4 146 db 'Read CR4', 0
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/vbox/src/VBox/VMM/include/ |
H A D | CPUMInternal.h | 390 /** CR4 mask */ 395 } CR4; member in struct:CPUM
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/vbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ |
H A D | AsmFuncs.asm | 207 ;; insure FXSAVE/FXRSTOR is enabled in CR4...
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/vbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ |
H A D | AsmFuncs.asm | 191 ;; insure FXSAVE/FXRSTOR is enabled in CR4...
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseLib/X64/ |
H A D | Thunk16.S | 297 movl %ebp, (%rcx) # save CR4 in SavedCr4
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H A D | Thunk16.asm | 284 mov [rcx], ebp ; save CR4 in SavedCr4
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/vbox/src/VBox/VMM/VMMR3/ |
H A D | CPUM.cpp | 643 * Setup the CR4 AND and OR masks used in the raw-mode switcher. 645 pVM->cpum.s.CR4.AndMask = X86_CR4_OSXMMEEXCPT | X86_CR4_PVI | X86_CR4_VME; 646 pVM->cpum.s.CR4.OrMask = X86_CR4_OSFXSR; 661 if (!HMIsEnabled(pVM)) /* For raw-mode, we only use XSAVE/XRSTOR when the guest starts using it (CPUID/CR4 visibility). */ 1800 pHlp->pfnPrintf(pHlp, "CR4OrMask=%#x CR4AndMask=%#x\n", pVM->cpum.s.CR4.OrMask, pVM->cpum.s.CR4.AndMask); 2100 * API for controlling a few of the CPU features found in CR4. 2107 * @param fOr The CR4 OR mask. 2108 * @param fAnd The CR4 AND mask. 2115 pVM->cpum.s.CR4 [all...] |
H A D | CPUMDbg.cpp | 975 /** Sub-fields for the CR4 register. */ 1210 CPU_REG_EX_AS("cr4", CR4, U32, 4, cpumR3RegGstGet_crX, cpumR3RegGstSet_crX, NULL, g_aCpumRegFields_cr4 ), 1338 CPU_REG_EX_AS("cr4", CR4, U32, 4, cpumR3RegHyperGet_crX, cpumR3RegHyperSet_crX, NULL, g_aCpumRegFields_cr4 ),
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/DebugSupportDxe/Ia32/ |
H A D | AsmFuncs.asm | 322 ;; insure FXSAVE/FXRSTOR is enabled in CR4...
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/DebugSupportDxe/X64/ |
H A D | AsmFuncs.asm | 350 ;; insure FXSAVE/FXRSTOR is enabled in CR4...
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/vbox/src/VBox/VMM/testcase/ |
H A D | tstVMStruct.h | 31 GEN_CHECK_OFF(CPUM, CR4);
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