/solaris-x11-s12/open-src/kernel/i915/src/ |
H A D | intel_ddi.c | 174 u32 temp, i, rx_ctl_val; local 236 temp = I915_READ(_FDI_RXA_MISC); 237 temp &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK); 238 I915_WRITE(_FDI_RXA_MISC, temp); 244 temp = I915_READ(DP_TP_STATUS(PORT_E)); 245 if (temp & DP_TP_STATUS_AUTOTRAIN_DONE) { 258 temp = I915_READ(DDI_BUF_CTL(PORT_E)); 259 temp &= ~DDI_BUF_CTL_ENABLE; 260 I915_WRITE(DDI_BUF_CTL(PORT_E), temp); local 264 temp 267 I915_WRITE(DP_TP_CTL(PORT_E), temp); local 737 uint32_t temp; local 758 I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp); local 772 uint32_t temp; local 847 I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); local 952 uint32_t temp, ret; local 1278 u32 temp, flags = 0; local [all...] |
H A D | intel_display.c | 2229 u32 reg, temp; local 2233 temp = I915_READ(reg); 2235 temp &= ~FDI_LINK_TRAIN_NONE_IVB; 2236 temp |= FDI_LINK_TRAIN_NONE_IVB | FDI_TX_ENHANCE_FRAME_ENABLE; 2238 temp &= ~FDI_LINK_TRAIN_NONE; 2239 temp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE; 2241 I915_WRITE(reg, temp); 2244 temp = I915_READ(reg); 2246 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; 2247 temp | 2276 uint32_t temp; local 2303 u32 reg, temp, tries; local 2404 u32 reg, temp, i, retry; local 2536 u32 reg, temp, i; local 2651 u32 reg, temp; local 2688 u32 reg, temp; local 2718 u32 reg, temp; local 2811 u32 temp; local 2931 u32 reg, temp; local 3131 u32 temp; local 3192 u32 temp; local 3395 u32 reg, temp; local 4203 unsigned int temp = n; local 5557 uint32_t temp; local [all...] |
H A D | intel_lvds.c | 134 u32 temp; local 136 temp = I915_READ(lvds_encoder->reg); 137 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; 140 temp &= ~PORT_TRANS_SEL_MASK; 141 temp |= PORT_TRANS_SEL_CPT(pipe); 144 temp |= LVDS_PIPEB_SELECT; 146 temp &= ~LVDS_PIPEB_SELECT; 151 temp &= ~LVDS_BORDER_ENABLE; 152 temp |= intel_crtc->config.gmch_pfit.lvds_border_bits; 157 temp | [all...] |
H A D | dvo_ivch.c | 245 uint16_t temp; local 255 if (!ivch_read(dvo, VR00, &temp)) 263 if ((temp & VR00_BASE_ADDRESS_MASK) != dvo->slave_addr) { 266 (temp & VR00_BASE_ADDRESS_MASK), dvo->slave_addr);
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H A D | intel_crt.c | 119 u32 temp; local 121 temp = I915_READ(crt->adpa_reg); 122 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 123 temp &= ~ADPA_DAC_ENABLE; 127 temp |= ADPA_DAC_ENABLE; 130 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 133 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 136 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 140 I915_WRITE(crt->adpa_reg, temp);
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H A D | intel_hdmi.c | 702 u32 temp; local 708 temp = I915_READ(intel_hdmi->hdmi_reg); 719 I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE); 723 temp |= enable_bits; 725 I915_WRITE(intel_hdmi->hdmi_reg, temp); 732 I915_WRITE(intel_hdmi->hdmi_reg, temp); 750 u32 temp; local 753 temp = I915_READ(intel_hdmi->hdmi_reg); 761 if (temp & SDVO_PIPE_B_SELECT) { 762 temp 1225 u32 temp = I915_READ(PEG_BAND_GAP_DATA); local [all...] |
H A D | i915_gem_tiling.c | 468 char temp[64]; local 475 (void) memcpy(temp, &vaddr[i], 64); 477 (void) memcpy(&vaddr[i + 64], temp, 64);
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H A D | intel_dvo.c | 168 u32 temp = I915_READ(dvo_reg); local 171 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 180 u32 temp = I915_READ(dvo_reg); local 182 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
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H A D | intel_sdvo.c | 1383 u32 temp; local 1390 temp = I915_READ(intel_sdvo->sdvo_reg); 1391 if ((temp & SDVO_ENABLE) != 0) { 1398 if (temp & SDVO_PIPE_B_SELECT) { 1399 temp &= ~SDVO_PIPE_B_SELECT; 1400 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1404 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1416 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1426 u32 temp; local 1431 temp [all...] |
H A D | intel_dp.c | 1926 uint32_t temp = I915_READ(DP_TP_CTL(port)); local 1929 temp |= DP_TP_CTL_SCRAMBLE_DISABLE; 1931 temp &= ~DP_TP_CTL_SCRAMBLE_DISABLE; 1933 temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; 1936 temp |= DP_TP_CTL_LINK_TRAIN_NORMAL; 1940 temp |= DP_TP_CTL_LINK_TRAIN_PAT1; 1943 temp |= DP_TP_CTL_LINK_TRAIN_PAT2; 1946 temp |= DP_TP_CTL_LINK_TRAIN_PAT3; 1949 I915_WRITE(DP_TP_CTL(port), temp); local 3210 u32 temp local [all...] |
H A D | i915_gem.c | 1162 struct gem_map_list *entry, *temp; local 1167 list_for_each_entry_safe(entry, temp, struct gem_map_list, &obj->base.seg_list, head) { 3579 u32 temp = I915_READ(GEN7_MSG_CTL); local 3580 temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK); 3581 I915_WRITE(GEN7_MSG_CTL, temp);
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/solaris-x11-s12/open-src/kernel/drm/src/ |
H A D | drm_sun_idr.c | 376 struct idr_list *entry, *node, *temp; local 408 temp = node->next; 411 temp->prev = entry; 448 struct idr_list *entry, *temp; local 452 list_for_each_safe(entry, temp, &head->next[key]) { 466 struct idr_list *entry, *temp; local 468 list_for_each_safe(entry, temp, &head->next[key]) {
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H A D | drm_fops.c | 381 struct drm_file *temp; local 382 list_for_each_entry(temp, struct drm_file, &dev->filelist, lhead) { 383 if ((temp->master == file_priv->master) && 384 (temp != file_priv)) 385 temp->authenticated = 0;
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H A D | drm_modes.c | 1030 struct list_head *list, *temp; local 1039 for (list = mode_list->next, temp = list->next; 1040 temp != mode_list; 1041 list = temp, temp = temp->next) { 1042 if (drm_mode_compare(list, temp) > 0){ 1054 list_for_each_safe(list, temp, mode_list){
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H A D | drm_sunmod.c | 282 struct gem_map_list *entry, *temp; local 299 list_for_each_entry_safe(entry, temp, struct gem_map_list,
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/solaris-x11-s12/open-src/app/gfx-utils/sun-src/fbconf_xorg/xf86/ |
H A D | scan.c | 492 int temp = pushToken; local 495 if (temp == COMMA || temp == DASH) 496 return (temp); 497 if (temp == NUMBER || temp == STRING) 498 return (temp);
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/solaris-x11-s12/open-src/kernel/mdb/modules/ |
H A D | i915.c | 872 uintptr_t temp; local 902 temp = (uintptr_t)obj.his_list.next; 904 if (mdb_vread(&node, sizeof (struct list_head), temp) == -1) { 924 temp = (uintptr_t)node.next; 950 uintptr_t temp; local 977 temp = (uintptr_t)dev_priv->batch_list.next; 980 if (mdb_vread(&node, sizeof (struct list_head), temp) == -1) { 1015 temp = (uintptr_t)node.next;
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