Searched refs:mask (Results 1 - 20 of 20) sorted by relevance

/solaris-x11-s12/open-src/kernel/sys/drm/
H A Ddrm_atomic.h71 #define atomic_clear_mask(mask, p) (*(p) &= ~mask)
72 #define atomic_set_mask(mask, p) (*(p) |= mask)
/solaris-x11-s12/open-src/app/xmag_multivis/sun-src/
H A Dmultivis.h123 int mvShifts(unsigned long mask);
124 int mvOnes(unsigned long mask);
H A Dmultivis.c538 * Calculate number of 1 bits in mask
542 mvOnes(unsigned long mask) argument
546 y = (mask >> 1) &033333333333;
547 y = mask - y - ((y >> 1) & 033333333333);
552 * Calculate the number of shifts till we hit the mask
555 mvShifts(unsigned long mask) argument
559 if (mask) {
560 while(!(mask&0x1)) {
561 mask = mask >>
[all...]
H A Dxmag_multivis.c739 unsigned int mask; local
795 &root_x, &root_y, &win_x, &win_y, &mask)) {
980 unsigned int mask; local
983 if (XQueryPointer(dpy,mw,&rootW,&childW,&rx,&ry,&x,&y,&mask)) {
984 if (!(mask & Button1Mask)) break; /* button released */
/solaris-x11-s12/open-src/app/xcolor/sun-src/
H A Dxcolor.c249 int mask; local
326 mask = CWEventMask;
330 mask |= CWColormap;
345 mask, /* window attribute mask */
359 mask = CWEventMask;
363 mask |= CWColormap;
368 InputOutput, visual, mask, &xswa);
/solaris-x11-s12/open-src/app/cmap_compact/sun-src/
H A Dcmcinit.c51 unsigned long mask; local
64 if (!XAllocColorCells(DisplayOfScreen(screen), cmap, 0, &mask, 0,
/solaris-x11-s12/open-src/app/accessx/sun-src/
H A DAccessXcomm.c322 CARD16 mask,
325 int XAccessXConfigure(dpy,accessXClient,mask,accessXState)
328 CARD16 mask;
337 req->mask = mask;
320 XAccessXConfigure(Display *dpy, AccessXClientContextRec *accessXClient, CARD16 mask, AccessXStateRec *accessXState) argument
H A DAccessXproto.h157 CARD8 mouseKeysCtrlMask; /* Modifier mask used for magic */
193 CARD16 mask B16; /* Bitmap saying what fields */
209 CARD8 mouseKeysCtrlMask; /* Modifier mask used for magic */
H A DAccessX.c122 CARD16 mask,
1233 CARD16 mask; local
1239 mask = SET_CONTROL_MASK;
1254 mask |= SET_TIME_OUT_INTERVAL_MASK;
1283 mask |= SET_REPEAT_DELAY_MASK;
1291 mask |= SET_REPEAT_RATE_MASK;
1299 mask |= SET_SLOW_KEYS_DELAY_MASK;
1307 mask |= SET_DEBOUNCE_DELAY_MASK;
1315 mask |= SET_MOUSE_KEYS_TIME_TO_MAX_MASK;
1322 mask |
2147 unsigned long mask; local
2239 unsigned long mask; local
[all...]
/solaris-x11-s12/open-src/lib/libXext/sun-src/src/
H A DTransOvl.c342 unsigned long mask
348 while (mask) {
350 mask &= (mask - 1);
641 mask; local
647 mask = hardmask | softmask;
651 if ( (mask & XSolarisOvlVisualClass)
657 if ( (mask & XSolarisOvlDepth)
663 if ( (mask & XSolarisOvlMinColors)
669 if ( (mask
[all...]
/solaris-x11-s12/open-src/kernel/i915/src/
H A Di915_irq.c85 ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) argument
89 if ((dev_priv->irq_mask & mask) != 0) {
90 dev_priv->irq_mask &= ~mask;
97 ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask) argument
101 if ((dev_priv->irq_mask & mask) != mask) {
102 dev_priv->irq_mask |= mask;
221 * the other pipes, due to the fact that there's just one interrupt mask/enable
264 * one interrupt mask/enable bit for all the transcoders.
318 i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) argument
333 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) argument
2629 u32 mask = ~I915_READ(SDEIMR); local
2663 u32 mask; local
[all...]
H A Di915_suspend.c269 u64 mask = 0xffffffff; local
286 mask = ~LVDS_PORT_EN;
289 I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask);
291 I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask);
H A Di915_gem_execbuffer.c756 u32 mask, flags; local
821 mask = I915_EXEC_CONSTANTS_MASK;
837 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
996 intel_ring_emit(ring, mask << 16 | mode);
H A Dintel_dp.c917 u32 mask,
927 DRM_DEBUG_KMS("mask %08x value %08x status %08x control %08x\n",
928 mask, value,
932 if (_wait_for((I915_READ(pp_stat_reg) & mask) == value, 5000, 10)) {
1889 uint32_t signal_levels, mask; local
1894 mask = DDI_BUF_EMP_MASK;
1897 mask = 0;
1900 mask = EDP_LINK_TRAIN_VOL_EMP_MASK_IVB;
1903 mask = EDP_LINK_TRAIN_VOL_EMP_MASK_SNB;
1906 mask
916 ironlake_wait_panel_status(struct intel_dp *intel_dp, u32 mask, u32 value) argument
[all...]
H A Dintel_sdvo.c2203 uint16_t mask = 0; local
2206 /* Make a mask of outputs less than or equal to our own priority in the
2211 mask |= SDVO_OUTPUT_LVDS1;
2213 mask |= SDVO_OUTPUT_LVDS0;
2215 mask |= SDVO_OUTPUT_TMDS1;
2217 mask |= SDVO_OUTPUT_TMDS0;
2219 mask |= SDVO_OUTPUT_RGB1;
2221 mask |= SDVO_OUTPUT_RGB0;
2226 mask &= sdvo->caps.output_flags;
2227 num_bits = hweight16(mask);
[all...]
H A Dintel_overlay.c495 u32 mask, shift, ret; local
497 mask = 0x1f;
500 mask = 0x3f;
503 ret = ((offset + width + mask) >> shift) - (offset >> shift);
H A Di915_drv.h1633 i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
1636 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
H A Dintel_display.c7942 /* Computes which crtcs are affected and sets the relevant bits in the mask. For
7957 * to be part of the prepare_pipes mask. We don't (yet) support global
8024 /* ... and mask these out. */
8100 #define for_each_intel_crtc_masked(dev, mask, _intel_crtc) \
8104 if (mask & (1 <<(_intel_crtc)->pipe)) \
8129 #define PIPE_CONF_CHECK_FLAGS(name, mask) \
8130 if ((current_config->name ^ pipe_config->name) & (mask)) { \
8133 current_config->name & (mask), \
8134 pipe_config->name & (mask)); \
/solaris-x11-s12/open-src/proto/sun-ext-protos/include/
H A Dtransovlstr.h186 CARD32 mask B32;
/solaris-x11-s12/open-src/app/gfx-utils/sun-src/fbconf_xorg/xf86/
H A DMonitor.c933 int mask; /* Mode flag mask bit */ member in struct:__anon57
1031 if (mlptr->ml_flags & modeFlagTab[i].mask) {
1147 if (mlptr->ml_flags & modeFlagTab[i].mask) {

Completed in 4461 milliseconds