Searched refs:dpcd (Results 1 - 4 of 4) sorted by relevance

/solaris-x11-s11/open-src/kernel/drm/src/
H A Ddrm_dp_helper.c103 void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { argument
104 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
107 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
110 void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { argument
111 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
114 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
144 drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE]) argument
146 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
/solaris-x11-s11/open-src/kernel/sys/drm/
H A Ddrm_dp_helper.h352 void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
353 void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
358 int drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
361 drm_dp_max_lane_count(u8 dpcd[DP_RECEIVER_CAP_SIZE]) argument
363 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
/solaris-x11-s11/open-src/kernel/i915/src/
H A Dintel_dp.c78 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE];
146 max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
691 int max_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
789 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
790 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) {
1268 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
2081 drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
2154 drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
2282 // char dpcd_hex_dump[sizeof(intel_dp->dpcd) * 3];
2284 if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd,
2413 uint8_t *dpcd = intel_dp->dpcd; local
[all...]
H A Dintel_drv.h469 uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; member in struct:intel_dp

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