Searched refs:s32 (Results 1 - 25 of 83) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_x540.h40 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
43 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed,
45 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw);
46 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw);
49 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);
50 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
51 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
53 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);
54 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
56 s32 ixgbe_update_eeprom_checksum_X54
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H A Dixgbe_x550.h40 s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);
41 s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);
42 s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);
44 s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw);
45 s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw);
46 s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw);
47 s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw);
48 s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);
49 s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val);
50 s32 ixgbe_update_flash_X55
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H A Dixgbe_82598.h39 s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw);
40 s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw);
42 s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
43 s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
44 s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
45 s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
46 s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
49 s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw);
52 s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
H A Dixgbe_82599.h38 s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
46 s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
49 s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
51 s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed speed,
53 s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw);
55 s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw);
56 s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
57 s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
58 s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw);
59 s32 ixgbe_identify_phy_8259
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H A Dixgbe_api.h42 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
44 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
45 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
46 extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
47 extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
48 extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
49 extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
51 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
52 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
53 s32 ixgbe_reset_h
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H A Dixgbe_common.h55 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
56 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
57 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
58 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
59 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
60 s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
61 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
63 s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
66 s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
68 s32 ixgbe_get_pba_block_siz
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H A Dixgbe_dcb_82598.h82 s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *, u8);
85 s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *);
86 s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *,
88 s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *,
92 s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *,
94 s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *,
96 s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, u8 *);
99 s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *, int, u16 *, u16 *, u8 *, u8 *);
H A Dixgbe_phy.h155 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
158 s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
159 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
160 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
161 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
163 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
165 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
167 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
169 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
170 s32 ixgbe_setup_phy_link_speed_generi
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H A Dixgbe_dcb.h139 s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *);
142 s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int);
143 s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *,
147 s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *, u8, u8 *);
148 s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *);
151 s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *);
152 s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8);
153 s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8);
156 s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *,
158 s32 ixgbe_dcb_config_tx_data_arbiter_ce
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H A Dixgbe_dcb_82599.h130 s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *, u8, u8 *);
133 s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *,
135 s32 ixgbe_dcb_get_tc_stats_82599(struct ixgbe_hw *,
137 s32 ixgbe_dcb_get_pfc_stats_82599(struct ixgbe_hw *,
141 s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *,
143 s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *,
145 s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, u8 *,
149 s32 ixgbe_dcb_config_82599(struct ixgbe_hw *,
152 s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *, int, u16 *, u16 *, u8 *,
H A Dixgbe_api.c81 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
83 s32 status;
130 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
132 s32 ret_val = IXGBE_SUCCESS;
234 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
247 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
263 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
290 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
318 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
332 s32 ixgbe_get_san_mac_add
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H A Dixgbe_mbx.h140 s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);
141 s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);
142 s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
143 s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
144 s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);
145 s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
146 s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
H A Dixgbe_mbx.c47 s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
50 s32 ret_val = IXGBE_ERR_MBX;
73 s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
76 s32 ret_val = IXGBE_SUCCESS;
97 s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
100 s32 ret_val = IXGBE_ERR_MBX;
117 s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
120 s32 ret_val = IXGBE_ERR_MBX;
137 s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
140 s32 ret_va
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/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_api.h54 s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);
55 s32 e1000_set_mac_type(struct e1000_hw *hw);
56 s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device);
57 s32 e1000_init_mac_params(struct e1000_hw *hw);
58 s32 e1000_init_nvm_params(struct e1000_hw *hw);
59 s32 e1000_init_phy_params(struct e1000_hw *hw);
60 s32 e1000_init_mbx_params(struct e1000_hw *hw);
61 s32 e1000_get_bus_info(struct e1000_hw *hw);
64 s32 e1000_force_mac_fc(struct e1000_hw *hw);
65 s32 e1000_check_for_lin
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H A De1000_mac.h41 s32 e1000_null_ops_generic(struct e1000_hw *hw);
42 s32 e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);
47 s32 e1000_null_set_obff_timer(struct e1000_hw *hw, u32 a);
48 s32 e1000_blink_led_generic(struct e1000_hw *hw);
49 s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw);
50 s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw);
51 s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw);
52 s32 e1000_cleanup_led_generic(struct e1000_hw *hw);
53 s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw);
54 s32 e1000_poll_fiber_serdes_link_generi
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H A De1000_nvm.h45 s32 e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
47 s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);
48 s32 e1000_null_write_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
49 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw);
51 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
52 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
53 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
55 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size);
56 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
59 s32 e1000_write_pba_ra
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H A De1000_phy.h39 s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
41 s32 e1000_null_lplu_state(struct e1000_hw *hw, bool active);
42 s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
43 s32 e1000_null_set_page(struct e1000_hw *hw, u16 data);
44 s32 e1000_read_i2c_byte_null(struct e1000_hw *hw, u8 byte_offset,
46 s32 e1000_write_i2c_byte_null(struct e1000_hw *hw, u8 byte_offset,
48 s32 e1000_check_downshift_generic(struct e1000_hw *hw);
49 s32 e1000_check_polarity_m88(struct e1000_hw *hw);
50 s32 e1000_check_polarity_igp(struct e1000_hw *hw);
51 s32 e1000_check_polarity_if
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H A De1000_mbx.h95 s32 e1000_read_mbx(struct e1000_hw *, u32 *, u16, u16);
96 s32 e1000_write_mbx(struct e1000_hw *, u32 *, u16, u16);
97 s32 e1000_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16);
98 s32 e1000_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16);
99 s32 e1000_check_for_msg(struct e1000_hw *, u16);
100 s32 e1000_check_for_ack(struct e1000_hw *, u16);
101 s32 e1000_check_for_rst(struct e1000_hw *, u16);
103 s32 e1000_init_mbx_params_vf(struct e1000_hw *);
104 s32 e1000_init_mbx_params_pf(struct e1000_hw *);
H A De1000_i210.h39 s32 e1000_update_flash_i210(struct e1000_hw *hw);
40 s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);
41 s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);
42 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
44 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
46 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
48 s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
50 s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
52 s32 e1000_init_hw_i210(struct e1000_hw *hw);
H A De1000_manage.h40 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
41 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
43 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
45 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
49 s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length);
50 s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length);
H A De1000_vf.c39 static s32 e1000_init_phy_params_vf(struct e1000_hw *hw);
40 static s32 e1000_init_nvm_params_vf(struct e1000_hw *hw);
42 static s32 e1000_acquire_vf(struct e1000_hw *hw);
43 static s32 e1000_setup_link_vf(struct e1000_hw *hw);
44 static s32 e1000_get_bus_info_pcie_vf(struct e1000_hw *hw);
45 static s32 e1000_init_mac_params_vf(struct e1000_hw *hw);
46 static s32 e1000_check_for_link_vf(struct e1000_hw *hw);
47 static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,
49 static s32 e1000_init_hw_vf(struct e1000_hw *hw);
50 static s32 e1000_reset_hw_v
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H A De1000_api.c44 s32 e1000_init_mac_params(struct e1000_hw *hw)
46 s32 ret_val = E1000_SUCCESS;
70 s32 e1000_init_nvm_params(struct e1000_hw *hw)
72 s32 ret_val = E1000_SUCCESS;
96 s32 e1000_init_phy_params(struct e1000_hw *hw)
98 s32 ret_val = E1000_SUCCESS;
122 s32 e1000_init_mbx_params(struct e1000_hw *hw)
124 s32 ret_val = E1000_SUCCESS;
150 s32 e1000_set_mac_type(struct e1000_hw *hw)
153 s32 ret_va
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H A De1000_mbx.c41 static s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
53 static s32 e1000_null_mbx_transact(struct e1000_hw E1000_UNUSEDARG *hw,
72 s32 e1000_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
75 s32 ret_val = -E1000_ERR_MBX;
98 s32 e1000_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
101 s32 ret_val = E1000_SUCCESS;
121 s32 e1000_check_for_msg(struct e1000_hw *hw, u16 mbx_id)
124 s32 ret_val = -E1000_ERR_MBX;
141 s32 e1000_check_for_ack(struct e1000_hw *hw, u16 mbx_id)
144 s32 ret_va
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H A De1000_vf.h201 s32 (*init_params)(struct e1000_hw *);
202 s32 (*check_for_link)(struct e1000_hw *);
204 s32 (*get_bus_info)(struct e1000_hw *);
205 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
207 s32 (*reset_hw)(struct e1000_hw *);
208 s32 (*init_hw)(struct e1000_hw *);
209 s32 (*setup_link)(struct e1000_hw *);
212 s32 (*read_mac_addr)(struct e1000_hw *);
229 s32 (*init_params)(struct e1000_hw *hw);
230 s32 (*rea
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/illumos-gate/usr/src/grub/grub-0.97/stage2/
H A Djfs.h102 typedef int s32; typedef
177 s32 s_bsize; /* 4: aggregate block size in bytes;
182 s32 s_pbsize; /* 4: hardware/LVM block size in bytes */
194 s32 s_compress; /* 4: > 0 if data compression */
204 s32 s_logserial; /* 4: log serial number at aggregate mount */
211 s32 s_fsckloglen; /* 4: Number of filesystem blocks reserved for
452 s32 di_fileset; /* 4: fileset number */
477 s32 di_next_index; /* 4: Next available dir_table index */
479 s32 di_acltype; /* 4: Type of ACL */
573 s32 iagnu
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