75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/******************************************************************************
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi Copyright (c) 2001-2015, Intel Corporation
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi All rights reserved.
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75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi modification, are permitted provided that the following conditions are met:
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi 1. Redistributions of source code must retain the above copyright notice,
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi this list of conditions and the following disclaimer.
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75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi notice, this list of conditions and the following disclaimer in the
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi documentation and/or other materials provided with the distribution.
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi 3. Neither the name of the Intel Corporation nor the names of its
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75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi******************************************************************************/
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchibool e1000_get_flash_presence_i210(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_update_flash_i210(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchivoid e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
13485e69b5429e6c7d27301fb3c0deee0e93768aGarrett D'Amores32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
13485e69b5429e6c7d27301fb3c0deee0e93768aGarrett D'Amores32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchis32 e1000_init_hw_i210(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define INVM_DWORD_TO_WORD_DATA(invm_dword) \
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE = 0x03,
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi E1000_INVM_RSA_KEY_SHA256_STRUCTURE = 0x04,
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS 8
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS 1
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define ID_LED_DEFAULT_I210 ((ID_LED_OFF1_ON2 << 8) | \
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define ID_LED_DEFAULT_I210_SERDES ((ID_LED_DEF1_DEF2 << 8) | \
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* NVM offset defaults for I211 devices */
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi/* PLL Defines */