Searched refs:MI_FLUSH (Results 1 - 3 of 3) sorted by relevance

/illumos-gate/usr/src/uts/intel/io/drm/
H A Di915_dma.c307 return 1; /* MI_FLUSH */
576 OUT_RING(MI_FLUSH | MI_READ_FLUSH);
H A Di915_gem.c670 uint32_t cmd = MI_FLUSH | MI_NO_WRITE_FLUSH;
977 * invalidated with every MI_FLUSH.
984 * are flushed at any MI_FLUSH.
987 cmd = MI_FLUSH | MI_NO_WRITE_FLUSH;
1503 * emit an MI_FLUSH and drm_agp_chipset_flush
1529 * MI_FLUSH and drm_agp_chipset_flush
1534 * This will include an MI_FLUSH to get the data from GPU
1537 * Another MI_FLUSH in i915_gem_flush (eliminate this somehow?)
1560 * MI_FLUSH
1571 * MI_FLUSH
[all...]
H A Di915_drv.h725 #define MI_FLUSH (0x04 << 23) macro

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