Searched refs:MDIO_PMA_DEVAD (Results 1 - 2 of 2) sorted by relevance
| /illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/ |
| H A D | bnxe_clc.c | 4037 {MDIO_PMA_DEVAD, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0},
4042 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2},
4197 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2}
4223 elink_cl45_write(cb, phy, MDIO_PMA_DEVAD,
4226 elink_cl45_write(cb, phy, MDIO_PMA_DEVAD,
4380 elink_cl45_read_and_write(cb, phy, MDIO_PMA_DEVAD,
6682 MDIO_PMA_DEVAD,
7807 elink_cl45_read(cb, phy, MDIO_PMA_DEVAD,
7809 elink_cl45_read(cb, phy, MDIO_PMA_DEVAD,
7887 MDIO_PMA_DEVAD,
[all...] |
| /illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
| H A D | clc_reg.h | 297 #define MDIO_PMA_DEVAD 0x1 macro
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