Searched refs:BIT4 (Results 1 - 25 of 36) sorted by relevance

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/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyPei/
H A DFdc.h37 #define DRVA_MOTOR_ON BIT4 // Turn On Drive A Motor
44 #define MSR_CB BIT4 // FDC Busy
99 #define STS0_EC BIT4 // Equipment Check
115 #define STS1_OR BIT4 // Overrun/Underrun: Becomes set if FDC does not receive CPU or DMA service within the required time interval
130 #define STS2_WC BIT4 // Wrong Cylinder: The track address from sector ID field is different from the track address maintained inside FDC
147 #define STS3_T0 BIT4 // Track 0
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/UhciDxe/
H A DUhciReg.h53 #define USBPORTSC_LSL BIT4 // Line Status Low BIT
74 #define USBCMD_FGR BIT4 // Force Global Resume
86 #define USBSTS_HCPE BIT4 // Host Controller Process Error
92 #define USBTD_BABBLE BIT4 // Babble condition
/vbox/src/VBox/Devices/EFI/Firmware/SecurityPkg/Include/Library/
H A DTpmCommLib.h143 #define TIS_PC_ACC_SEIZED BIT4
175 #define TIS_PC_STS_DATA BIT4
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/
H A DIsaFloppy.h209 #define DRVA_MOTOR_ON BIT4
232 #define MSR_CB BIT4
343 #define STS0_EC BIT4
389 #define STS1_OR BIT4
423 #define STS2_WC BIT4
443 #define STS3_T0 BIT4
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Include/Protocol/
H A DFormBrowserEx.h40 #define BROWSER_ACTION_EXIT BIT4
/vbox/src/VBox/Devices/EFI/Firmware/ShellPkg/Include/Library/
H A DHandleParsingLib.h102 #define HR_BUS_DRIVER BIT4 // a bus driver (hybrid?)
110 #define HR_VALID_MASK (BIT1|BIT2|BIT3|BIT4|BIT5|BIT6|BIT7|BIT8|BIT9|BIT10|BIT11)
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BasePrintLib/
H A DPrintLibInternal.h29 #define LONG_TYPE BIT4
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h142 #define XHC_USBSTS_PCD BIT4 // Port Change Detect
161 #define XHC_PORTSC_RESET BIT4 // Port Reset
178 #define XHC_HUB_PORTSC_RESET BIT4 // Hub's Port Reset
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Guid/
H A DCper.h154 #define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4
227 #define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4
341 #define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4
394 #define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4
445 #define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4
520 #define EFI_MS_CHECK_RESTARTABLE_VALID BIT4
568 #define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4
755 #define EFI_PLATFORM_MEMORY_CARD_VALID BIT4
827 #define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4
911 #define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4
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/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/
H A DIdeData.h289 #define TIME1 BIT4
/vbox/src/VBox/Devices/EFI/Firmware/OptionRomPkg/AtapiPassThruDxe/
H A DAtapiPassThru.h212 #define IDNF_ERR BIT4 ///< ID Not Found
221 #define SENSE_KEY_ERR (BIT7 | BIT6 | BIT5 | BIT4)
229 #define DEV BIT4
246 #define DSC BIT4 ///< Disk Seek Complete
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/
H A DAhciMode.h99 #define EFI_AHCI_PORT_IS_UFS BIT4
123 #define EFI_AHCI_PORT_CMD_FRE BIT4
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/IndustryStandard/
H A DPci22.h579 #define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
593 #define EFI_PCI_BRIDGE_CONTROL_VGA_16 BIT4 ///< 0x0010
613 #define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
H A DAcpi30.h234 #define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
244 #define EFI_ACPI_3_0_PWR_BUTTON BIT4
H A DAcpi20.h215 #define EFI_ACPI_2_0_PWR_BUTTON BIT4
H A DAcpi40.h192 #define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4
202 #define EFI_ACPI_4_0_PWR_BUTTON BIT4
/vbox/src/VBox/Devices/PC/ipxe/src/include/ipxe/efi/IndustryStandard/
H A DPci22.h581 #define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
595 #define EFI_PCI_BRIDGE_CONTROL_VGA_16 BIT4 ///< 0x0010
615 #define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Library/BaseSerialPortLib16550/
H A DBaseSerialPortLib16550.c40 #define B_UART_MSR_CTS BIT4
/vbox/src/VBox/Devices/EFI/Firmware/BaseTools/Source/C/Include/Common/
H A DBaseTypes.h227 #define BIT4 0x00000010 macro
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/UhciPei/
H A DUhcPeim.h47 #define USBCMD_FGR BIT4 /* Force Global Resume */
58 #define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
85 #define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
/vbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/
H A DDebugCommunicationLibUsb.c282 MmioAnd32((UINTN)&DebugPortRegister->ControlStatus, (UINT32)~BIT4);
374 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, BIT4);
1014 MmioAnd32((UINTN)&UsbDebugPortRegister->ControlStatus, (UINT32)~BIT4);
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/
H A DPs2Keyboard.h197 #define KEYBOARD_STATUS_REGISTER_ENABLE_FLAG BIT4 ///< 0 - Keyboard is disable; 1 - Keyboard is enable
/vbox/src/VBox/Devices/EFI/Firmware/OptionRomPkg/CirrusLogic5430Dxe/
H A DCirrusLogic5430.h70 #define PIXEL_GREEN_MASK (BIT4 | BIT3 | BIT2)
/vbox/src/VBox/Devices/EFI/Firmware/OvmfPkg/QemuVideoDxe/
H A DQemu.h65 #define PIXEL_GREEN_MASK (BIT4 | BIT3 | BIT2)
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/
H A Dp80211hdr.h173 #define WLAN_GET_FC_FSTYPE(n) ((((UINT16)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4)

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