Searched refs:readl (Results 1 - 7 of 7) sorted by relevance

/osnet-11/usr/src/grub/grub-0.97/netboot/
H A Dns83820.c423 cfg = readl(ns->base + CFG) ^ SPDSTS_POLARITY;
426 tbisr = readl(ns->base + TBISR);
427 tanar = readl(ns->base + TANAR);
428 tanlpar = readl(ns->base + TANLPAR);
436 writel(readl(ns->base + TXCFG)
439 writel(readl(ns->base + RXCFG) | RXCFG_RX_FD,
442 writel(readl(ns->base + GPIOR) | GPIOR_GP1_OUT,
453 writel((readl(ns->base + TXCFG)
456 writel(readl(ns->base + RXCFG) & ~RXCFG_RX_FD,
459 writel(readl(n
[all...]
H A Dforcedeth.c346 readl(base);
362 } while ((readl(base + offset) & mask) != target);
402 reg = readl(base + NvRegAdapterControl);
408 reg = readl(base + NvRegMIIControl);
432 } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
439 retval = readl(base + NvRegMIIData);
444 reg = readl(base + NvRegAdapterControl);
457 if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
719 writel(readl(base + NvRegTransmitterStatus),
724 writel(readl(bas
[all...]
H A Dw89c840.c155 #undef readl macro
161 #define readl inl macro
387 u32 intr_status = readl(ioaddr + IntrStatus);
719 #define eeprom_delay(ee_addr) readl(ee_addr)
752 retval = (retval << 1) | ((readl(ee_addr) & EE_DataIn) ? 1 : 0);
769 #define mdio_delay(mdio_addr) readl(mdio_addr)
816 retval = (retval << 1) | ((readl(mdio_addr) & MDIO_DataIn) ? 1 : 0);
H A Dio.h84 #define readl(addr) (*(volatile unsigned int *) (addr)) macro
H A De1000.c155 readl((a)->hw_addr + E1000_##reg) : \
156 readl((a)->hw_addr + E1000_82542_##reg))
165 readl((a)->hw_addr + E1000_##reg + ((offset) << 2)) : \
166 readl((a)->hw_addr + E1000_82542_##reg + ((offset) << 2)))
H A Dr8169.c126 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
H A Dtg3.c108 #define tr32(reg) readl(tg3.regs + (reg))

Completed in 68 milliseconds