Searched refs:tte (Results 1 - 25 of 54) sorted by relevance

123

/illumos-gate/usr/src/uts/sfmmu/vm/
H A Dhat_kdi.c43 tte_t tte; local
48 if (kdi_vatotte(va, KCONTEXT, &tte) < 0)
51 *pap = (TTE_TO_PFN((caddr_t)va, &tte) << MMU_PAGESHIFT) |
/illumos-gate/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu.h233 * tte = reg containing tte
236 #define ITLB_STUFF(tte, scr1, scr2, scr3, scr4) \
244 mov tte, %o2; \
260 * tte = reg containing tte
263 #define DTLB_STUFF(tte, scr1, scr2, scr3, scr4) \
271 mov tte, %o2; \
287 * tte = reg containing tte
[all...]
H A Dmach_sfmmu.c174 * We set the lock bit in the tte to lock the translation in
189 * We set the lock bit in the tte to lock the translation in
205 tte_t tte; local
217 sfmmu_memtte(&tte, pfn, attr, TTE4M);
218 ASSERT(TTE_IS_MOD(&tte));
226 TTE_SET_LOCKED(&tte);
228 sfmmu_tteload(kas.a_hat, &tte, va, NULL, flags);
229 bigktsb_ttes[i] = tte;
241 * Setup the kernel's locked tte's
254 uint64_t tte; local
291 tte_t tte; local
[all...]
/illumos-gate/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu.c125 * We set the lock bit in the tte to lock the translation in
128 * kernel using 32M or 256M tte's on Panther cpus.
142 * We set the lock bit in the tte to lock the translation in
158 tte_t tte; local
170 sfmmu_memtte(&tte, pfn, attr, TTE4M);
171 ASSERT(TTE_IS_MOD(&tte));
179 TTE_SET_LOCKED(&tte);
181 sfmmu_tteload(kas.a_hat, &tte, va, NULL, flags);
182 bigktsb_ttes[i] = tte;
222 * Setup the kernel's locked tte'
255 uint64_t tte; local
290 tte_t tte; local
[all...]
H A Dmach_sfmmu.h212 * tte = reg containing tte
215 #define ITLB_STUFF(tte, scr1, scr2, scr3, scr4) \
216 stxa tte, [%g0]ASI_ITLB_IN
222 * tte = reg containing tte
225 #define DTLB_STUFF(tte, scr1, scr2, scr3, scr4) \
226 stxa tte, [%g0]ASI_DTLB_IN
233 * tte = reg containing tte
[all...]
H A Dmach_kpm.c188 tte_t tte; local
199 KPM_TTE_VCACHED(tte.ll, pfn, szc);
200 sfmmu_kpm_load_tsb(vaddr, &tte, shift);
335 tte_t tte; local
340 KPM_TTE_VCACHED(tte.ll, pfn, szc);
341 sfmmu_kpm_load_tsb(vaddr, &tte, shift);
694 tte_t tte; local
754 /* tte assembly */
756 KPM_TTE_VCACHED(tte.ll, pfn, TTE8K);
758 KPM_TTE_VUNCACHED(tte
1207 tte_t tte; local
1538 tte_t tte; local
1639 tte_t tte; local
[all...]
/illumos-gate/usr/src/cmd/mdb/sparc/v9/kmdb/
H A Dkaif_handlers.s99 * tte = reg containing tte
103 #define KAIF_ITLB_STUFF(tte, ouch, scr1, scr2, scr3, scr4) \
113 mov tte, %o2; \
132 * tte = reg containing tte
136 #define KAIF_DTLB_STUFF(tte, ouch, scr1, scr2, scr3, scr4) \
146 mov tte, %o2; \
171 #define KAIF_DTLB_STUFF(tte, ouch, scr1, scr2, scr3, scr4) \
172 DTLB_STUFF(tte, scr
[all...]
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_common_mmu.c526 uint_t tte; member in struct:heap_lp_page_size
572 uint_t tte = page_szc(segkmem_lpsize); local
575 if (heaplp_use_dt512 == 0 || tte > TTE4M) {
577 tte = TTE8K;
580 new_cext_nucleus = TAGACCEXT_MKSZPAIR(tte, TTE8K);
581 new_cext_primary = TAGACCEXT_MKSZPAIR(TTE8K, tte);
593 uint_t tte = TTE8K; local
613 tte = p_lpgsz->tte;
618 if (lpsize == TTEBYTES(p_lpgsz->tte)
[all...]
H A Dmach_cpu_module.c194 itlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag) argument
199 dtlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag) argument
/illumos-gate/usr/src/uts/sun4u/sys/pci/
H A Dpci_iommu.h69 * boiler plate for tte (everything except the pfn)
75 #define TTE_IS_INVALID(tte) (((tte) & COMMON_IOMMU_TTE_V) == 0x0ull)
220 #define IOMMU_TTE2CTX(tte) \
221 (((tte) >> (IOMMU_TTE_CTX_SHIFT - 32)) & IOMMU_CTX_MASK)
H A Dpci_dma.h267 #define PCI_GET_MP_TTE(tte) \
268 (((uint64_t)(uintptr_t)(tte) >> 5) << (32 + 5) | \
269 ((uint32_t)(uintptr_t)(tte)) & 0x12)
270 #define PCI_SAVE_MP_TTE(mp, tte) \
271 (mp)->dmai_tte = (caddr_t)(HI32(tte) | ((tte) & 0x12))
/illumos-gate/usr/src/uts/sun4v/sys/
H A Dlpad.h57 tte_t tte; member in struct:lpad_map
/illumos-gate/usr/src/uts/sun4v/promif/
H A Dpromif_emul.c239 tte_t tte; local
281 pfn = sfmmu_vatopfn((caddr_t)vaddr, KHATID, &tte);
284 tte.tte_inthi = promt->tte_hi;
285 tte.tte_intlo = promt->tte_lo;
287 promt->virt_hi, promt->virt_lo), &tte);
293 ASSERT(!TTE_IS_LOCKED(&tte));
294 ASSERT(TTE_IS_8K(&tte));
/illumos-gate/usr/src/psm/stand/cpr/sparcv9/sun4u/
H A Dpages.c256 tte_t tte; local
262 get_dtlb_entry(dtlb_index, &vaddr, &tte);
263 if (TTE_IS_LOCKED(&tte)) {
264 tte.ll = 0;
265 set_dtlb_entry(dtlb_index, (caddr_t)0, &tte);
H A Dutil.c430 tte_t tte; local
432 tte.tte_inthi = TTE_VALID_INT | TTE_SZ_INT(size) |
434 tte.tte_intlo = TTE_PFN_INTLO(ppn) | TTE_LCK_INT |
436 set_dtlb_entry(dtlb_index, vaddr, &tte);
H A Dmachdep.c177 (*tfunc)(utp->index, virt, &utp->tte);
182 TTEBYTES(utp->tte.tte_size));
/illumos-gate/usr/src/boot/sys/boot/sparc64/loader/
H A Dmain.c68 #include <machine/tte.h>
945 pmap_print_tte_sun4u(tte_t tag, tte_t tte) argument
949 page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK],
951 printf(tte & TD_W ? "W " : " ");
952 printf(tte & TD_P ? "\e[33mP\e[0m " : " ");
953 printf(tte & TD_E ? "E " : " ");
954 printf(tte & TD_CV ? "CV " : " ");
955 printf(tte & TD_CP ? "CP " : " ");
956 printf(tte & TD_L ? "\e[32mL\e[0m " : " ");
957 printf(tte
966 tte_t tag, tte; local
[all...]
/illumos-gate/usr/src/uts/sun4v/os/
H A Dlpad.c143 lpm->tte = ktext_tte;
152 lpm->tte = kdata_tte;
164 lpm->tte = kdata_tte;
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_dma.h236 #define PX_GET_MP_TTE(tte) \
237 (((uint64_t)(uintptr_t)(tte) >> 5) << (32 + 5) | \
238 ((uint32_t)(uintptr_t)(tte)) & (PCI_MAP_ATTR_READ | \
242 #define PX_SAVE_MP_TTE(mp, tte) \
243 (mp)->dmai_tte = (caddr_t)((uintptr_t)HI32(tte) | ((tte) & \
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_iommu.c127 DEBUG2(DBG_ATTACH, dip, "iommu_create: fast tsb tte addr: %x + %x\n",
269 uint64_t tte = PCI_GET_MP_TTE(mp->dmai_tte); local
283 volatile uint64_t cur_tte = IOMMU_PTOB(pfn) | tte;
288 "iommu_map_pages: pg_index=%x tte=%08x.%08x\n",
517 uint64_t tte = lddphys(obp_tsb_pa + i * 8); local
520 if (TTE_IS_INVALID(tte)) {
525 base_tte_addr[i] = tte;
528 (uint_t)(tte >> 32), (uint_t)(tte & 0xffffffff));
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dcpu_module.h194 void itlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag);
195 void dtlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag);
H A Dcpr_impl.h78 tte_t tte; /* tte data */ member in struct:sun4u_tlb
101 * cpr_obp_tte_str for translating kernel mappings, unix-tte
/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.s204 * tte = TSBE TTE (ro)
211 #define TSB_INSERT_UNLOCK_ENTRY(tsbep, tte, tagtarget, tmp1) \
213 stxa tte, [tmp1]ASI_MEM /* write tte data */ ;\
216 stxa tagtarget, [tmp1]ASI_MEM /* write tte tag & unlock */
220 #define TSB_INSERT_UNLOCK_ENTRY(tsbep, tte, tagtarget,tmp1) \
221 stxa tte, [tsbep + TSBE_TTE]%asi /* write tte data */ ;\
223 stxa tagtarget, [tsbep + TSBE_TAG]%asi /* write tte tag & unlock */
231 * tte
[all...]
/illumos-gate/usr/src/uts/sun4u/os/
H A Dcpr_impl.c313 tte_t tte; local
316 (*ctip->reader)((uint_t)tlb_index, &tte, &va_tag);
317 if (va_tag && TTE_IS_VALID(&tte))
318 (*ctip->filter)(tlb_index, &tte, va_tag, ctip);
346 ctip->dst->tte.ll = ttep->ll;
368 (*ctip->writer)((uint_t)index, &clr.tte, &clr.va_tag);
387 (*wrfunc)((uint_t)listp->index, &clr.tte, &clr.va_tag);
437 * a 8K tte would conflict with a 4MB tte. eg: the cpr module
456 * a tte b
687 tte_t tte; local
[all...]
/illumos-gate/usr/src/cmd/mdb/sun4u/modules/unix/
H A Dsfmmu.c201 tte_t tte; local
320 tte = sfhmep->hme_tte;
321 SFMMU_VTOP_DBG_VRB("tte=%llx ", tte.ll);
322 if (TTE_IS_VALID(&tte)) {
323 start_pfn = TTE_TO_TTEPFN(&tte);
325 (addr & TTE_PAGE_OFFSET(tte.tte_size));

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