Searched refs:base_hi (Results 1 - 5 of 5) sorted by relevance

/illumos-gate/usr/src/boot/sys/boot/ofw/libofw/
H A Dlibofw.h85 cell_t base_hi; member in struct:ofw_reg2
/illumos-gate/usr/src/uts/i86pc/os/
H A Dlgrpplat.c3425 uint32_t base_hi; member in struct:opt_dram_addr_map
3528 uint32_t base_hi; local
3546 base_hi = 0;
3550 base_hi = dram_map[node].base_hi =
3605 memnode_info[node].start = btop(OPT_DRAMADDR(base_hi, base_lo));
/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c3085 uint32_t base, uint32_t base_hi, uint_t reg_offset)
3142 base_hi = 0;
3147 addition.pci_phys_mid = base_hi;
3935 uint32_t request, base, base_hi, size; local
3963 base_hi = pci_config_get32(config_handle, i+4);
3965 base_hi = 0;
3972 size, base, base_hi, i) != PCICFG_SUCCESS) {
3084 pcicfg_update_assigned_prop_value(dev_info_t *dip, uint32_t size, uint32_t base, uint32_t base_hi, uint_t reg_offset) argument
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c3305 uint32_t base, uint32_t base_hi, uint_t reg_offset)
3363 base_hi = 0;
3368 addition.pci_phys_mid = base_hi;
4787 uint32_t request, base, base_hi, size; local
4815 base_hi = pci_config_get32(config_handle, i+4);
4817 base_hi = 0;
4824 size, base, base_hi, i) != PCICFG_SUCCESS) {
3304 pcicfg_update_assigned_prop_value(dev_info_t *dip, uint32_t size, uint32_t base, uint32_t base_hi, uint_t reg_offset) argument
/illumos-gate/usr/src/uts/intel/io/pci/
H A Dpci_boot.c2356 uint_t base, base_hi, type; local
2526 base_hi = pci_getl(bus, dev, func, offset + 4);
2530 base_hi = 0;
2577 assigned[nasgn].pci_phys_mid = base_hi;

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