Searched refs:MDIO_AN_REG_CL37_FC_LD (Results 1 - 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h437 #define MDIO_AN_REG_CL37_FC_LD 0xffe4 macro
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c3850 MDIO_AN_REG_CL37_FC_LD, &ld_pause);
7859 MDIO_AN_REG_CL37_FC_LD, &ld_pause);
8063 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, &cl37_val);
8087 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, cl37_val);
8227 elink_cl45_read(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, &tmp1);
8228 elink_cl45_write(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD,
9978 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, 0x0020);

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