Searched refs:MDIO_AN_REG_CL37_AN (Results 1 - 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h436 #define MDIO_AN_REG_CL37_AN 0xffe0 macro
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c8233 elink_cl45_write(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
9819 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
9980 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
10138 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300);
10147 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x0100);

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