Searched refs:CPU (Results 1 - 25 of 299) sorted by relevance

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/illumos-gate/usr/src/uts/sun4u/os/
H A Dmach_mp_states.c32 * set_idle_cpu is called from idle() when a CPU becomes idle.
38 cpu_idle_ecache_scrub(CPU);
42 * unset_idle_cpu is called from idle() when a CPU is no longer idle.
48 cpu_busy_ecache_scrub(CPU);
H A Dcpc_subr.c56 * Called on the boot CPU during startup.
67 * Make sure the boot CPU gets set up.
69 kcpc_hw_startup_cpu(CPU->cpu_flags);
78 cpu_t *cp = CPU;
/illumos-gate/usr/src/uts/i86pc/os/
H A Dmlsetup.c164 * Initialize the platform type from CPU 0 to ensure that
176 * of the boot CPU. Note that if we choose to support CPUs that have
190 * clear the TSC. If we are on such a CPU, we will clear TSC ourselves
197 * zero, regardless of CPU type; however, we do not expect hypervisors
202 cpuid_getvendor(CPU) == X86_VENDOR_Intel &&
203 cpuid_getfamily(CPU) == 6 &&
204 (cpuid_getmodel(CPU) == 0x2d || cpuid_getmodel(CPU) == 0x3e) &&
231 else if (cpuid_getvendor(CPU) == X86_VENDOR_AMD &&
232 cpuid_getfamily(CPU) <
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H A Dx_call.c59 * on a target(s) CPU's work queue. Any synchronization is handled by passing
62 * Every CPU has xc_work_cnt, which indicates it has messages to process.
131 * Decrement a CPU's work count
140 * Increment a CPU's work count and return the old value
207 * Allocate message buffers for the new CPU.
212 * Allocate a message buffer for every CPU possible
222 * Add a new message buffer to each existing CPU's free
242 * Add one for self messages if CPU hotplug is disabled.
279 * Pause all working CPUs, which ensures that there's no CPU in
314 struct machcpu *mcpup = &(CPU
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H A Dmp_call.c39 * Interrupt another CPU.
40 * This is useful to make the other CPU go through a trap so that
43 * It is possible to be preempted here and be resumed on the CPU
44 * being poked, so it isn't an error to poke the current CPU.
54 * We don't need to receive an ACK from the CPU being poked,
61 * Call a function on a target CPU
72 * Prevent CPU from going off-line
77 * If we are on the target CPU, call the function directly, but raise
82 if (CPU == cp) {
/illumos-gate/usr/src/uts/common/sys/
H A Dftrace.h41 * both for the "ftrace_state" variable, and for the per-CPU variable
73 * Default per-CPU event ring buffer size.
83 extern int ftrace_nent; /* Size of the per-CPU event ring buffer. */
103 if (CPU->cpu_ftrace.ftd_state & FTRACE_ENABLED) \
108 if (CPU->cpu_ftrace.ftd_state & FTRACE_ENABLED) \
113 if (CPU->cpu_ftrace.ftd_state & FTRACE_ENABLED) \
118 if (CPU->cpu_ftrace.ftd_state & FTRACE_ENABLED) \
/illumos-gate/usr/src/cmd/acct/
H A Dprtacct.sh33 LOGIN CPU (MINS) KCORE-MINS CONNECT (MINS) DISK # OF # OF # DISK FEE
/illumos-gate/usr/src/uts/sun4u/serengeti/os/
H A Dsg_unum.c91 if (IS_PANTHER(cpunodes[CPU->cpu_id].implementation) ||
92 IS_JAGUAR(cpunodes[CPU->cpu_id].implementation))
/illumos-gate/usr/src/uts/sun4/ml/
H A Dproc_init.s80 ! Initialize CPU state registers
130 ! we don't have the cache on yet for this CPU.
133 sll %l1, CPTRSHIFT, %l2 ! offset into CPU vector.
134 ldn [%l3 + %l2], %l3 ! pointer to CPU struct
149 ! Resume the thread allocated for the CPU.
/illumos-gate/usr/src/uts/sun4/os/
H A Dmlsetup.c167 THREAD_ONPROC(&t0, CPU);
196 CPU->cpu_thread = &t0;
197 CPU->cpu_dispthread = &t0;
199 CPU->cpu_disp = &cpu0_disp;
200 CPU->cpu_disp->disp_cpu = CPU;
201 CPU->cpu_idle_thread = &t0;
202 CPU->cpu_flags = CPU_RUNNING;
203 CPU->cpu_id = getprocessorid();
204 CPU
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H A Dmp_states.c67 CPU->cpu_m.in_prom = 1;
73 kern_idle[CPU->cpu_id] = 1;
74 while (kern_idle[CPU->cpu_id])
77 CPU->cpu_m.in_prom = 0;
95 cpuid = CPU->cpu_id;
137 int cpuid = CPU->cpu_id;
221 ASSERT(CPU->cpu_id != cpuid);
227 * Declare CPU as no longer being READY to process interrupts and
228 * wait for them to stop. A CPU that is not READY can no longer
251 cmn_err(CE_PANIC, "%s: CPU
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H A Dmp_call.c40 * Interrupt another CPU.
41 * This is useful to make the other CPU go through a trap so that
44 * It is possible to be preempted here and be resumed on the CPU
45 * being poked, so it isn't an error to poke the current CPU.
69 * Call a function on a target CPU
78 * Prevent CPU from going offline
83 * If we are on the target CPU, call the function directly, but raise
88 if (CPU != cp) {
/illumos-gate/usr/src/uts/common/disp/
H A Ddisp_lock.c45 * We check CPU_ON_INTR(CPU) when exiting a disp lock, rather than when
48 * we can safely load the CPU pointer without worrying about it changing.
79 if (CPU_ON_INTR(CPU) != 0)
94 if (CPU_ON_INTR(CPU) != 0)
97 if (CPU->cpu_kprunrun) {
108 if (CPU_ON_INTR(CPU) != 0)
122 if (CPU_ON_INTR(CPU) != 0)
165 if (CPU_ON_INTR(CPU) != 0)
/illumos-gate/usr/src/uts/common/inet/
H A Dtcp_stats.h70 * Both the MIB2 and tcp_stat_t counters are kept per CPU in the array
201 /* Per CPU stats: TCP MIB2, TCP kstat and connection counter. */
209 BUMP_MIB(&(tcps)->tcps_sc[CPU->cpu_seqid]->tcp_sc_mib, x)
212 UPDATE_MIB(&(tcps)->tcps_sc[CPU->cpu_seqid]->tcp_sc_mib, x, y)
217 &((tcps)->tcps_sc[CPU->cpu_seqid]->tcp_sc_stats.x))
228 ((tcps)->tcps_sc[CPU->cpu_seqid]->tcp_sc_stats.x++)
230 ((tcps)->tcps_sc[CPU->cpu_seqid]->tcp_sc_stats.x += (n))
232 ((tcps)->tcps_sc[CPU->cpu_seqid]->tcp_sc_stats.x = (n))
/illumos-gate/usr/src/uts/i86xpv/os/
H A Dxpv_timestamp.c38 * scheduled onto a real CPU. Thus, none of the traditional code in
94 src = &CPU->cpu_m.mcpu_vcpu_info->time;
102 stamp = CPU->cpu_m.mcpu_istamp;
122 CPU->cpu_m.mcpu_istamp != stamp);
/illumos-gate/usr/src/uts/common/os/
H A Dclock_tick.c43 * with a tick to account for their use of CPU time.
93 * Array of online CPU pointers.
96 * Per-CPU, cache-aligned data structures to facilitate multi-threading.
108 * CPU online/offline.
111 * CPU id of the clock() CPU. Used to detect when the clock CPU
115 * CPU set of all online processors that can be X-called.
119 * for the task CPU time resource limit. We lower the number of calls
252 * the CPU se
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H A Dunix_bb.c106 if (CPU_ON_INTR(CPU)) {
121 bb_last_who = CPU->cpu_id;
H A Dcpu_event.c28 * This file implements a CPU event notification mechanism to signal clients
29 * which are interested in CPU related events.
30 * Currently it only supports CPU idle state change events which will be
31 * triggered just before CPU entering hardware idle state and just after CPU
37 * 2) No protection for cpu_idle_cb_state because it's per-CPU data.
67 /* Define normal state for CPU on different platforms. */
84 * To improve cache efficiency and avoid cache false sharing, CPU idle
89 * To access value of property m for CPU n, using following value as index:
95 /* Get callback context handle for current CPU
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H A Dpg.c62 * to a group of CPUs. Depending on the nature of the CPU relationship
80 * class specific callbacks to be invoked when the CPU related system
103 * Bootstrap CPU specific PG data
170 * CPU configuration callbacks
197 * CPU / cpupart configuration callbacks
242 pg_cmt_cpu_startup(CPU);
246 * Perform CPU 0 initialization
254 * Create the physical ID cache for the boot CPU
256 pghw_physid_create(CPU);
263 (void) pg_cpu_init(CPU, B_FALS
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/illumos-gate/usr/src/uts/sun4v/os/
H A Dmach_startup.c58 * CPU IDLE optimization variables/routines
65 * The probe fires when the CPU undergoes an idle state change (e.g. hv yield)
66 * The agument passed is the state to which the CPU is transitioning.
87 mmu_fault_status_area + (MMFSA_SIZE * CPU->cpu_id);
89 intr_init(CPU); /* init interrupt request free list */
103 * Halt the present CPU until awoken via an interrupt
108 cpu_t *cpup = CPU;
116 * If this CPU is online then we should notate our halting
117 * by adding ourselves to the partition's halted CPU
121 if (CPU
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H A Dcpc_subr.c55 * Called on the boot CPU during startup.
66 * Make sure the boot CPU gets set up.
68 kcpc_hw_startup_cpu(CPU->cpu_flags);
77 cpu_t *cp = CPU;
113 * Get next CPU module name from boot_cpu_compatible_list
/illumos-gate/usr/src/cmd/picl/plugins/sun4u/schumacher/frutree/
H A Dsystem-board.info33 NODE CPU location
34 PROP Label string r 0 "CPU 0"
39 NODE CPU location
40 PROP Label string r 0 "CPU 1"
72 * create the fru modules for CPU
74 name:/frutree/chassis/MB/SUNW,Netra-CP3010/CPU?GeoAddr=1
77 name:/frutree/chassis/MB/SUNW,Netra-CP3010/CPU?GeoAddr=2
81 * _fru_parent CPU devices
84 REFPROP _fru_parent /frutree/chassis/MB/SUNW,Netra-CP3010/CPU?GeoAddr=1/cpu-module
87 REFPROP _fru_parent /frutree/chassis/MB/SUNW,Netra-CP3010/CPU
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/illumos-gate/usr/src/uts/sun4u/io/
H A Dtodstarfire.c132 if (cpu_sgnblkp[CPU->cpu_id] != NULL)
133 cpu_sgnblkp[CPU->cpu_id]->sigb_heartbeat++;
195 return (cpunodes[CPU->cpu_id].clock_freq);
/illumos-gate/usr/src/cmd/pools/common/
H A Dutils.h89 #define CPU "cpu" macro
/illumos-gate/usr/src/uts/intel/ia32/os/
H A Dcpc_subr.c26 * x86-specific routines used by the CPU Performance counter driver.
88 * If any CPU-bound contexts exist, we don't need to invalidate
186 return (kcpc_pcbe_tryload(cpuid_getvendorstr(CPU), cpuid_getfamily(CPU),
187 cpuid_getmodel(CPU), cpuid_getstep(CPU)));
191 * Called by the generic framework to check if it's OK to bind a set to a CPU.
204 * Only one logical CPU on each Pentium 4 HT CPU may be bound to at
246 * Only one CPU pe
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