/illumos-gate/usr/src/uts/common/io/aac/ |
H A D | aac_ioctl.c | 657 resp->bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); 681 } else if (qdisk->bus == -1 && qdisk->target == -1 && 685 qdisk->bus = 0;
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H A D | aac.c | 2633 /* Detect phys. bus count and max. target id first */ 2951 uint32_t bus, tgt; local 2955 cmn_err(CE_CONT, "?Fatal error: get bus info error"); 2963 "?Fatal error: bus map changed"); 2976 for (bus = 0; bus < softs->bus_max; bus++) { 2981 dvp->bus = bus; 4373 * If both ASYNC and SYNC bus throttl 7458 uint32_t bus, tgt; local [all...] |
/illumos-gate/usr/src/uts/common/io/e1000api/ |
H A D | e1000_80003es2lan.c | 234 /* bus type/speed/width */ 301 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM; 317 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM; 638 if (hw->bus.func == 1) 827 /* Prevent the PCI-E bus from sticking if there is no TLP connection
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/illumos-gate/usr/src/uts/common/io/ixgbe/core/ |
H A D | ixgbe_82598.c | 1329 struct ixgbe_bus_info *bus = &hw->bus; local 1348 bus->func = 0;
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/illumos-gate/usr/src/common/ficl/ |
H A D | loader.c | 871 * Locator is bus << 8 | device << 3 | fuction 893 * Locator is bus << 8 | device << 3 | fuction 920 * Locator is bus << 8 | device << 3 | fuction (or -1 on error) 944 * Locator is bus << 8 | device << 3 | fuction (or -1 on error) 961 * pcibios-find-device(bus device function -- locator) 963 * converts bus, device, function to locator. 965 * Locator is bus << 8 | device << 3 | fuction 970 uint32_t bus, device, function, locator; local 974 bus = ficlStackPopInteger(ficlVmGetDataStack(pVM)); 976 locator = biospci_locator(bus, devic [all...] |
/illumos-gate/usr/src/uts/common/io/cardbus/ |
H A D | cardbus.c | 272 /* check if this is a PCI bus node */ 281 (strcmp(bus_type, "pciex") != 0)) /* it is not a pci bus type */ 284 /* look for the bus-range property */ 287 "bus-range", (caddr_t)&pci_bus_range, &len) == DDI_SUCCESS) { 296 /* claim the bus range from the bus resource map */ 360 DDI_PROP_DONTPASS, "bus-range", (caddr_t)&bus_range, &len); 380 "bus-range", (int *)&bus_range, 2); 433 * initialize soft state structure for the bus instance. 451 * this bus a 1007 uint8_t bus, device, function; local 1306 int bus, device, func; local [all...] |
/illumos-gate/usr/src/uts/common/io/e1000g/ |
H A D | e1000g_tx.c | 723 if (hw->bus.type == e1000_bus_type_pcix && 947 if (hw->bus.type == e1000_bus_type_pci_express) 1191 * 64-bit PCIX bus transactions occur immediately (minimum possible bus 1195 * 32-bit split-completion data, and in the presence of newer PCIX bus 1197 * additional initiator latency when pre-granted bus ownership). 1199 * This issue does not exist in PCI bus mode, when any agent is operating 1364 * and bus type. *ccountp is set to the number of DMA cookies 1527 if (hw->bus.type == e1000_bus_type_pcix)
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/littleneck/conf/ |
H A D | psvcobj.conf | 60 * <controller> <bus> <addr> <port> <path> 63 * Lists the device paths and the matching (controller, bus, addr, port)
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/illumos-gate/usr/src/cmd/fm/eversholt/files/common/ |
H A D | pci.esc | 59 engine serd.io.pci.nf-dpe-bus@pcibus, 504 * A faulty PCI bus may cause: 514 event fault.io.pci.bus-linkerr-unaf@pcibus, 515 engine=serd.io.pci.nf-dpe-bus@pcibus, FITrate=PCI_BUS_FIT; 517 event fault.io.pci.bus-linkerr-deg@pcibus, FITrate=PCI_BUS_FIT, retire=0; 519 event fault.io.pci.bus-linkerr@pcibus, FITrate=PCI_BUS_FIT; 521 prop fault.io.pci.bus-linkerr-unaf@pcibus (0)-> 525 prop fault.io.pci.bus-linkerr-deg@pcibus (0)-> 529 prop fault.io.pci.bus-linkerr@pcibus (0)-> 591 * SERR# can propagate upstream and may be seen by other devices on the bus [all...] |
/illumos-gate/usr/src/cmd/hal/hald/solaris/ |
H A D | devinfo_storage.c | 225 hal_device_property_set_string (d, "storage.bus", "ide"); 271 hal_device_property_set_int (d, "scsi.bus", 0); 494 hal_device_property_set_string (d, "storage.bus", "platform"); 684 hal_device_property_set_string (d, "storage.bus", "lofi"); 1151 const char *bus; local 1164 * figure out physical device and bus, except for floppy 1173 bus = hal_device_property_get_string (p_d, "info.subsystem"); 1174 if (bus != NULL) { 1176 if (strcmp(bus, busses[i]) == 0) { 1194 hal_device_property_set_string (d, "storage.bus", phys_bu [all...] |
/illumos-gate/usr/src/uts/common/io/1394/targets/scsa1394/ |
H A D | sbp2_bus.c | 30 * 1394 mass storage SBP-2 bus routines 42 #include <sys/sbp2/bus.h> 318 scsa1394_bus_buf_t *sbb; /* bus private structure */ 325 /* allocate bus private structure */ 404 scsa1394_bus_buf_t *sbb; /* bus private structure */ 408 /* allocate bus private structure */
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/illumos-gate/usr/src/uts/common/xen/public/ |
H A D | domctl.h | 482 uint8_t bus; member in struct:xen_domctl_bind_pt_irq::__anon9293::__anon9295
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/illumos-gate/usr/src/uts/sun4u/io/pci/ |
H A D | pcipsy.c | 500 uint32_t bus, dev, phys_hi; local 518 bus = PCI_REG_BUS_G(phys_hi); 524 * B = 0 for bus A, 1 for bus B 525 * SS = dev - 1 for bus A, dev - 2 for bus B 528 * if pci bus number > 0x80, then devices are located on the A side(66) 530 DEBUG3(DBG_IB, dip, "pci_xlate_intr: bus=%x, dev=%x, intr=%x\n", 531 bus, dev, intr); 533 intr |= (bus [all...] |
/illumos-gate/usr/src/uts/i86pc/io/ |
H A D | mp_platform_common.c | 83 static int apic_find_bus_type(char *bus); 241 /* At least MSB will be set if EISA bus */ 1156 * Save start of bus entries for later use. 1157 * Get EISA level cntrl if EISA bus is present. 1158 * Also get the CPI bus id for single CPI bus case 1345 * to find the IPIN at the root bus that relates to the IPIN on the 1346 * subsidiary bus (for ACPI or MP). We may, however, have an entry 1461 * It can have more than 1 entry with same source bus IRQ, 1462 * but unique with the source bus i 1505 apic_find_bus_type(char *bus) argument [all...] |
/illumos-gate/usr/src/lib/lvm/libmeta/common/ |
H A D | meta_db_balance.c | 220 (with_bus && tcinfop->bus != (*clpp)->ctl_cinfop->bus)) { 922 * If Here: Try to put 2 replicas per controller/bus 923 * If that doesn't work put 1 replica per controller/bus 961 * Check the distribution of bus ctlrs across real controllers. 998 * If the distribution of bus controlers is half of the total, then 1007 * If here, there is a distribution of bus controllers that will cause
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/illumos-gate/usr/src/grub/grub-0.97/netboot/ |
H A D | undi.c | 450 /* AX contains PCI bus:devfn (PCI specification) */ 451 undi.pxs->loader.ax = ( undi.pci.bus << 8 ) | undi.pci.devfn; 511 /* AX contains PCI bus:devfn (PCI specification) */ 512 undi.pxs->start_undi.ax = ( undi.pci.bus << 8 ) | undi.pci.devfn;
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H A D | davicom.c | 95 implementations don't overrun the EEPROM clock. We add a bus 684 pcibios_write_config_dword(pci->bus, pci->devfn, 0x40, 0x00000000);
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H A D | w89c840.c | 320 /* Configure the PCI bus bursts and FIFO thresholds. 628 printf("winbond-840: PCI bus %hhX device function %hhX: I/O address: %hX\n", p->bus, p->devfn, ioaddr);
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/illumos-gate/usr/src/boot/sys/boot/fdt/dts/arm/ |
H A D | armada-38x.dtsi | 74 compatible = "marvell,armada380-mbus", "simple-bus"; 138 compatible = "simple-bus"; 604 bus-range = <0 255>;
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H A D | imx51x.dtsi | 57 bus-frequency = <0>; 63 compatible = "simple-bus"; 92 compatible = "simple-bus"; 99 compatible = "fsl,aips-bus", "simple-bus"; 175 compatible = "fsl,spba-bus", "simple-bus"; 416 compatible = "fsl,aips-bus", "simple-bus"; 574 compatible = "simple-bus"; [all...] |
H A D | imx53x.dtsi | 59 bus-frequency = <0>; 65 compatible = "simple-bus"; 94 compatible = "simple-bus"; 101 compatible = "fsl,aips-bus", "simple-bus"; 213 compatible = "fsl,spba-bus", "simple-bus"; 491 compatible = "fsl,aips-bus", "simple-bus"; 659 compatible = "simple-bus"; [all...] |
/illumos-gate/usr/src/uts/common/io/hotplug/pcihp/ |
H A D | pcihp.c | 82 #define PCI_MAX_DEVS 32 /* max. number of devices on a pci bus */ 95 /* hot plug bus state */ 100 * Soft state structure associated with each hot plug pci bus instance. 105 /* devinfo pointer to the pci bus node */ 111 /* global mutex to serialize exclusive access to the bus */ 131 /* misc. bus attributes */ 205 * variable is set to non-zero, we scan all the devices on the bus 438 * mark the bus unconfigured, increment slot activity, decrement 547 * Note: Needs review w.r.t exclusive access to AP or the bus. 549 * so the code below implements EXCL access on the bus 3602 pcihp_add_dummy_reg_property(dev_info_t *dip, uint_t bus, uint_t device, uint_t func) argument 3675 int bus, len, rc = DDI_SUCCESS; local [all...] |
/illumos-gate/usr/src/uts/common/io/i40e/core/ |
H A D | i40e_common.c | 5436 * i40e_set_pci_config_data - store PCI bus info 5440 * Stores the PCI bus info (speed, width, type) within the i40e_hw structure 5444 hw->bus.type = i40e_bus_type_pci_express; 5448 hw->bus.width = i40e_bus_width_pcie_x1; 5451 hw->bus.width = i40e_bus_width_pcie_x2; 5454 hw->bus.width = i40e_bus_width_pcie_x4; 5457 hw->bus.width = i40e_bus_width_pcie_x8; 5460 hw->bus.width = i40e_bus_width_unknown; 5466 hw->bus.speed = i40e_bus_speed_2500; 5469 hw->bus [all...] |
/illumos-gate/usr/src/uts/common/io/cpqary3/ |
H A D | cpqary3.c | 782 * Check if the bus, or part of the bus that the device is installed 799 cpqary3p->bus = PCI_REG_BUS_G(*regp);
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/illumos-gate/usr/src/uts/common/pcmcia/sys/ |
H A D | cis_handlers.h | 789 #define CISTPL_CFTABLE_TPCE_FS_IO_BUS 0x060 /* bus width mask */ 1059 uint32_t bus; /* card interface width in bytes */ member in struct:cistpl_devicegeo_info_t
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