Searched refs:regs (Results 151 - 175 of 252) sorted by relevance

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/illumos-gate/usr/src/cmd/geniconvtbl/
H A Dgeniconvtbl.c87 itm_num_t *regs; /* register */ member in struct:_icv_state
149 #define REG(n) (*(ist->regs + (n)))
220 ist->regs = NULL;
222 ist->regs = malloc((sizeof (itm_num_t)) * hdr->reg_num);
223 if (NULL == ist->regs) {
229 (void) memset(ist->regs, 0,
261 free(ist->regs);
1693 return (*(ist->regs + expr->data.operand[0].itm_ptr)
1855 (void) memset(ist->regs, 0,
/illumos-gate/usr/src/uts/sun4u/serengeti/io/
H A Dsbdp_mem.c593 mc_regs_t regs; local
596 if (mc_read_regs(node, &regs)) {
602 mc_decode = regs.mc_decode;
785 mc_regs_t regs; local
826 if (mc_read_regs(memnodes[i], &regs)) {
833 uint64_t mc_decode = regs.mc_decode[j];
1776 mc_regs_t regs; local
1780 if (mc_read_regs(node, &regs) == -1)
1783 mc_decode = regs.mc_decode;
/illumos-gate/usr/src/uts/sun4u/io/i2c/nexus/
H A Dsmbus.c494 int32_t regs[2]; local
512 len = sizeof (regs);
515 "reg", (caddr_t)regs, &len);
531 ppvt->smbus_ppvt_addr = regs[1];
532 (void) sprintf(name, "%x", regs[1]);
588 cmn_err(CE_WARN, "%s unable to map regs", smbus->smbus_name);
592 "%s unable to map regs because of conflict",
606 cmn_err(CE_WARN, "%s unable to map config regs",
611 "%s unable to map config regs because of conflict",
747 * if FLUSH flag is passed, read a config regs t
[all...]
/illumos-gate/usr/src/cmd/mdb/intel/kmdb/
H A Dkaif.c210 mdb_tgt_gregset_t *regs; local
213 if ((regs = kaif_kdi_to_gregs(DPI_MASTER_CPUID)) == NULL)
225 return (&regs->kregs[rd->rd_num]);
/illumos-gate/usr/src/uts/sun4/os/
H A Dmachdep.c178 * Copy regs from parent to child.
252 * Free lwp fpu regs.
667 kdi_kernpanic(struct regs *regs, uint_t tt) argument
669 sync_reg_buf = *regs;
/illumos-gate/usr/src/uts/intel/ia32/os/
H A Dsendsig.c134 volatile struct regs *rp;
166 * but not 16-byte aligned. ucontext_t, however, contains %xmm regs
397 volatile struct regs *rp;
620 struct regs *rp;
H A Darchdep.c446 struct regs *rp = lwptoregs(lwp);
500 struct regs *rp = lwptoregs(lwp);
613 * Since struct regs stores each 16-bit segment register as a 32-bit greg_t, we
700 struct regs *rp = lwptoregs(lwp);
865 pc = ((struct regs *)fp)->r_pc;
1060 * regs structure into the specified panic_data structure for debuggers.
1063 panic_saveregs(panic_data_t *pdp, struct regs *rp)
1438 traceregs(struct regs *rp)
/illumos-gate/usr/src/uts/i86pc/cpu/generic_cpu/
H A Dgcpu_mca.c1364 gcpu_mca_process(cmi_hdl_t hdl, struct regs *rp, int nerr, gcpu_data_t *gcpu,
1695 gcpu_mca_logout(cmi_hdl_t hdl, struct regs *rp, uint64_t bankmask,
1911 gcpu_mca_trap(cmi_hdl_t hdl, struct regs *rp)
1990 gcpu_msrinject(cmi_hdl_t hdl, cmi_mca_regs_t *regs, uint_t nregs, argument
1996 uint_t msr = regs[i].cmr_msrnum;
1997 uint64_t val = regs[i].cmr_msrval;
/illumos-gate/usr/src/uts/common/io/lvm/md/
H A Dmd_med.c475 xdr_md_pmap(xdrs, regs)
477 struct pmap *regs;
479 if (xdr_u_int(xdrs, &regs->pm_prog) &&
480 xdr_u_int(xdrs, &regs->pm_vers) &&
481 xdr_u_int(xdrs, &regs->pm_prot))
482 return (xdr_u_int(xdrs, &regs->pm_port));
/illumos-gate/usr/src/lib/libproc/common/
H A DPsyscall.c88 prgregset_t regs; member in struct:__anon3799
117 (void) memcpy(&cmd.regs, &P->status.pr_lwp.pr_reg[0],
/illumos-gate/usr/src/uts/i86pc/ml/
H A Dsyscall_asm.s342 * | regs | +(8*4)+4 registers
476 * by %ds, %es, %fs and %gs to capture a 'struct regs' on the stack.
511 * - recreate the same regs structure on the stack and the same
/illumos-gate/usr/src/uts/sparc/v9/os/
H A Dxregs.c153 struct regs *rp = lwptoregs(lwp);
260 struct regs *rp = lwptoregs(lwp);
276 * copy the args from the regs first
353 /* force resume to reload fp regs */
/illumos-gate/usr/src/uts/i86pc/os/
H A Dcmi_hw.c1780 cmi_hdl_msrinterpose(cmi_hdl_t ophdl, cmi_mca_regs_t *regs, uint_t nregs) argument
1790 for (i = 0; i < nregs; i++, regs++)
1791 HDLOPS(hdl)->cmio_msrinterpose(hdl, regs->cmr_msrnum,
1792 regs->cmr_msrval);
1799 cmi_hdl_msrforward(cmi_hdl_t ophdl, cmi_mca_regs_t *regs, uint_t nregs) argument
1805 for (i = 0; i < nregs; i++, regs++)
1806 msri_addent(hdl, regs->cmr_msrnum, regs->cmr_msrval);
H A Dmachdep.c540 nmfunc1(int arg, struct regs *rp)
542 printf("nmi called with arg = %x, regs = %x\n", arg, rp);
863 stk -= SA(sizeof (struct regs) + SA(MINFRAME));
1302 linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp)
1350 dtrace_linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp)
/illumos-gate/usr/src/uts/intel/dtrace/
H A Dsdt.c331 * regs structure that was pushed when we took the
342 struct regs *rp = (struct regs *)((uintptr_t)&fp[1] +
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c296 ddi_acc_handle_t h, pcicfg_err_regs_t *regs);
298 ddi_acc_handle_t h, pcicfg_err_regs_t *regs);
626 pcicfg_pcie_dev(dev_info_t *dip, int bus_type, pcicfg_err_regs_t *regs) argument
633 regs->pcie_dev = 0;
645 regs->pcie_dev = 1;
680 /* No PCIe CAP regs, we are not PCIe device_type */
3946 pcicfg_err_regs_t *regs)
3951 regs->cmd = val = pci_config_get16(h, PCI_CONF_COMM);
3954 regs->bcntl = val = pci_config_get16(h, PCI_BCNF_BCNTRL);
3963 if (regs
3945 pcicfg_disable_bridge_probe_err(dev_info_t *dip, ddi_acc_handle_t h, pcicfg_err_regs_t *regs) argument
3984 pcicfg_enable_bridge_probe_err(dev_info_t *dip, ddi_acc_handle_t h, pcicfg_err_regs_t *regs) argument
4013 pcicfg_err_regs_t regs; local
4286 pcicfg_err_regs_t parent_regs, regs; local
[all...]
/illumos-gate/usr/src/cmd/mdb/common/modules/libumem/
H A Dleaky_subr.c574 const uintptr_t *regs = (const uintptr_t *)&lwp->pr_reg; local
581 leaky_grep_ptr(regs[i]);
583 sp = regs[i++] + STACK_BIAS;
588 leaky_grep_ptr(regs[i]);
/illumos-gate/usr/src/uts/sun4u/serengeti/os/
H A Dserengeti.c332 uint32_t regs[4]; local
358 if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
360 mc_addr = ((uint64_t)regs[0]) << 32;
361 mc_addr |= (uint64_t)regs[1];
/illumos-gate/usr/src/uts/sun4v/cpu/
H A Dgeneric.c228 vis1_partial_support(struct regs *rp, k_siginfo_t *siginfo, uint_t *fault)
256 break; /* regs are already set up */
/illumos-gate/usr/src/uts/sun4/sys/
H A Dxc_impl.h46 extern void xc_stop(struct regs *);
/illumos-gate/usr/src/uts/sun4u/lw8/os/
H A Dlw8_platmod.c339 uint32_t regs[4]; local
365 if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
367 mc_addr = ((uint64_t)regs[0]) << 32;
368 mc_addr |= (uint64_t)regs[1];
/illumos-gate/usr/src/uts/sparc/os/
H A Dsyscall.c141 * lwp->lwp_ap normally points to the out regs in the reg structure.
195 * lwp->lwp_ap normally points to the out regs in the reg structure.
209 struct regs *rp = lwptoregs(lwp);
357 struct regs *rp = lwptoregs(lwp);
539 struct regs *rp = lwptoregs(lwp);
924 struct regs *rp = lwptoregs(lwp);
/illumos-gate/usr/src/uts/intel/ia32/sys/
H A Dtraptrace.h62 struct regs ttr_regs;
/illumos-gate/usr/src/uts/i86xpv/os/
H A Dxpv_panic.c473 xpv_die(struct regs *rp)
650 xpv_panicsys(struct regs *rp, char *fmt, ...)
652 extern void panicsys(const char *, va_list, struct regs *, int);
791 xpv_panicsys((struct regs *)pip->pi_regs, pip->pi_panicstr);
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dopl_olympus.c75 static void opl_cpu_sync_error(struct regs *, ulong_t, ulong_t, uint_t, uint_t);
1863 opl_cpu_isync_tl0_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
1873 opl_cpu_isync_tl1_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
1883 opl_cpu_dsync_tl0_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
1893 opl_cpu_dsync_tl1_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
1909 opl_cpu_sync_error(struct regs *rp, ulong_t t_sfar, ulong_t t_sfsr,
2106 opl_cpu_urgent_error(struct regs *rp, ulong_t p_ugesr, ulong_t tl)

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