/illumos-gate/usr/src/uts/common/os/ |
H A D | panic.c | 62 * the winner has a chance to stop its CPU. To solve this problem, we have 110 * to halt all CPUs but the panicking CPU, panic_quiesce_hw() to perform 213 cpu_t *cp = CPU; 234 * in this CPU's pool, preserve the interrupt stack by detaching an
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H A D | lgrp.c | 32 * has been introduced to keep track of which CPU-like and memory-like hardware 61 * to dispatch a thread on a CPU in its home lgroup. Physical memory 139 * averages (cp_lgrploads). The list is allocated after the first CPU is brought 153 * on some architectures (x86) it's possible for the slave CPU startup thread 165 * a thread is trying to allocate memory close to a CPU that has no lgrp. 209 * lgroup CPU event handlers 223 * lgroup CPU partition event handlers 417 lgrp_config(LGRP_CONFIG_CPU_ADD, (uintptr_t)CPU, 0); 418 lgrp_config(LGRP_CONFIG_CPU_ONLINE, (uintptr_t)CPU, 0); 438 cpu_t *cp = CPU; [all...] |
/illumos-gate/usr/src/uts/common/tnf/ |
H A D | tnf_res.c | 297 t->t_tnf_tpdp = CPU->cpu_idle_thread->t_tnf_tpdp;
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/illumos-gate/usr/src/uts/common/vm/ |
H A D | vpm.c | 322 ndx = vpmd_cpu[CPU->cpu_seqid].vfree_ndx & vpmd_freemsk; 327 vpmd_cpu[CPU->cpu_seqid].vfree_ndx++; 719 vpmd_cpu[CPU->cpu_seqid].vcpu.vcpu_misses++; 721 vpmd_cpu[CPU->cpu_seqid].vcpu.vcpu_hits++;
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H A D | seg_kpm.c | 249 p = &skd->skd_va_select[(CPU->cpu_id * nvcolors) + vcolor];
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/illumos-gate/usr/src/uts/i86pc/i86hvm/io/xpv/ |
H A D | evtchn.c | 236 ASSERT(CPU->cpu_id == 0);
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/illumos-gate/usr/src/uts/sun4u/sunfire/io/ |
H A D | ac_add.c | 143 linesize = cpunodes[CPU->cpu_id].ecache_linesize;
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H A D | ac_test.c | 198 test->info.line_size = cpunodes[CPU->cpu_id].ecache_linesize; 446 error_buf.module_id = CPU->cpu_id;
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H A D | fhc.c | 231 * In the case of CPU/Memory system boards, the system will attempt 238 short cpu_warn_temp = 73; /* CPU/Memory Warning Temperature */ 239 short cpu_danger_temp = 83; /* CPU/Memory Danger Temperature */ 248 short cpu_warn_temp_4x = 60; /* CPU/Memory warning temp for 400 MHZ */ 249 short cpu_danger_temp_4x = 68; /* CPU/Memory danger temp for 400 MHZ */ 351 /* CPU power control */ 1616 /* Inhibit warning messages below this temperature, eg for CPU poweron. */ 1947 /* For CPU boards, don't warn if CPUs just powered on. */ 2271 * For CPU boards with frequency >= 400 MHZ, 2514 (void) sprintf(buffer, "CPU/Memor [all...] |
/illumos-gate/usr/src/uts/sun4v/promif/ |
H A D | promif_io.c | 349 thread_affinity_set(curthread, CPU->cpu_id);
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H A D | promif_prop.c | 196 thread_affinity_set(curthread, CPU->cpu_id);
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/illumos-gate/usr/src/uts/sun4u/ml/ |
H A D | mach_subr_asm.s | 58 * that have different CPU %tick rates] is what you want. 202 ! o2 = byte offset into cpunodes for tick_nsec_scale of this CPU
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H A D | trap_table.s | 1615 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1641 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1696 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1736 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1769 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1797 CPU_ADDR(%g4, %g1) ! load CPU struct addr 1856 CPU_ADDR(%g1, %g4) ! load CPU struct addr 2151 CPU_ADDR(%g1, %g2) ! load CPU struct addr to %g1 using %g2 2539 CPU_ADDR(%g1, %g2) ! load CPU struct addr to %g1 2555 CPU_ADDR(%g1, %g2) ! load CPU struc [all...] |
/illumos-gate/usr/src/uts/i86pc/os/cpupm/ |
H A D | cpupm_mach.c | 47 * This callback is used to build the PPM CPU domains once 48 * a CPU device has been started. The callback is initialized 55 * This callback is used to remove CPU from the PPM CPU domains 57 * by the PPM driver to point to a routine that will remove CPU 63 * This callback is used to redefine the topspeed for a CPU device. 66 * that will redefine the topspeed for all devices in a CPU domain. 68 * is received by the CPU driver. 73 * This callback is used by the PPM driver to call into the CPU driver 74 * to find a CPU' [all...] |
/illumos-gate/usr/src/uts/i86pc/vm/ |
H A D | hat_kdi.c | 180 *pap = pfn_to_pa(CPU->cpu_current_hat->hat_htable->ht_pfn);
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/illumos-gate/usr/src/uts/i86pc/os/ |
H A D | cpuid.c | 74 * for the boot CPU and does the basic analysis that the early kernel needs. 76 * CPU. 108 * All passes are executed on all CPUs, but only the boot CPU determines what 485 * underlying platform restrictions mean the CPU can be marked 1259 * to ensure CPUs that aren't the boot CPU don't accidentally 1536 * the CPU is capable of running 64-bit. 2016 * This must be a non-boot CPU. We cannot 2026 * If we reached here on the boot CPU, it's also 2028 * non-boot CPUs. When we're here on a boot CPU 2030 * CPU w [all...] |
/illumos-gate/usr/src/cmd/pools/poolcfg/ |
H A D | poolcfg.y | 858 die(gettext(ERR_LOCATE_ELEMENT), gettext(CPU), 861 die(gettext(ERR_GET_ELEMENT_DETAILS), gettext(CPU), 1091 die(gettext(ERR_LOCATE_ELEMENT), gettext(CPU), 1439 die(gettext(ERR_LOCATE_ELEMENT), gettext(CPU), 1468 * get_cpu() takes the name of a CPU components and attempts to locate 1501 die(gettext(ERR_LOCATE_ELEMENT), gettext(CPU), 1502 cmd->cmd_tgt1, gettext("CPU id should only contain "
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/illumos-gate/usr/src/uts/sun4v/ml/ |
H A D | trap_table.s | 1419 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1445 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1477 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1509 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1542 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1570 CPU_ADDR(%g4, %g1) ! load CPU struct addr 1629 CPU_ADDR(%g1, %g4) ! load CPU struct addr 1919 CPU_ADDR(%g1, %g2) ! load CPU struct addr to %g1 using %g2 2300 CPU_ADDR(%g1, %g2) ! load CPU struct addr to %g1 2317 CPU_ADDR(%g1, %g2) ! load CPU struc [all...] |
/illumos-gate/usr/src/uts/common/dtrace/ |
H A D | dtrace.c | 347 uint_t actv = CPU->cpu_intr_actv >> (LOCK_LEVEL + 1); \ 369 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = addr; \ 416 &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; \ 431 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = addr; \ 546 * Most counters stored to in probe context are per-CPU counters. 548 * arcane that they don't merit per-CPU storage. If these counters 773 volatile uintptr_t *illval = &cpu_core[CPU->cpu_id].cpuc_dtrace_illval; 1083 flags = (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags; 1137 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = kaddr; 1143 cpu_core[CPU [all...] |
/illumos-gate/usr/src/lib/fm/topo/modules/sun4v/sun4vpi/ |
H A D | pi_walker.c | 69 {pi_enum_cpu, CPU}, 86 {pi_cpu_methods, CPU},
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/illumos-gate/usr/src/lib/libdtrace_jni/java/src/org/opensolaris/os/dtrace/ |
H A D | ProbeData.java | 83 new String[] {"enabledProbeID", "CPU", 125 CPU, enum constant in enum:ProbeData.KeyField 158 * @param cpuID non-negative ID, identifies the CPU on which the 628 case CPU: 676 * Gets the ID of the CPU on which the probe fired. 678 * @return ID of the CPU on which the probe fired
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/illumos-gate/usr/src/uts/common/cpr/ |
H A D | cpr_main.c | 411 ASSERT(CPU->cpu_id == 0); 416 * pause all other running CPUs and save the CPU state at the sametime 776 init_cpu_syscall(CPU);
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/illumos-gate/usr/src/uts/common/xen/io/ |
H A D | evtchn_dev.c | 128 port = CPU->cpu_m.mcpu_ec_mbox; 130 CPU->cpu_m.mcpu_ec_mbox = 0;
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/illumos-gate/usr/src/uts/sun4u/serengeti/io/ |
H A D | sbdp_cpu.c | 28 * CPU management for serengeti DR 30 * There are three states a CPU can be in: 56 * SIR (Software Initiated Reset) is used to unconfigure a CPU. 57 * After the CPU has completed flushing the caches, it issues an 60 * completes successfully, the CPU will be idling in OBP. 131 * registers on the CPU when it is being put into reset. 139 * Mark the CPU in reset. This should be done before calling 146 * Ask OBP to mark the CPU as in POST 155 * Ask the SC to put the CPU into reset. If the first 156 * core is not present, the stop CPU interfac [all...] |
/illumos-gate/usr/src/uts/sun4v/os/ |
H A D | error.c | 118 mcpup = &(CPU->cpu_m); 208 fm_panic("Unrecoverable error on another CPU"); 226 mcpup = &(CPU->cpu_m); 502 * handle logging for CPU events that are dequeued. As such, it can be invoked 504 * panic flow. We decode the CPU-specific data, and log appropriate messages. 733 * softint. We just call the CPU module's logging routine.
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