Lines Matching refs:CPU
347 uint_t actv = CPU->cpu_intr_actv >> (LOCK_LEVEL + 1); \
369 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = addr; \
416 &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; \
431 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = addr; \
546 * Most counters stored to in probe context are per-CPU counters.
548 * arcane that they don't merit per-CPU storage. If these counters
773 volatile uintptr_t *illval = &cpu_core[CPU->cpu_id].cpuc_dtrace_illval;
1083 flags = (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
1137 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = kaddr;
1143 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = taddr;
1227 flags = (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
1436 cpu_core[CPU->cpu_id].cpuc_dtrace_flags |= CPU_DTRACE_UPRIV;
1454 cpu_core[CPU->cpu_id].cpuc_dtrace_flags |= CPU_DTRACE_UPRIV;
1466 cpu_core[CPU->cpu_id].cpuc_dtrace_flags |= CPU_DTRACE_UPRIV;
1477 cpu_core[CPU->cpu_id].cpuc_dtrace_flags |= CPU_DTRACE_KPRIV;
1488 cpu_core[CPU->cpu_id].cpuc_dtrace_flags |= CPU_DTRACE_KPRIV;
1630 * this CPU was selected to accept another CPU's
1642 * situation where a CPU has done deallocations (we
1646 * CPU, yet we also don't want to allow this condition
1650 * drops). To deal with this, we look for some CPU
1652 * rinsing list -- and then we borrow this CPU to
1675 * We were unable to find another CPU that
1697 * rinsing list for some CPU must be non-NULL.)
1732 * This prevents a race whereby a CPU incorrectly decides that
1757 processorid_t me = CPU->cpu_id, cpu = me;
1943 * of a conflicting allocation on another CPU.
2055 * this CPU. Unless we have tried all CPUs,
2057 * CPU.
2116 * free list by another CPU.
2133 * code path, and only one CPU can own the clean list.
2188 * The cas has failed. Either another CPU is adding an element to
2189 * this hash chain, or another CPU is deleting an element from this
2745 * without having done a prior speculate() on this CPU
2747 * CPU. There's nothing to do -- we just assert that
2759 * This speculation is active on one CPU. If our
2760 * buffer offset is non-zero, we know that the one CPU
2762 * different CPU from the speculate(), and we must
2855 * If we're lucky enough to be the only active CPU on this speculation
2940 processorid_t cpu = CPU->cpu_id;
3036 * the active CPU is not the specified CPU -- the speculation will be
3073 * This speculation is currently active on one CPU.
3075 * that CPU must be us (and we leave the state alone).
3077 * CPU -- and change the state to indicate that the
3078 * speculation is active on more than one CPU.
3167 cpu_core[CPU->cpu_id].cpuc_dtrace_flags |=
3212 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = NULL;
3228 &cpu_core[CPU->cpu_id].cpuc_dtrace_flags);
3294 CPU_ON_INTR(CPU)) {
3398 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3418 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3433 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3445 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3465 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3485 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3506 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
3528 if (DTRACE_ANCHORED(mstate->dtms_probe) && CPU_ON_INTR(CPU))
4017 volatile uint16_t *flags = &cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
4018 volatile uintptr_t *illval = &cpu_core[CPU->cpu_id].cpuc_dtrace_illval;
5702 volatile uint16_t *flags = &cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
5703 volatile uintptr_t *illval = &cpu_core[CPU->cpu_id].cpuc_dtrace_illval;
6100 a += CPU->cpu_id * sz;
6118 regs[rd] = tmp[CPU->cpu_id];
6140 a += CPU->cpu_id * sz;
6162 tmp[CPU->cpu_id] = regs[rd];
6626 cpu_t *cpu = CPU;
6677 uint16_t *flags = &cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
6794 flags = (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
6865 * Kick out immediately if this CPU is still being born (in which case
6874 cpuid = CPU->cpu_id;
6875 onintr = CPU_ON_INTR(CPU);
6877 CPU->cpu_dtrace_probes++;
7129 CPU_ON_INTR(CPU)) {
7302 * another CPU has beat us to the exit action,
7441 CPU->cpu_dtrace_nsec += end - now;
10517 * array) on another CPU.
11421 * buffers on a given CPU. The atomicity of this operation is assured by
11424 * the same CPU.
11456 * on a CPU. As with dtrace_buffer_switch(), the atomicity of the operation
11465 buf = &state->dts_buffer[CPU->cpu_id];
11470 * but this isn't necessarily true: the buffer for the CPU
11507 * If there is already a buffer allocated for this CPU, it
13521 * CPU. And if we're on the last CPU, we're going to allocate
14179 * interrupts here both to record the CPU on which we fired the BEGIN
14180 * probe (the data from this CPU will be processed first at user
14181 * level) and to manually activate the buffer for this CPU.
14184 *cpu = CPU->cpu_id;
14203 * want each CPU to transition its principal buffer out of the
14204 * INACTIVE state. Doing this assures that no CPU will suddenly begin
14257 * to be sure that every CPU has seen it. See below for the details
14264 * By this point, it is impossible for any CPU to be still processing
14267 * other CPU in dtrace_buffer_reserve(). This allows dtrace_probe()
14278 * return the CPU on which we actually called the END probe. This
14279 * allows user-land to be sure that this CPU's principal buffer is
14285 *cpu = CPU->cpu_id;
14440 * every CPU is out of probe context.
14618 uint16_t flags = cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
14661 ent->dtht_illval = cpu_core[CPU->cpu_id].cpuc_dtrace_illval;
14671 ((uint64_t *)(uintptr_t)svar->dtsv_data)[CPU->cpu_id];
14679 uint16_t *flags = &cpu_core[CPU->cpu_id].cpuc_dtrace_flags;
15817 * also going to temporarily set our CPU option to denote
15818 * the newly configured CPU.
16172 * CPU is in probe context with enabled helper tracing
16841 * did not take place -- presumably because the given CPU is