Searched defs:vector (Results 1 - 25 of 50) sorted by relevance

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/illumos-gate/usr/src/uts/i86pc/io/apix/
H A Dapix_irm.c299 * and a vector has been already allocated). If so, then no
300 * new vector is needed and simply pass the request to APIX
302 * 2) Check the local cache pool for an available vector. If
305 * 3) Otherwise, get a vector from the IRM pool by reducing the
313 int vector; local
322 &vector);
325 "apix_irm_alloc_fixed: dip %p (%s) xlated vector 0x%x",
326 (void *)dip, ddi_driver_name(dip), vector));
332 /* check the local cache for an available vector */
338 /* (2) use the vector fro
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H A Dapix_intr.c74 * Insert an vector into the tail of the interrupt pending list
93 * Remove and return an vector from the head of hardware interrupt
133 apix_add_pending_hardint(int vector) argument
137 apix_vector_t *vecp = apixp->x_vectbl[vector];
142 * The MSI interrupt not supporting per-vector masking could
143 * be triggered on a false vector as a result of rebinding
148 APIX_DO_FAKE_INTR(cpuid, vector);
172 prevp->av_flags |= (vector & AV_PENTRY_VECTMASK);
194 uchar_t vector = av->av_flags & AV_PENTRY_VECTMASK; local
214 if (vector) {
799 apix_post_hardint(int vector) argument
810 apix_dispatch_by_vector(uint_t vector) argument
844 apix_dispatch_hilevel(uint_t vector, uint_t arg2) argument
852 apix_dispatch_lowlevel(uint_t vector, uint_t oldipl) argument
872 int vector = rp->r_trapno, newipl, oldipl = cpu->cpu_pri, ret; local
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/illumos-gate/usr/src/uts/common/io/hxge/
H A Dhpi_vir.c83 hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector, argument
94 switch (vector) {
105 " hpi_ldsv_get Invalid Input: ldsv type <0x%x>", vector));
106 return (HPI_FAILURE | HPI_VIR_LDSV_INVALID(vector));
216 if (!SID_VECTOR_VALID(sid.vector)) {
218 " hpi_fzc_sid_set Invalid Input: vector <0x%x>",
219 sid.vector));
221 return (HPI_FAILURE | HPI_VIR_SID_VEC_INVALID(sid.vector));
225 sd.bits.data = sid.vector;
H A Dhpi_vir.h87 uint8_t vector; member in struct:_fzc_sid
96 hpi_status_t hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
/illumos-gate/usr/src/uts/i86xpv/io/psm/
H A Dxpv_intr.c45 /* Multiple vector support for MSI */
48 /* Multiple vector support for MSI-X */
138 /* Sanity check the vector/irq argument. */
145 * if the arg is a vector. Pass thru if already an irq.
238 apic_pci_msi_enable_vector(apic_irq_t *irq_ptr, int type, int inum, int vector, argument
248 "\tdriver = %s, inum=0x%x vector=0x%x apicid=0x%x\n", (void *)dip,
249 ddi_driver_name(dip), inum, vector, target_apic_id));
260 msi_data = ((MSI_DATA_TM_EDGE << MSI_DATA_TM_SHIFT) | vector);
/illumos-gate/usr/src/cmd/mdb/i86pc/modules/common/
H A Dintr_common.c139 interrupt_print_isr(uintptr_t vector, uintptr_t arg1, uintptr_t dip) argument
141 uintptr_t isr_addr = vector;
329 /* If invalid vector state; continue */
420 /* If invalid vector state; continue */
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_intr.c80 int vector; local
87 if ((vector = nxge_intr_vec_find(nxge, type, channel)) == -1) {
89 "nxge_intr_add(%cDC %d): vector not found", c, channel));
93 ldvp = &nxge->ldgvp->ldvp[vector];
106 if ((status2 = ddi_intr_add_handler(interrupts->htable[vector],
111 c, channel, vector, nxge_ddi_perror(status2)));
118 if ((status2 = ddi_intr_enable(interrupts->htable[vector]))
122 c, channel, vector, nxge_ddi_perror(status2)));
169 int vector; local
176 if ((vector
254 int first, limit, vector; local
326 int vector; /* A shorthand variable */ local
426 int vector; /* A shorthand variable */ local
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/illumos-gate/usr/src/uts/intel/ia32/sys/
H A Dtraptrace.h67 short vector; member in struct:__anon9487::_ttr_info::_idt_entry
85 #define ttr_vector ttr_info.idt_entry.vector
/illumos-gate/usr/src/cmd/make/lib/vroot/
H A Dvroot.cc39 pathpt vector; member in struct:__anon51
181 vroot_data.path.vector= parse_path_string(getenv(vroot_data.path.env_var), 0);};
182 path_vector= vroot_data.path.vector;};
189 vroot_data.vroot.vector= parse_path_string(getenv(vroot_data.vroot.env_var), 1);};
190 vroot_vector= vroot_data.vroot.vector;};
/illumos-gate/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_regops.c214 uchar_t vector; local
232 vector = apic_irq->airq_vector;
233 ioapic_write_eoi(ioapicindex, vector);
362 int vector; local
381 vector = apic_resv_vector[ipl];
402 X2APIC_WRITE(X2APIC_SELF_IPI, vector);
405 apic_cpus[cpun].aci_local_id, vector);
423 int vector; local
434 vector = apic_resv_vector[ipl];
435 ASSERT((vector >
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H A Dapic_introp.c58 apic_pci_msi_enable_vector(apic_irq_t *irq_ptr, int type, int inum, int vector, argument
71 "\tdriver = %s, inum=0x%x vector=0x%x apicid=0x%x\n", (void *)dip,
72 ddi_driver_name(dip), inum, vector, target_apic_id));
76 msi_regs.mr_data = vector;
80 irqno = apic_vector_to_irq[vector + i];
86 irqno = apic_vector_to_irq[vector + i];
113 * Only set vector if not on hypervisor
209 * starting vector
218 * starting vector has to be aligned accordingly for
513 uint32_t vector; local
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H A Dapic.c104 static int apic_addspl(int ipl, int vector, int min_ipl, int max_ipl);
105 static int apic_delspl(int ipl, int vector, int min_ipl, int max_ipl);
112 * The following vector assignments influence the value of ipltopri and
116 * will share the vector ranges and heavily used IPLs (5 and 6) have
138 * The ipl of an ISR at vector X is apic_vectortoipl[X>>4]
139 * NOTE that this is vector as passed into intr_enter which is
140 * programmed vector - 0x20 (APIC_BASE_VECT)
147 * Correlation of the hardware vector to the IPL in use, initialized
280 /* get to highest vector at the same ipl */
337 * Presence of an invalid vector wit
538 uchar_t vector; local
789 uchar_t vector; local
1184 uchar_t vector, irqno; local
1263 apic_free_vector(uchar_t vector) argument
1312 apic_modify_vector(uchar_t vector, int irq) argument
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/illumos-gate/usr/src/uts/common/io/i40e/
H A Di40e_intr.c60 * interrupts is always bound to MSI-X vector zero. Next, we spread out all of
73 * maintain a linked list of queues for each interrupt vector. While it may seem
75 * first queue must be programmed in I40E_QINT_LNKLSTN(%vector) register. Each
84 * Finally, the individual interrupt vector itself has the ability to be enabled
237 i40e_intr_io_enable(i40e_t *i40e, int vector) argument
245 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(vector - 1), reg);
249 i40e_intr_io_disable(i40e_t *i40e, int vector) argument
255 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(vector - 1), reg);
423 * don't have any other vector of control here, unlike with the MSI-X interrupt
669 * When using MSI-X interrupts, vector
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/illumos-gate/usr/src/cmd/mailx/
H A Dlist.c69 * store the numbers into vector.
74 getmessage(char *buf, int *vector, int flags) argument
84 ip = vector;
88 * at the beginning of the vector.
97 * Add marked messages to vector and skip first
99 * beginning of the vector
108 return (ip - vector);
141 * store the numbers into vector.
147 getmsglist(char *buf, int *vector, int flags) argument
154 ip = vector;
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/illumos-gate/usr/src/uts/common/io/nxge/npi/
H A Dnpi_txc.c492 * This function is called to set the debug training vector.
496 * vector - training vector to set.
504 npi_txc_training_set(npi_handle_t handle, uint32_t vector) argument
506 NXGE_REG_WR64(handle, TXC_TRAINING_REG, (uint64_t)vector);
513 * This function is called to get the debug training vector.
517 * vector_p - pointer to store training vector.
H A Dnpi_vir.c950 * vector - vector type (0, 1 or 2)
959 npi_ldsv_get(npi_handle_t handle, uint8_t ldg, ldsv_type_t vector, argument
973 switch (vector) {
990 " ldsv type <0x%x>", vector));
991 return (NPI_FAILURE | NPI_VIR_LDSV_INVALID(vector));
1007 * vector - vector type (0, 1 or 2)
1017 ldsv_type_t vector, ldf_type_t ldf_type, boolean_t *flag_p)
1031 ((vector !
1016 npi_ldsv_ld_get(npi_handle_t handle, uint8_t ldg, uint8_t ld, ldsv_type_t vector, ldf_type_t ldf_type, boolean_t *flag_p) argument
1096 ldsv_type_t vector; local
1123 ldsv_type_t vector; local
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H A Dnpi_vir.h235 uint8_t vector; member in struct:_fzc_sid
509 * vector - vector type (0, 1 or 2)
527 * vector - vector type (0, 1 or 2)
/illumos-gate/usr/src/uts/intel/ia32/os/
H A Ddesctbls.c320 uint_t type, uint_t dpl, uint_t vector)
334 if (vector == T_DBLFLT)
433 ti->vector = vec;
319 set_gatesegd(gate_desc_t *dp, void (*func)(void), selector_t sel, uint_t type, uint_t dpl, uint_t vector) argument
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_vf.c285 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
290 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
291 * incoming rx multicast addresses, to determine the bit-vector to check in
298 u32 vector = 0; local
302 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
305 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
308 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
311 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
319 /* vector can only be 12-bits or boundary will be exceeded */
320 vector
386 u32 vector; local
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/illumos-gate/usr/src/lib/libbsm/common/
H A Daudit_scf.c79 * add_prop_vect_scf() - adds vector to the array of vectors later passed to
80 * get_/set_val_scf(). The first argument (vector) points to particular position
81 * in the vector of properties.
84 add_prop_vect_scf(scf_propvec_t *vector, const char *prop_str, argument
87 vector->pv_prop = prop_str;
88 vector->pv_type = prop_type;
89 vector->pv_ptr = prop_val_ptr;
95 * Arguments: vector = pointers to the head end of array of property vectors
100 get_val_scf(scf_propvec_t *vector, char *pgroup_str) argument
105 * Get the property vector fro
130 set_val_scf(scf_propvec_t *vector, char *pgroup_str) argument
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/illumos-gate/usr/src/uts/common/xen/io/
H A Dxpvd.c639 int vector; local
650 (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, &vector);
651 DDI_INTR_NEXDBG((CE_CONT, "xpvd_enable_intr: priority=%x vector=%x\n",
652 hdlp->ih_pri, vector));
656 DEVI(rdip)->devi_name, vector, hdlp->ih_cb_arg1,
661 hdlp->ih_vector = (ushort_t)vector;
670 int vector; local
679 (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, &vector);
682 rem_avintr((void *)hdlp, hdlp->ih_pri, hdlp->ih_cb_func, vector);
/illumos-gate/usr/src/uts/common/xen/public/arch-x86/
H A Dxen.h98 uint8_t vector; /* exception vector */ member in struct:trap_info
/illumos-gate/usr/src/uts/common/xen/public/
H A Dphysdev.h126 * Allocate or free a physical upcall vector for the specified IRQ line.
135 uint32_t vector; member in struct:physdev_irq
/illumos-gate/usr/src/uts/i86pc/io/
H A Dhpet_acpi.c70 int vector);
608 * The I/O APIC line (vector) is programmed in ioapic_init_intr() called
613 hpet_install_interrupt_handler(uint_t (*func)(char *), int vector) argument
618 vector, NULL, NULL, NULL, NULL);
/illumos-gate/usr/src/uts/i86pc/io/psm/
H A Duppc.c294 * on the boot cpu from assembly, using the ap_mlsetup vector.
945 uppc_intr_enter(int ipl, int *vector) argument
950 intno = (*vector);
957 * During wait_till_seen() periods when interrupt vector is being
999 uppc_intr_exit(int ipl, int vector) argument

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