/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseLib/Ipf/ |
H A D | FlushCacheRange.c | 22 Flushes the cache lines specified by Address and Length. If Address is not aligned 23 on a cache line boundary, then entire cache line containing Address is flushed. 24 If Address + Length is not aligned on a cache line boundary, then the entire cache 25 line containing Address + Length - 1 is flushed. This function may choose to flush 27 Length is 0, the no cache lines are flushed. Address is returned. 30 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). 32 @param Address The base address of the instruction lines to invalidate. If 33 the CPU is in a physical addressing mode, then Address is a 35 then Address i 44 AsmFlushCacheRange( IN VOID *Address, IN UINTN Length ) argument [all...] |
/vbox/src/VBox/Devices/PC/ipxe/src/include/ |
H A D | etherboot.h | 21 typedef unsigned long Address; typedef
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Core/Pei/PciCfg2/ |
H A D | PciCfg2.c | 42 @param Address The physical address of the access. The format of 57 IN UINT64 Address, 74 @param Address The physical address of the access. The format of 88 IN UINT64 Address, 106 @param Address The physical address of the access. 122 IN UINT64 Address, 53 PeiDefaultPciCfg2Read( IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_PCI_CFG2_PPI *This, IN EFI_PEI_PCI_CFG_PPI_WIDTH Width, IN UINT64 Address, IN OUT VOID *Buffer ) argument 84 PeiDefaultPciCfg2Write( IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_PCI_CFG2_PPI *This, IN EFI_PEI_PCI_CFG_PPI_WIDTH Width, IN UINT64 Address, IN OUT VOID *Buffer ) argument 118 PeiDefaultPciCfg2Modify( IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_PCI_CFG2_PPI *This, IN EFI_PEI_PCI_CFG_PPI_WIDTH Width, IN UINT64 Address, IN VOID *SetBits, IN VOID *ClearBits ) argument
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseCacheMaintenanceLib/ |
H A D | ArmCache.c | 44 Invalidates the instruction cache lines specified by Address and Length. If 45 Address is not aligned on a cache line boundary, then entire instruction 46 cache line containing Address is invalidated. If Address + Length is not 48 containing Address + Length -1 is invalidated. This function may choose to 51 lines are invalidated. Address is returned. 53 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). 55 @param Address The base address of the instruction cache lines to 57 Address is a physical address. If the CPU is in a virtual 58 addressing mode, then Address i 67 InvalidateInstructionCacheRange( IN VOID *Address, IN UINTN Length ) argument 124 WriteBackInvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 180 WriteBackDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 239 InvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument [all...] |
H A D | EbcCache.c | 35 Invalidates the instruction cache lines specified by Address and Length. If 36 Address is not aligned on a cache line boundary, then entire instruction 37 cache line containing Address is invalidated. If Address + Length is not 39 containing Address + Length -1 is invalidated. This function may choose to 42 lines are invalidated. Address is returned. 44 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). 46 @param Address The base address of the instruction cache lines to 48 Address is a physical address. If the CPU is in a virtual 49 addressing mode, then Address i 58 InvalidateInstructionCacheRange( IN VOID *Address, IN UINTN Length ) argument 113 WriteBackInvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 167 WriteBackDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 224 InvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument [all...] |
H A D | IpfCache.c | 39 Invalidates the instruction cache lines specified by Address and Length. If 40 Address is not aligned on a cache line boundary, then entire instruction 41 cache line containing Address is invalidated. If Address + Length is not 43 containing Address + Length -1 is invalidated. This function may choose to 46 lines are invalidated. Address is returned. 48 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). 50 @param Address The base address of the instruction cache lines to 52 Address is a physical address. If the CPU is in a virtual 53 addressing mode, then Address i 62 InvalidateInstructionCacheRange( IN VOID *Address, IN UINTN Length ) argument 117 WriteBackInvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 171 WriteBackDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 232 InvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument [all...] |
H A D | X86Cache.c | 43 Invalidates the instruction cache lines specified by Address and Length. If 44 Address is not aligned on a cache line boundary, then entire instruction 45 cache line containing Address is invalidated. If Address + Length is not 47 containing Address + Length -1 is invalidated. This function may choose to 50 lines are invalidated. Address is returned. 52 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). 54 @param Address The base address of the instruction cache lines to 56 Address is a physical address. If the CPU is in a virtual 57 addressing mode, then Address i 66 InvalidateInstructionCacheRange( IN VOID *Address, IN UINTN Length ) argument 126 WriteBackInvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 199 WriteBackDataCacheRange( IN VOID *Address, IN UINTN Length ) argument 256 InvalidateDataCacheRange( IN VOID *Address, IN UINTN Length ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/AppPkg/Applications/Sockets/RecvDgram/ |
H A D | RecvDgram.c | 45 struct sockaddr_in Address; local 76 AddressLength = sizeof ( Address ); 81 (struct sockaddr *)&Address, 94 (UINT8)Address.sin_addr.s_addr, 95 (UINT8)( Address.sin_addr.s_addr >> 8 ), 96 (UINT8)( Address.sin_addr.s_addr >> 16 ), 97 (UINT8)( Address.sin_addr.s_addr >> 24 ), 98 htons ( Address.sin_port ));
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseIoLibIntrinsic/ |
H A D | IoLib.c | 73 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is 79 @param Address The MMIO register to read. 87 IN UINTN Address 93 Value = *(volatile UINT8*)Address; 102 Writes the 8-bit MMIO register specified by Address with the value specified 108 @param Address The MMIO register to write. 117 IN UINTN Address, 122 *(volatile UINT8*)Address = Value; 131 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is 136 If Address i 116 MmioWrite8( IN UINTN Address, IN UINT8 Value ) argument 178 MmioWrite16( IN UINTN Address, IN UINT16 Value ) argument 242 MmioWrite32( IN UINTN Address, IN UINT32 Value ) argument 304 MmioWrite64( IN UINTN Address, IN UINT64 Value ) argument [all...] |
H A D | IoLibArm.c | 228 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is 234 @param Address The MMIO register to read. 242 IN UINTN Address 247 Value = *(volatile UINT8*)Address; 254 Writes the 8-bit MMIO register specified by Address with the value specified 260 @param Address The MMIO register to write. 267 IN UINTN Address, 271 *(volatile UINT8*)Address = Value; 278 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is 284 @param Address Th 266 MmioWrite8( IN UINTN Address, IN UINT8 Value ) argument 317 MmioWrite16( IN UINTN Address, IN UINT16 Value ) argument 369 MmioWrite32( IN UINTN Address, IN UINT32 Value ) argument 421 MmioWrite64( IN UINTN Address, IN UINT64 Value ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/VBoxPkg/VBoxSysTables/ |
H A D | VBoxSysTables.c | 71 UINTN Address; local 76 for (Address = 0xf0000; Address < 0xfffff; Address += 0x10) { 77 if (*(UINT32 *)(Address) == SMBIOS_PTR) { 78 return (VOID *)Address; 89 UINTN Address; local 95 for (Address = 0xe0000; Address < 0xfffff; Address [all...] |
/vbox/src/VBox/Main/include/ |
H A D | BusAssignmentManager.h | 50 virtual HRESULT assignPCIDevice(const char* pszDevName, PCFGMNODE pCfg, PCIBusAddress& Address, bool fAddressRequired = false) argument 53 return assignPCIDeviceImpl(pszDevName, pCfg, Address, HostAddress, fAddressRequired); 62 virtual bool findPCIAddress(const char* pszDevName, int iInstance, PCIBusAddress& Address); 65 PCIBusAddress Address; local 66 return findPCIAddress(pszDevName, iInstance, Address);
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/CapsuleRuntimeDxe/X64/ |
H A D | SaveLongModeContext.c | 51 EFI_PHYSICAL_ADDRESS Address; local 56 Address = 0xffffffff; 62 &Address 66 Buffer = (VOID *) (UINTN) Address;
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/ |
H A D | PciCfg2.c | 29 @param Address PCI address with EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format. 36 EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address 39 if (Address->ExtendedRegister == 0) { 40 return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->Register); 43 return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address 63 PciCfg2Read( IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_PCI_CFG2_PPI *This, IN EFI_PEI_PCI_CFG_PPI_WIDTH Width, IN UINT64 Address, IN OUT VOID *Buffer ) argument 135 PciCfg2Write( IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_PCI_CFG2_PPI *This, IN EFI_PEI_PCI_CFG_PPI_WIDTH Width, IN UINT64 Address, IN OUT VOID *Buffer ) argument 212 PciCfg2Modify( IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_PCI_CFG2_PPI *This, IN EFI_PEI_PCI_CFG_PPI_WIDTH Width, IN UINT64 Address, IN VOID *SetBits, IN VOID *ClearBits ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/Variable/RuntimeDxe/ |
H A D | Reclaim.c | 22 This function gets the Logical Block Address (LBA) of a firmware 26 @param Address Address which should be contained 38 IN EFI_PHYSICAL_ADDRESS Address, 56 Status = GetFvbInfoByAddress (Address, NULL, &Fvb); 62 // Get the Base Address of FV. 72 // Get the (LBA, Offset) of Address. 80 if (Address < (FvbBaseAddress + FvbMapEntry->Length * LbaIndex)) { 85 *Offset = (UINTN) (Address - (FvbBaseAddress + FvbMapEntry->Length * (LbaIndex - 1))); 37 GetLbaAndOffsetByAddress( IN EFI_PHYSICAL_ADDRESS Address, OUT EFI_LBA *Lba, OUT UINTN *Offset ) argument
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Protocol/ |
H A D | SmmIoTrapDispatch2.h | 46 UINT16 Address; member in struct:__anon12304 67 specified length and characteristics will be allocated and the Address field in RegisterContext
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BasePeCoffLib/Arm/ |
H A D | PeCoffLoaderEx.c | 35 UINT16 Address; local 46 Address = (UINT16)(Movt & 0x000000ff); // imm8 47 Address |= (UINT16)((Movt >> 4) & 0x0000f700); // imm4 imm3 48 Address |= (((Movt & BIT26) != 0) ? BIT11 : 0); // i 49 return Address; 57 @param Address New addres to patch into the instruction 62 IN UINT16 Address 68 Patch = ((Address >> 12) & 0x000f); // imm4 69 Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i 74 Patch = Address [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/PeiIoLibCpuIo/ |
H A D | IoLib.c | 302 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is 308 @param Address The MMIO register to read. 316 IN UINTN Address 326 return CpuIo->MemRead8 (PeiServices, CpuIo, (UINT64) Address); 332 Writes the 8-bit MMIO register specified by Address with the value specified 338 @param Address The MMIO register to write. 347 IN UINTN Address, 358 CpuIo->MemWrite8 (PeiServices, CpuIo, (UINT64) Address, Value); 365 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is 370 If Address i 346 MmioWrite8( IN UINTN Address, IN UINT8 Value ) argument 415 MmioWrite16( IN UINTN Address, IN UINT16 Value ) argument 487 MmioWrite32( IN UINTN Address, IN UINT32 Value ) argument 557 MmioWrite64( IN UINTN Address, IN UINT64 Value ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Ip6Dxe/ |
H A D | Ip6Mld.h | 39 EFI_IPv6_ADDRESS Address; member in struct:__anon12502 91 @param[in] Address The group address to join. 102 IN EFI_IPv6_ADDRESS *Address 109 @param[in] Address The group address to leave. 119 IN EFI_IPv6_ADDRESS *Address
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/vbox/src/VBox/Devices/EFI/Firmware/SecurityPkg/VariableAuthenticated/RuntimeDxe/ |
H A D | Reclaim.c | 21 This function gets the Logical Block Address (LBA) of a firmware 25 @param Address Address which should be contained 37 IN EFI_PHYSICAL_ADDRESS Address, 55 Status = GetFvbInfoByAddress (Address, NULL, &Fvb); 61 // Get the Base Address of FV. 71 // Get the (LBA, Offset) of Address. 79 if (Address < (FvbBaseAddress + FvbMapEntry->Length * LbaIndex)) { 84 *Offset = (UINTN) (Address - (FvbBaseAddress + FvbMapEntry->Length * (LbaIndex - 1))); 36 GetLbaAndOffsetByAddress( IN EFI_PHYSICAL_ADDRESS Address, OUT EFI_LBA *Lba, OUT UINTN *Offset ) argument
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/vbox/src/VBox/Devices/EFI/Firmware/ShellPkg/Library/UefiShellDebug1CommandsLib/ |
H A D | Dmem.c | 46 @param[in] Address The starting address to display. 52 IN CONST VOID *Address, 71 Status = PciRbIo->Mem.Read(PciRbIo, EfiPciWidthUint8, (UINT64)(UINTN)Address, Size, Buffer); 76 ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_DMEM_MMIO_HEADER_ROW), gShellDebug1HiiHandle, (UINT64)(UINTN)Address, Size); 106 VOID *Address; local 118 Address = NULL; 149 Address = gST; 152 if (!ShellIsHexOrDecimalNumber(Temp1, TRUE, FALSE) || EFI_ERROR(ShellConvertStringToUint64(Temp1, (UINT64*)&Address, TRUE, FALSE))) { 170 ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_DMEM_HEADER_ROW), gShellDebug1HiiHandle, (UINT64)(UINTN)Address, Size); 171 DumpHex(2,0,(UINTN)Size,Address); 51 DisplayMmioMemory( IN CONST VOID *Address, IN CONST UINTN Size ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgent/ |
H A D | DxeDebugAgentLib.c | 46 EFI_PHYSICAL_ADDRESS Address; local 52 Address = 0; 57 &Address 64 (UINT8 *) (UINTN) Address, 69 mMailboxPointer = (DEBUG_AGENT_MAILBOX *) (UINTN) Address;
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/vbox/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/CpuIo2Smm/ |
H A D | CpuIo2Smm.c | 51 @param[in] Address The base address of the I/O operations. The caller is 52 responsible for aligning the Address if required. 59 @retval EFI_UNSUPPORTED The Address is not valid for this system. 67 IN UINT64 Address, 99 // Address + Size * Count. If the following condition is met, then the transfer 102 // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1 113 if (Address > Limit) { 121 if (Address > LShiftU64 (MaxCount - Count + 1, Width)) { 127 // Check to see if Address is aligned 129 if ((Address 64 CpuIoCheckParameter( IN BOOLEAN MmioOperation, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) argument 161 CpuMemoryServiceRead( IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer ) argument 221 CpuMemoryServiceWrite( IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) argument 281 CpuIoServiceRead( IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer ) argument 340 CpuIoServiceWrite( IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Universal/CpuIoDxe/ |
H A D | CpuIo.c | 83 @param[in] Address The base address of the I/O operation. 85 bytes moved is Width size * Count, starting at Address. 93 @retval EFI_UNSUPPORTED The address range specified by Address, Width, 101 IN UINT64 Address, 140 // Check to see if Address is aligned 142 if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) { 149 // Address + Size * Count. If the following condition is met, then the transfer 152 // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1 163 if (Address > Limit) { 171 if (Address > LShiftU6 98 CpuIoCheckParameter( IN BOOLEAN MmioOperation, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) argument 228 CpuMemoryServiceRead( IN EFI_CPU_IO_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer ) argument 308 CpuMemoryServiceWrite( IN EFI_CPU_IO_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) argument 388 CpuIoServiceRead( IN EFI_CPU_IO_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer ) argument 467 CpuIoServiceWrite( IN EFI_CPU_IO_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) argument [all...] |
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkPkg/Library/DxeIoLibCpuIo/ |
H A D | IoLib.c | 62 The caller is responsible for aligning the Address if required. 92 The caller is responsible for aligning the Address if required. 118 Reads the MMIO registers specified by Address with registers width specified by Width. 122 @param Address The MMIO register to read. 123 The caller is responsible for aligning the Address if required. 132 IN UINTN Address, 139 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data); 148 Writes the MMIO registers specified by Address with registers width and value specified by Width 152 @param Address The MMIO register to read. 153 The caller is responsible for aligning the Address i 131 MmioReadWorker( IN UINTN Address, IN EFI_CPU_IO_PROTOCOL_WIDTH Width ) argument 162 MmioWriteWorker( IN UINTN Address, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Data ) argument 442 MmioWrite8( IN UINTN Address, IN UINT8 Value ) argument 496 MmioWrite16( IN UINTN Address, IN UINT16 Value ) argument 554 MmioWrite32( IN UINTN Address, IN UINT32 Value ) argument 612 MmioWrite64( IN UINTN Address, IN UINT64 Value ) argument [all...] |