/** @file
MTRR setting library
Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Base.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
//
// This table defines the offset, base and length of the fixed MTRRs
//
{
0,
},
{
0x80000,
},
{
0xA0000,
},
{
0xC0000,
},
{
0xC8000,
},
{
0xD0000,
},
{
0xD8000,
},
{
0xE0000,
},
{
0xE8000,
},
{
0xF0000,
},
{
0xF8000,
},
};
//
// Lookup table used to print MTRRs
//
"UC", // CacheUncacheable
"WC", // CacheWriteCombining
"R*", // Invalid
"R*", // Invalid
"WT", // CacheWriteThrough
"WP", // CacheWriteProtected
"WB", // CacheWriteBack
"R*" // Invalid
};
/**
Returns the variable MTRR count for the CPU.
@return Variable MTRR count
**/
)
{
if (!IsMtrrSupported ()) {
return 0;
}
VariableMtrrCount = (UINT32)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK);
return VariableMtrrCount;
}
/**
Returns the firmware usable variable MTRR count for the CPU.
@return Firmware usable variable MTRR count
**/
)
{
return 0;
}
}
/**
Returns the default MTRR cache type for the system.
@return The default MTRR cache type.
**/
)
{
if (!IsMtrrSupported ()) {
return CacheUncacheable;
}
}
/**
Preparation before programming MTRR.
This function will do some preparation for programming MTRRs:
disable cache, invalid cache and disable MTRR caching functionality
@return CR4 value before changing.
**/
)
{
//
// Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
//
AsmDisableCache ();
//
// Save original CR4 value and clear PGE flag (Bit 7)
//
Value = AsmReadCr4 ();
//
// Flush all TLBs
//
CpuFlushTlb ();
//
// Disable Mtrrs
//
//
// Return original CR4 value
//
return Value;
}
/**
Cleaning up after programming MTRRs.
This function will do some clean up after programming MTRRs:
Flush all TLBs, re-enable caching, restore CR4.
@param Cr4 CR4 value to restore
**/
)
{
//
// Flush all TLBs
//
CpuFlushTlb ();
//
// Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
//
AsmEnableCache ();
//
// Restore original CR4 value
//
AsmWriteCr4 (Cr4);
}
/**
Cleaning up after programming MTRRs.
This function will do some clean up after programming MTRRs:
enable MTRR caching functionality, and enable cache
@param Cr4 CR4 value to restore
**/
)
{
//
// Enable Cache MTRR
//
}
/**
Programs fixed MTRRs registers.
@param MemoryCacheType The memory type to set.
@param Base The base address of memory range.
@param Length The length of memory range.
@retval RETURN_SUCCESS The cache type was updated successfully
@retval RETURN_UNSUPPORTED The requested range or cache type was invalid
for the fixed MTRRs.
**/
)
{
TempQword = 0;
OrMask = 0;
ClearMask = 0;
(*Base <
(
)
)
) {
break;
}
}
if (MsrNum == MTRR_NUMBER_OF_FIXED_MTRR) {
return RETURN_UNSUPPORTED;
}
//
// We found the fixed MTRR to be programmed
//
if (*Base ==
(
)
) {
break;
}
}
if (ByteShift == 8) {
return RETURN_UNSUPPORTED;
}
for (
;
) {
}
return RETURN_UNSUPPORTED;
}
return RETURN_SUCCESS;
}
/**
Get the attribute of variable MTRRs.
This function shadows the content of variable MTRRs into an
internal array: VariableMtrr.
@param MtrrValidBitsMask The mask for the valid bit of the MTRR
@param MtrrValidAddressMask The valid address mask for MTRR
@param VariableMtrr The array to shadow variable MTRRs content
@return The return value of this paramter indicates the
number of MTRRs which has been used.
**/
)
{
if (!IsMtrrSupported ()) {
return 0;
}
UsedMtrr = 0;
(
(MsrNum < VariableMtrrEnd) &&
);
MsrNum += 2
) {
) &
) + 1;
Index++;
}
}
return UsedMtrr;
}
/**
Checks overlap between given memory range and MTRRs.
@param Start The start address of memory range.
@param End The end address of memory range.
@param VariableMtrr The array to shadow variable MTRRs content
@retval TRUE Overlap exists.
@retval FALSE No overlap.
**/
)
{
if (
!(
) ||
)
) {
return TRUE;
}
}
return FALSE;
}
/**
Marks a variable MTRR as non-valid.
@param Index The index of the array VariableMtrr to be invalidated
@param VariableMtrr The array to shadow variable MTRRs content
@param UsedMtrr The number of MTRRs which has already been used
**/
)
{
}
/**
Combine memory attributes.
If overlap exists between given memory range and MTRRs, try to combine them.
@param Attributes The memory type to set.
@param Base The base address of memory range.
@param Length The length of memory range.
@param VariableMtrr The array to shadow variable MTRRs content
@param UsedMtrr The number of MTRRs which has already been used
@param OverwriteExistingMtrr Returns whether an existing MTRR was used
@retval EFI_SUCCESS Memory region successfully combined.
@retval EFI_ACCESS_DENIED Memory region cannot be combined.
**/
)
{
if (
(
)
) {
continue;
}
//
// Combine same attribute MTRR range
//
//
// if the Mtrr range contain the request range, set a flag, then continue to
// invalidate any MTRR of the same request range with higher priority cache type.
//
continue;
}
//
// invalid this MTRR, and program the combine range
//
(*Base) :
//
// Record the MTRR usage status in VariableMtrr array.
//
*Base = CombineStart;
continue;
} else {
//
// The cache type is different, but the range is convered by one MTRR
//
continue;
}
}
if ((Attributes== MTRR_CACHE_WRITE_THROUGH &&
(Attributes == MTRR_CACHE_WRITE_BACK &&
(Attributes == MTRR_CACHE_UNCACHEABLE) ||
) {
continue;
}
//
// Other type memory overlap is invalid
//
return RETURN_ACCESS_DENIED;
}
if (CoveredByExistingMtrr) {
*Length = 0;
}
return RETURN_SUCCESS;
}
/**
Calculate the maximum value which is a power of 2, but less the MemoryLength.
@param MemoryLength The number to pass in.
@return The maximum value which is align to power of 2 and less the MemoryLength
**/
)
{
),
32
);
} else {
}
return Result;
}
/**
Determine the MTRR numbers used to program a memory range.
This function first checks the alignment of the base address. If the alignment of the base address <= Length,
cover the memory range (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and Length -= alignment.
Repeat the step until alignment > Length.
Then this function determines which direction of programming the variable MTRRs for the remaining length
will use fewer MTRRs.
@param BaseAddress Length of Memory to program MTRR
@param Length Length of Memory to program MTRR
@param MtrrNumber Pointer to the number of necessary MTRRs
@retval TRUE Positive direction is better.
FALSE Negtive direction is better.
**/
)
{
*MtrrNumber = 0;
if (BaseAddress != 0) {
do {
//
// Calculate the alignment of the base address.
//
break;
}
(*MtrrNumber)++;
BaseAddress += Alignment;
} while (TRUE);
if (Length == 0) {
return TRUE;
}
}
Positive = 0;
Subtractive = 0;
do {
Positive++;
} while (TempQword != 0);
Subtractive++;
do {
Subtractive++;
} while (TempQword != 0);
if (Positive <= Subtractive) {
*MtrrNumber += Positive;
return TRUE;
} else {
*MtrrNumber += Subtractive;
return FALSE;
}
}
/**
Invalid variable MTRRs according to the value in the shadow array.
This function programs MTRRs according to the values specified
in the shadow array.
@param VariableMtrr The array to shadow variable MTRRs content
**/
)
{
Cr4 = PreMtrrChange ();
Index = 0;
while (Index < VariableMtrrCount) {
}
Index ++;
}
}
/**
Programs variable MTRRs
This function programs variable MTRRs
@param MtrrNumber Index of MTRR to program.
@param BaseAddress Base address of memory region.
@param Length Length of memory region.
@param MemoryCacheType Memory type to set.
@param MtrrValidAddressMask The valid address mask for MTRR
**/
)
{
Cr4 = PreMtrrChange ();
//
// MTRR Physical Base
//
//
// MTRR Physical Mask
//
);
}
/**
Convert the Memory attibute value to MTRR_MEMORY_CACHE_TYPE.
@param MtrrType MTRR memory type
@return The enum item in MTRR_MEMORY_CACHE_TYPE
**/
)
{
switch (MtrrType) {
case MTRR_CACHE_UNCACHEABLE:
return CacheUncacheable;
return CacheWriteCombining;
case MTRR_CACHE_WRITE_THROUGH:
return CacheWriteThrough;
return CacheWriteProtected;
case MTRR_CACHE_WRITE_BACK:
return CacheWriteBack;
default:
//
// MtrrType is MTRR_CACHE_INVALID_TYPE, that means
// no mtrr covers the range
//
return CacheUncacheable;
}
}
/**
Initializes the valid bits mask and valid address mask for MTRRs.
This function initializes the valid bits mask and valid address mask for MTRRs.
@param MtrrValidBitsMask The mask for the valid bit of the MTRR
@param MtrrValidAddressMask The valid address mask for the MTRR
**/
)
{
if (RegEax >= 0x80000008) {
} else {
*MtrrValidAddressMask = 0xFFFFFFFF;
}
}
/**
Determing the real attribute of a memory range.
This function is to arbitrate the real attribute of the memory when
there are 2 MTRR covers the same memory range. For further details,
please refer the IA32 Software Developer's Manual, Volume 3,
Section 10.11.4.1.
@param MtrrType1 the first kind of Memory type
@param MtrrType2 the second kind of memory type
**/
)
{
switch (MtrrType1) {
case MTRR_CACHE_UNCACHEABLE:
break;
if (
) {
}
break;
case MTRR_CACHE_WRITE_THROUGH:
if (
) {
} else if(MtrrType2==MTRR_CACHE_UNCACHEABLE) {
}
break;
if (MtrrType2 == MTRR_CACHE_WRITE_PROTECTED ||
}
break;
case MTRR_CACHE_WRITE_BACK:
if (
) {
}
break;
case MTRR_CACHE_INVALID_TYPE:
break;
default:
break;
}
if (MtrrType2 == MTRR_CACHE_INVALID_TYPE) {
}
return MtrrType;
}
/**
This function attempts to set the attributes for a memory range.
@param BaseAddress The physical address that is the start
address of a memory region.
@param Length The size in bytes of the memory region.
@param Attributes The bit mask of attributes to set for the
memory region.
@retval RETURN_SUCCESS The attributes were set for the memory
region.
@retval RETURN_INVALID_PARAMETER Length is zero.
@retval RETURN_UNSUPPORTED The processor does not support one or
more bytes of the memory resource range
specified by BaseAddress and Length.
@retval RETURN_UNSUPPORTED The bit mask of attributes is not support
for the memory resource range specified
by BaseAddress and Length.
@retval RETURN_ACCESS_DENIED The attributes for the memory resource
range specified by BaseAddress and Length
cannot be modified.
@retval RETURN_OUT_OF_RESOURCES There are not enough system resources to
modify the attributes of the memory
resource range.
**/
)
{
DEBUG((DEBUG_CACHE, "MtrrSetMemoryAttribute() %a:%016lx-%016lx\n", mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, Length));
if (!IsMtrrSupported ()) {
goto Done;
}
TempQword = 0;
//
// Check for an invalid parameter
//
if (Length == 0) {
goto Done;
}
if (
(BaseAddress & ~MtrrValidAddressMask) != 0 ||
(Length & ~MtrrValidAddressMask) != 0
) {
goto Done;
}
//
// Check if Fixed MTRR
//
Cr4 = PreMtrrChange ();
if (RETURN_ERROR (Status)) {
goto Done;
}
}
if (Length == 0) {
//
// A Length of 0 can only make sense for fixed MTTR ranges.
// Since we just handled the fixed MTRRs, we can skip the
// variable MTRR section.
//
goto Done;
}
//
// Since memory ranges below 1MB will be overridden by the fixed MTRRs,
// we can set the base to 0 to save variable MTRRs.
//
if (BaseAddress == BASE_1MB) {
BaseAddress = 0;
}
//
// Check for overlap
//
UsedMtrr = MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask, MtrrValidAddressMask, VariableMtrr);
if (OverLap) {
Status = CombineMemoryAttribute (MemoryType, &BaseAddress, &Length, VariableMtrr, &UsedMtrr, &OverwriteExistingMtrr);
if (RETURN_ERROR (Status)) {
goto Done;
}
if (Length == 0) {
//
// Combined successfully, invalidate the now-unused MTRRs
//
goto Done;
}
}
//
// The memory type is the same with the type specified by
// MTRR_LIB_IA32_MTRR_DEF_TYPE.
//
//
// Invalidate the now-unused MTRRs
//
goto Done;
}
goto Done;
}
//
// Invalidate the now-unused MTRRs
//
//
// Find first unused MTRR
//
MsrNum += 2
) {
break;
}
}
if (BaseAddress != 0) {
do {
//
// Calculate the alignment of the base address.
//
break;
}
//
// Find unused MTRR
//
break;
}
}
);
BaseAddress += Alignment;
} while (TRUE);
if (Length == 0) {
goto Done;
}
}
if (!Positive) {
//
// Find unused MTRR
//
break;
}
}
);
BaseAddress += Length;
}
do {
//
// Find unused MTRR
//
break;
}
}
if (!Positive) {
BaseAddress -= Length;
}
);
if (Positive) {
BaseAddress += Length;
}
} while (TempQword > 0);
Done:
if (!RETURN_ERROR (Status)) {
}
return Status;
}
/**
This function will get the memory cache type of the specific address.
This function is mainly for debug purpose.
@param Address The specific address
@return Memory cache type of the sepcific address
**/
)
{
if (!IsMtrrSupported ()) {
return CacheUncacheable;
}
//
// Check if MTRR is enabled, if not, return UC as attribute
//
if ((TempQword & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
return CacheUncacheable;
}
//
// If address is less than 1M, then try to go through the fixed MTRR
//
if ((TempQword & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED) != 0) {
//
// Go through the fixed MTRR
//
Address < (
)
) {
SubIndex =
return GetMemoryCacheTypeFromMtrrType (MtrrType);
}
}
}
}
);
//
// Go through the variable MTRR
//
}
}
}
return CacheType;
}
/**
This function will get the raw value in variable MTRRs
@param VariableSettings A buffer to hold variable MTRRs content.
@return The VariableSettings input pointer
**/
)
{
if (!IsMtrrSupported ()) {
return VariableSettings;
}
}
return VariableSettings;
}
/**
Worker function setting variable MTRRs
@param VariableSettings A buffer to hold variable MTRRs content.
**/
)
{
);
);
}
}
/**
This function sets variable MTRRs
@param VariableSettings A buffer to hold variable MTRRs content.
@return The pointer of VariableSettings
**/
)
{
if (!IsMtrrSupported ()) {
return VariableSettings;
}
Cr4 = PreMtrrChange ();
return VariableSettings;
}
/**
This function gets the content in fixed MTRRs
@param FixedSettings A buffer to hold fixed Mtrrs content.
@retval The pointer of FixedSettings
**/
)
{
if (!IsMtrrSupported ()) {
return FixedSettings;
}
};
return FixedSettings;
}
/**
Worker function setting fixed MTRRs
@param FixedSettings A buffer to hold fixed Mtrrs content.
**/
)
{
);
}
}
/**
This function sets fixed MTRRs
@param FixedSettings A buffer to hold fixed Mtrrs content.
@retval The pointer of FixedSettings
**/
)
{
if (!IsMtrrSupported ()) {
return FixedSettings;
}
Cr4 = PreMtrrChange ();
return FixedSettings;
}
/**
This function gets the content in all MTRRs (variable and fixed)
@param MtrrSetting A buffer to hold all Mtrrs content.
@retval the pointer of MtrrSetting
**/
)
{
if (!IsMtrrSupported ()) {
return MtrrSetting;
}
//
// Get fixed MTRRs
//
//
// Get variable MTRRs
//
//
// Get MTRR_DEF_TYPE value
//
return MtrrSetting;
}
/**
This function sets all MTRRs (variable and fixed)
@param MtrrSetting A buffer holding all MTRRs content.
@retval The pointer of MtrrSetting
**/
)
{
if (!IsMtrrSupported ()) {
return MtrrSetting;
}
Cr4 = PreMtrrChange ();
//
// Set fixed MTRRs
//
//
// Set variable MTRRs
//
//
// Set MTRR_DEF_TYPE value
//
return MtrrSetting;
}
/**
This function prints all MTRRs for debugging.
**/
)
{
if (!IsMtrrSupported ()) {
return;
}
}
));
}
Base = 0;
if (MemoryType > CacheWriteBack) {
}
if (MemoryType != PreviousMemoryType) {
if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
}
}
}
}
do {
if (MemoryType > CacheWriteBack) {
}
if (MemoryType != PreviousMemoryType) {
if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
}
}
if (RegEax >= 0x80000008) {
}
RangeLimit = Limit;
//
// If mask is not valid, then do not display range
//
continue;
}
}
}
}
}
}
}
}
}
if (Found) {
} else {
}
} while (Found);
);
}
/**
Checks if MTRR is supported.
@retval TRUE MTRR is supported.
@retval FALSE MTRR is not supported.
**/
)
{
//
// Check CPUID(1).EDX[12] for MTRR capability
//
return FALSE;
}
//
// Check IA32_MTRRCAP.[0..7] for number of variable MTRRs and IA32_MTRRCAP[8] for
// fixed MTRRs existence. If number of variable MTRRs is zero, or fixed MTRRs do not
// exist, return false.
//
return FALSE;
}
return TRUE;
}