/** @file
Header file for Pci shell Debug1 function.
Copyright (c) 2005 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_SHELL_PCI_H_
#define _EFI_SHELL_PCI_H_
typedef enum {
(UINT64) ((((UINTN) Bus) << 24) + (((UINTN) Dev) << 16) + (((UINTN) Func) << 8) + (LShiftU64 ((UINT64) ExReg, 32))) \
);
//
//
#define PCIE_PCIE_ENDPOINT 0
((DevicePortType) == PCIE_PCIE_ENDPOINT || \
(DevicePortType) == PCIE_LEGACY_PCIE_ENDPOINT || \
((DevicePortType == PCIE_SWITCH_UPSTREAM_PORT) || \
//
// Capabilities Register
//
((PcieCapReg) & 0x0f)
//
// Device Capabilities Register
//
((PcieDeviceCap) & 0x7)
//
// Device Control Register
//
((PcieDeviceControl) & 0x1)
//
// Device Status Register
//
((PcieDeviceStatus) & 0x1)
//
// Link Capabilities Register
//
((PcieLinkCap) & 0x0f)
//
// Link Control Register
//
((PcieLinkControl) & 0x3)
//
// Link Status Register
//
((PcieLinkStatus) & 0x0f)
//
// Slot Capabilities Register
//
((PcieSlotCap) & 0x1)
//
// Slot Control Register
//
((PcieSlotControl) & 0x1)
//
// Slot Status Register
//
((PcieSlotStatus) & 0x1)
//
// Root Control Register
//
((PcieRootControl) & 0x1)
//
// Root Capabilities Register
//
((PcieRootCap) & 0x1)
//
// Root Status Register
//
((PcieRootStatus) & 0x0ffff)
#pragma pack(1)
//
// Common part of the PCI configuration space header for devices, P2P bridges,
// and cardbus bridges
//
typedef struct {
//
// PCI configuration space header for devices(after the common part)
//
typedef struct {
//
// PCI configuration space header for pci-to-pci bridges(after the common part)
//
typedef struct {
//
// PCI configuration space header for cardbus bridges(after the common part)
//
typedef struct {
// Address Register
//
//
// Data region after PCI configuration header(for cardbus bridge)
//
typedef struct {
// Mode Base Address
//
typedef union {
typedef struct {
typedef struct {
#pragma pack()
#endif // _PCI_H_