/** @file
Private Header file for Usb Host Controller PEIM
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
of the BSD License which accompanies this distribution. The
full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_EHCI_URB_H_
#define _EFI_EHCI_URB_H_
//
// Hardware related bit definitions
//
#define QTD_STAT_DO_OUT 0
#define QTD_STAT_DO_SS 0
//
//
//
// The defination of EHCI hardware used data structure for
// little endian architecture. The QTD and QH structures
// are required to be 32 bytes aligned. Don't add members
// to the head of the associated software strucuture.
//
#pragma pack(1)
typedef struct {
} QTD_HW;
typedef struct {
//
// Endpoint capabilities/Characteristics DWord 1 and DWord 2
//
//
// Transaction execution overlay area
//
} QH_HW;
#pragma pack()
//
// Endpoint address and its capabilities
//
typedef struct _USB_ENDPOINT {
} USB_ENDPOINT;
//
// Software QTD strcture, this is used to manage all the
// QTD generated from a URB. Don't add fields before QtdHw.
//
struct _PEI_EHC_QTD {
};
//
// Software QH structure. All three different transaction types
// transfers use the queue head and queue token strcuture.
//
// Interrupt QHs are linked to periodic frame list in the reversed
// 2^N tree. Each interrupt QH is linked to the list starting at
// frame 0. There is a dummy interrupt QH linked to each frame as
// a sentinental whose polling interval is 1. Synchronous interrupt
// transfer is linked after this dummy QH.
//
// transfer is supported. A dummy QH is linked to EHCI AsyncListAddr
// as the reclamation header. New transfer is inserted after this QH.
//
struct _PEI_EHC_QH {
};
//
// URB (Usb Request Block) contains information for all kinds of
// usb requests.
//
struct _PEI_URB {
//
// Transaction information
//
//
// Schedule data
//
//
// Transaction result
//
};
/**
Delete a single asynchronous interrupt transfer for
the device and endpoint.
@param Ehc The EHCI device.
@param Data Current data not associated with a QTD.
@param DataLen The length of the data.
@param PktId Packet ID to use in the QTD.
@param Toggle Data toggle to use in the QTD.
@param MaxPacket Maximu packet length of the endpoint.
@retval the pointer to the created QTD or NULL if failed to create one.
**/
)
;
/**
Allocate and initialize a EHCI queue head.
@param Ehci The EHCI device.
@param Ep The endpoint to create queue head for.
@retval the pointer to the created queue head or NULL if failed to create one.
**/
)
;
/**
Free an allocated URB. It is possible for it to be partially inited.
@param Ehc The EHCI device.
@param Urb The URB to free.
**/
)
;
/**
Create a new URB and its associated QTD.
@param Ehc The EHCI device.
@param DevAddr The device address.
@param EpAddr Endpoint addrress & its direction.
@param DevSpeed The device speed.
@param Toggle Initial data toggle to use.
@param MaxPacket The max packet length of the endpoint.
@param Hub The transaction translator to use.
@param Type The transaction type.
@param Request The standard USB request for control transfer.
@param Data The user data to transfer.
@param DataLen The length of data buffer.
@param Callback The function to call when data is transferred.
@param Context The context to the callback.
@param Interval The interval for interrupt transfer.
@retval the pointer to the created URB or NULL.
**/
PEI_URB *
)
;
#endif