/** @file
Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "WinNtInclude.h"
#ifndef __GNUC__
#include <windows.h>
#include <io.h>
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <ctype.h>
#include <Common/UefiBaseTypes.h>
#include <IndustryStandard/PeImage.h>
#include "PeCoffLib.h"
#include "EfiUtilityMsgs.h"
#include "GenFw.h"
#include "ElfConvert.h"
#include "Elf32Convert.h"
);
);
);
);
);
);
//
// Rename ELF32 strucutres to common names to help when porting to ELF64.
//
//
// Well known ELF structures.
//
//
// Coff information
//
//
// PE section alignment.
//
//
// ELF sections to offset in Coff file.
//
//
// Offsets in COFF file
//
//
// Initialization Function
//
)
{
//
// Initialize data pointer and structures.
//
//
// Check the ELF32 specific header information.
//
return FALSE;
}
return FALSE;
}
return FALSE;
}
return FALSE;
}
Error (NULL, 0, 3000, "Unsupported", "ELF e_version (%u) not EV_CURRENT (%d)", (unsigned) mEhdr->e_version, EV_CURRENT);
return FALSE;
}
//
// Update section header pointers
//
//
// Create COFF Section offset buffer and zero.
//
//
// Fill in function pointers.
//
return TRUE;
}
//
// Header by Index functions
//
)
{
return NULL;
}
)
{
return NULL;
}
}
)
{
}
//
// filter functions
//
)
{
}
)
{
return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0);
}
)
{
if (IsHiiRsrcShdr(Shdr)) {
return FALSE;
}
}
//
// Elf functions interface implementation
//
)
{
UINT32 i;
CoffEntry = 0;
mCoffOffset = 0;
//
// Coff file start with a DOS header.
//
case EM_386:
case EM_ARM:
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
break;
default:
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
break;
}
//
// First text sections.
//
SectionCount = 0;
if (IsTextShdr(shdr)) {
// the alignment field is valid
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
}
}
/* Relocate entry. */
}
SectionCount ++;
}
}
}
Warning (NULL, 0, 0, NULL, "Mulitple sections in %s are merged into 1 text section. Source level debug might not work correctly.", mInImageName);
}
//
// Then data sections.
//
SectionCount = 0;
if (IsDataShdr(shdr)) {
// the alignment field is valid
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
}
}
SectionCount ++;
}
}
Warning (NULL, 0, 0, NULL, "Mulitple sections in %s are merged into 1 data section. Source level debug might not work correctly.", mInImageName);
}
//
// The HII resource sections.
//
if (IsHiiRsrcShdr(shdr)) {
// the alignment field is valid
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
}
}
}
break;
}
}
//
// Allocate base Coff file. Will be expanded later for relocations.
//
//
// Fill headers.
//
case EM_386:
break;
case EM_ARM:
break;
default:
}
//
// Section headers.
//
if ((mDataOffset - mTextOffset) > 0) {
} else {
// Don't make a section of size 0.
}
if ((mHiiRsrcOffset - mDataOffset) > 0) {
} else {
// Don't make a section of size 0.
}
if ((mRelocOffset - mHiiRsrcOffset) > 0) {
NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].Size = mRelocOffset - mHiiRsrcOffset;
NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].VirtualAddress = mHiiRsrcOffset;
} else {
// Don't make a section of size 0.
}
}
)
{
//
// Initialize filter pointer
//
switch (FilterType) {
case SECTION_TEXT:
Filter = IsTextShdr;
break;
case SECTION_HII:
break;
case SECTION_DATA:
Filter = IsDataShdr;
break;
default:
return FALSE;
}
//
// First: copy sections.
//
case SHT_PROGBITS:
/* Copy. */
break;
case SHT_NOBITS:
break;
default:
//
// Ignore for unkown section type.
//
VerboseMsg ("%s unknown section type %x. We directly copy this section into Coff file", mInImageName, (unsigned)Shdr->sh_type);
break;
}
}
}
//
// Second: apply relocations.
//
//
// Determine if this is a relocation section.
//
continue;
}
//
// Relocation section found. Now extract section information that the relocations
// apply to in the ELF data and the new COFF data.
//
//
// Only process relocations for the current filter type.
//
//
// Determine the symbol table referenced by the relocation data.
//
//
// Process all relocation entries for this section.
//
//
// Set pointer to relocation entry
//
//
// Set pointer to symbol table entry associated with the relocation entry.
//
//
// Check section header index found in symbol table and get the section
// header location.
//
}
//
// Convert the relocation data to a pointer into the coff file.
//
// Note:
// r_offset is the virtual address of the storage unit to be relocated.
// sh_addr is the virtual address for the base of the section.
//
//
// Determine how to handle each relocation type based on the machine type.
//
case R_386_NONE:
break;
case R_386_32:
//
// Absolute relocation.
// Converts Targ from a absolute virtual address to the absolute
// COFF address.
//
break;
case R_386_PC32:
//
// Relative relocation: Symbol - Ip + Addend
//
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
case R_ARM_RBASE:
// No relocation - no action required
// break skipped
case R_ARM_PC24:
case R_ARM_XPC25:
case R_ARM_THM_PC22:
case R_ARM_THM_JUMP19:
case R_ARM_CALL:
case R_ARM_JMP24:
case R_ARM_THM_JUMP24:
case R_ARM_PREL31:
case R_ARM_MOVW_PREL_NC:
case R_ARM_MOVT_PREL:
case R_ARM_THM_MOVW_PREL_NC:
case R_ARM_THM_MOVT_PREL:
case R_ARM_THM_JMP6:
case R_ARM_THM_ALU_PREL_11_0:
case R_ARM_THM_PC12:
case R_ARM_REL32_NOI:
case R_ARM_ALU_PC_G0_NC:
case R_ARM_ALU_PC_G0:
case R_ARM_ALU_PC_G1_NC:
case R_ARM_ALU_PC_G1:
case R_ARM_ALU_PC_G2:
case R_ARM_LDR_PC_G1:
case R_ARM_LDR_PC_G2:
case R_ARM_LDRS_PC_G0:
case R_ARM_LDRS_PC_G1:
case R_ARM_LDRS_PC_G2:
case R_ARM_LDC_PC_G0:
case R_ARM_LDC_PC_G1:
case R_ARM_LDC_PC_G2:
case R_ARM_GOT_PREL:
case R_ARM_THM_JUMP11:
case R_ARM_THM_JUMP8:
case R_ARM_TLS_GD32:
case R_ARM_TLS_LDM32:
case R_ARM_TLS_IE32:
// Thease are all PC-relative relocations and don't require modification
// GCC does not seem to have the concept of a application that just needs to get relocated.
break;
case R_ARM_THM_MOVW_ABS_NC:
// MOVW is only lower 16-bits of the addres
break;
case R_ARM_THM_MOVT_ABS:
// MOVT is only upper 16-bits of the addres
break;
case R_ARM_ABS32:
case R_ARM_RABS32:
//
// Absolute relocation.
//
break;
default:
Error (NULL, 0, 3000, "Invalid", "WriteSections (): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
}
}
}
}
}
return TRUE;
}
)
{
UINTN K;
case R_386_NONE:
case R_386_PC32:
//
// No fixup entry required.
//
break;
case R_386_32:
//
// Creates a relative relocation entry from the absolute entry.
//
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
case R_ARM_RBASE:
// No relocation - no action required
// break skipped
case R_ARM_PC24:
case R_ARM_XPC25:
case R_ARM_THM_PC22:
case R_ARM_THM_JUMP19:
case R_ARM_CALL:
case R_ARM_JMP24:
case R_ARM_THM_JUMP24:
case R_ARM_PREL31:
case R_ARM_MOVW_PREL_NC:
case R_ARM_MOVT_PREL:
case R_ARM_THM_MOVW_PREL_NC:
case R_ARM_THM_MOVT_PREL:
case R_ARM_THM_JMP6:
case R_ARM_THM_ALU_PREL_11_0:
case R_ARM_THM_PC12:
case R_ARM_REL32_NOI:
case R_ARM_ALU_PC_G0_NC:
case R_ARM_ALU_PC_G0:
case R_ARM_ALU_PC_G1_NC:
case R_ARM_ALU_PC_G1:
case R_ARM_ALU_PC_G2:
case R_ARM_LDR_PC_G1:
case R_ARM_LDR_PC_G2:
case R_ARM_LDRS_PC_G0:
case R_ARM_LDRS_PC_G1:
case R_ARM_LDRS_PC_G2:
case R_ARM_LDC_PC_G0:
case R_ARM_LDC_PC_G1:
case R_ARM_LDC_PC_G2:
case R_ARM_GOT_PREL:
case R_ARM_THM_JUMP11:
case R_ARM_THM_JUMP8:
case R_ARM_TLS_GD32:
case R_ARM_TLS_LDM32:
case R_ARM_TLS_IE32:
// Thease are all PC-relative relocations and don't require modification
break;
case R_ARM_THM_MOVW_ABS_NC:
);
break;
case R_ARM_THM_MOVT_ABS:
if ((gMovwOffset + 4) != (mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr))) {
Error (NULL, 0, 3000, "Not Supported", "PE/COFF requires MOVW+MOVT instruction sequence %x +4 != %x.", gMovwOffset, mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
}
break;
case R_ARM_ABS32:
case R_ARM_RABS32:
);
break;
default:
Error (NULL, 0, 3000, "Invalid", "WriteRelocations(): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
}
} else {
Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
}
}
}
}
}
/* Try again, but look for PT_DYNAMIC instead of SHT_REL */
RelElementSize = 0;
RelSize = 0;
RelOffset = 0;
case DT_REL:
break;
case DT_RELSZ:
break;
case DT_RELENT:
break;
default:
break;
}
Dyn++;
}
}
for (K = 0; K < RelSize; K += RelElementSize) {
if (DynamicSegment->p_paddr == 0) {
// Older versions of the ARM ELF (SWS ESPC 0003 B-02) specification define DT_REL
// as an offset in the dynamic segment. p_paddr is defined to be zero for ARM tools
} else {
// This is how it reads in the generic ELF specification
}
case R_ARM_RBASE:
break;
case R_ARM_RABS32:
// Note: r_offset in a memory address. Convert it to a pointer in the coff file.
Targ = mCoffFile + mCoffSectionsOffset[ ELF32_R_SYM( Rel->r_info ) ] + Rel->r_offset - TargetSegment->p_vaddr;
CoffAddFixup (mCoffSectionsOffset[ELF32_R_SYM (Rel->r_info)] + (Rel->r_offset - TargetSegment->p_vaddr), EFI_IMAGE_REL_BASED_HIGHLOW);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations, unkown type %d.", mInImageName, ELF32_R_TYPE (Rel->r_info));
break;
}
}
break;
}
}
}
//
// Pad by adding empty entries.
//
}
// If no relocations, null out the directory entry and don't add the .reloc section
Dir->VirtualAddress = 0;
} else {
}
}
)
{
mCoffOffset += sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY)
+ sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY)
+ Len;
// If no debug, null out the directory entry and don't add the .debug section
DataDir->VirtualAddress = 0;
} else {
}
}
)
{
//
// Set image size
//
}
)
{
if (mCoffSectionsOffset != NULL) {
}
}