cpum.h revision c1d279fc0865b91a40b30eda02ed14f6533fe1a4
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @file
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUM - CPU Monitor(/ Manager).
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Copyright (C) 2006-2015 Oracle Corporation
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync *
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * available from http://www.virtualbox.org. This file is free software;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * you can redistribute it and/or modify it under the terms of the GNU
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * General Public License (GPL) as published by the Free Software
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync *
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * The contents of this file may alternatively be used under the terms
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * of the Common Development and Distribution License Version 1.0
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * VirtualBox OSE distribution, in which case the provisions of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CDDL are applicable instead of those of the GPL.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync *
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * You may elect to license modified versions of this file under the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * terms and conditions of either the GPL or the CDDL or both.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync#ifndef ___VBox_vmm_cpum_h
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync#define ___VBox_vmm_cpum_h
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#include <iprt/x86.h>
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#include <VBox/types.h>
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync#include <VBox/vmm/cpumctx.h>
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync#include <VBox/vmm/stam.h>
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncRT_C_DECLS_BEGIN
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @defgroup grp_cpum The CPU Monitor / Manager API
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @{
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/**
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUID feature to set or clear.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef enum CPUMCPUIDFEATURE
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync{
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_INVALID = 0,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The APIC feature bit. (Std+Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_APIC,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The sysenter/sysexit feature bit. (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_SEP,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The SYSCALL/SYSEXIT feature bit (64 bits mode only for Intel CPUs). (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_SYSCALL,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The PAE feature bit. (Std+Ext) */
24986763e9e9e6633a4a54479be945d577fdfd34vboxsync CPUMCPUIDFEATURE_PAE,
24986763e9e9e6633a4a54479be945d577fdfd34vboxsync /** The NX feature bit. (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_NX,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The LAHF/SAHF feature bit (64 bits mode only). (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_LAHF,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The LONG MODE feature bit. (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_LONG_MODE,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The PAT feature bit. (Std+Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_PAT,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The x2APIC feature bit. (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_X2APIC,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The RDTSCP feature bit. (Ext) */
99fc25fde31ac60ee18ac48eab7027dea4272a0bvboxsync CPUMCPUIDFEATURE_RDTSCP,
99fc25fde31ac60ee18ac48eab7027dea4272a0bvboxsync /** The Hypervisor Present bit. (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_HVP,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The MWait Extensions bits (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_MWAIT_EXTS,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** 32bit hackishness. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUIDFEATURE_32BIT_HACK = 0x7fffffff
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync} CPUMCPUIDFEATURE;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/**
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPU Vendor.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef enum CPUMCPUVENDOR
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync{
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUVENDOR_INVALID = 0,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMCPUVENDOR_INTEL,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUVENDOR_AMD,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUVENDOR_VIA,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUVENDOR_CYRIX,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUVENDOR_UNKNOWN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** 32bit hackishness. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync CPUMCPUVENDOR_32BIT_HACK = 0x7fffffff
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync} CPUMCPUVENDOR;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * X86 and AMD64 CPU microarchitectures and in processor generations.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @remarks The separation here is sometimes a little bit too finely grained,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * and the differences is more like processor generation than micro
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * arch. This can be useful, so we'll provide functions for getting at
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * more coarse grained info.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef enum CPUMMICROARCH
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Invalid = 0,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_8086 = kCpumMicroarch_Intel_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_80186,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_80286,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_80386,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_80486,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P5,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6_Core_Atom_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6 = kCpumMicroarch_Intel_P6_Core_Atom_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6_II,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6_III,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6_M_Banias,
dbca5bd5e2f9d025c280c2f040518de4e93ff58dvboxsync kCpumMicroarch_Intel_P6_M_Dothan,
dbca5bd5e2f9d025c280c2f040518de4e93ff58dvboxsync kCpumMicroarch_Intel_Core_Yonah, /**< Core, also known as Enhanced Pentium M. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core2_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core2_Merom = kCpumMicroarch_Intel_Core2_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core2_Penryn,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Nehalem = kCpumMicroarch_Intel_Core7_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Westmere,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_SandyBridge,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_IvyBridge,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Haswell,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Broadwell,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Skylake,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Cannonlake,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Bonnell = kCpumMicroarch_Intel_Atom_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Lincroft, /**< Second generation bonnell (44nm). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Saltwell, /**< 32nm shrink of Bonnell. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Silvermont, /**< 22nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Airmount, /**< 14nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Goldmont, /**< 14nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6_Core_Atom_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Willamette = kCpumMicroarch_Intel_NB_First, /**< 180nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Northwood, /**< 130nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Prescott, /**< 90nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Prescott2M, /**< 90nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_CedarMill, /**< 65nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Gallatin, /**< 90nm Xeon, Pentium 4 Extreme Edition ("Emergency Edition"). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Am286 = kCpumMicroarch_AMD_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Am386,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Am486,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Am486Enh, /**< Covers Am5x86 as well. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K5,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K6,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Palomino = kCpumMicroarch_AMD_K7_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Spitfire,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Thunderbird,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Morgan,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Thoroughbred,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Barton,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_130nm = kCpumMicroarch_AMD_K8_First, /**< 130nm Clawhammer, Sledgehammer, Newcastle, Paris, Odessa, Dublin */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_90nm, /**< 90nm shrink */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_90nm_DualCore, /**< 90nm with two cores. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_90nm_AMDV, /**< 90nm with AMD-V (usually) and two cores (usually). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_65nm, /**< 65nm shrink. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K10,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K10_Lion,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K10_Llano,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Bobcat,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Jaguar,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Bulldozer = kCpumMicroarch_AMD_15h_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Piledriver,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Steamroller, /**< Yet to be released, might have different family. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Excavator, /**< Yet to be released, might have different family. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_16h_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_16h_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Centaur_C6 = kCpumMicroarch_VIA_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Centaur_C2,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Centaur_C3,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_M2,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5A, /**< 180nm Samuel - Cyrix III, C3, 1GigaPro. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5B, /**< 150nm Samuel 2 - Cyrix III, C3, 1GigaPro, Eden ESP, XP 2000+. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5C, /**< 130nm Ezra - C3, Eden ESP. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5N, /**< 130nm Ezra-T - C3. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5XL, /**< 130nm Nehemiah - C3, Eden ESP, Eden-N. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5P, /**< 130nm Nehemiah+ - C3. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C7_C5J, /**< 90nm Esther - C7, C7-D, C7-M, Eden, Eden ULV. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_Isaiah,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_5x86 = kCpumMicroarch_Cyrix_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_M1,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_MediaGX,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_MediaGXm,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_M2,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_End,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Unknown,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_32BitHack = 0x7fffffff
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync} CPUMMICROARCH;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching netburst CPUs. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_INTEL_NETBURST(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_Intel_NB_First && (a_enmMicroarch) <= kCpumMicroarch_Intel_NB_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching Core7 CPUs. */
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#define CPUMMICROARCH_IS_INTEL_CORE7(a_enmMicroarch) \
83d61602c6968041692aa7203ee51c4085c7e460vboxsync ((a_enmMicroarch) >= kCpumMicroarch_Intel_Core7_First && (a_enmMicroarch) <= kCpumMicroarch_Intel_Core7_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family OFh CPUs (aka K8). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_0FH(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_AMD_K8_First && (a_enmMicroarch) <= kCpumMicroarch_AMD_K8_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 10H CPUs (aka K10). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_10H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_K10)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 11H CPUs (aka Lion). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_11H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_K10_Lion)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 12H CPUs (aka Llano). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_12H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_K10_Llano)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 14H CPUs (aka Bobcat). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_14H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_Bobcat)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 15H CPUs (bulldozer and it's
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * decendants). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_15H(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_AMD_15h_First && (a_enmMicroarch) <= kCpumMicroarch_AMD_15h_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 16H CPUs. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_16H(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_AMD_16h_First && (a_enmMicroarch) <= kCpumMicroarch_AMD_16h_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * CPUID leaf.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef struct CPUMCPUIDLEAF
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The leaf number. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t uLeaf;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The sub-leaf number. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t uSubLeaf;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Sub-leaf mask. This is 0 when sub-leaves aren't used. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t fSubLeafMask;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The EAX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t uEax;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The EBX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t uEbx;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The ECX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t uEcx;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The EDX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t uEdx;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flags. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t fFlags;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync} CPUMCPUIDLEAF;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Pointer to a CPUID leaf. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef CPUMCPUIDLEAF *PCPUMCPUIDLEAF;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Pointer to a const CPUID leaf. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef CPUMCPUIDLEAF const *PCCPUMCPUIDLEAF;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @name CPUMCPUIDLEAF::fFlags
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @{ */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Indicates that ECX (the sub-leaf indicator) doesn't change when
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * requesting the final leaf and all undefined leaves that follows it.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Observed for 0x0000000b on Intel. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMCPUIDLEAF_F_SUBLEAVES_ECX_UNCHANGED RT_BIT_32(0)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @} */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Method used to deal with unknown CPUID leafs.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef enum CPUMUKNOWNCPUID
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Invalid zero value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_INVALID = 0,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Use given default values (DefCpuId). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_DEFAULTS,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Return the last standard leaf.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Intel Sandy Bridge has been observed doing this. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_LAST_STD_LEAF,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Return the last standard leaf, with ecx observed.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Intel Sandy Bridge has been observed doing this. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_LAST_STD_LEAF_WITH_ECX,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The register values are passed thru unmodified. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_PASSTHRU,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** End of valid value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_END,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Ensure 32-bit type. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID_32BIT_HACK = 0x7fffffff
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync} CPUMUKNOWNCPUID;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Pointer to unknown CPUID leaf method. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef CPUMUKNOWNCPUID *PCPUMUKNOWNCPUID;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/**
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * MSR read functions.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef enum CPUMMSRRDFN
d9e8985b936caa8e72f58c48045478fc2776dc5evboxsync{
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Invalid zero value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Invalid = 0,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Return the CPUMMSRRANGE::uValue. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_FixedValue,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Alias to the MSR range starting at the MSR given by
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUMMSRRANGE::uValue. Must be used in pair with
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * kCpumMsrWrFn_MsrAlias. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_MsrAlias,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Write only register, GP all read attempts. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_WriteOnly,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32P5McAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32P5McType,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32TimestampCounter,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PlatformId, /**< Takes real CPU value for reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ApicBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32FeatureControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32BiosSignId, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32SmmMonitorCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PmcN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MonitorFilterLineSize,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MPerf,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32APerf,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrCap, /**< Takes real CPU value for reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrPhysBaseN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrPhysMaskN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrFixed, /**< Takes CPUMCPU offset. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrDefType,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32Pat,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32SysEnterCs,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32SysEnterEsp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32SysEnterEip,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McgCap,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McgStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McgCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32DebugCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32SmrrPhysBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32SmrrPhysMask,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PlatformDcaCap,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32CpuDcaCap,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32Dca0Cap,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfEvtSelN, /**< Range value indicates the register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfStatus, /**< Range value returned. */
eb30b3bfcb8b0e55f5498ba7a84e55a536debcd7vboxsync kCpumMsrRdFn_Ia32PerfCtl, /**< Range value returned. */
eb30b3bfcb8b0e55f5498ba7a84e55a536debcd7vboxsync kCpumMsrRdFn_Ia32FixedCtrN, /**< Takes register number of start of range. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfCapabilities, /**< Takes reference value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32FixedCtrCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfGlobalStatus, /**< Takes reference value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfGlobalCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfGlobalOvfCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PebsEnable,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ClockModulation, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ThermInterrupt, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ThermStatus, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32Therm2Ctl, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MiscEnable, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McCtlStatusAddrMiscN, /**< Takes bank number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McNCtl2, /**< Takes register number of start of range. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32DsArea,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32TscDeadline,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32X2ApicN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32DebugInterface,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxBase, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxPinbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxProcbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxExitCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxEntryCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxMisc, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr0Fixed0, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr0Fixed1, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr4Fixed0, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr4Fixed1, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxVmcsEnum, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxProcBasedCtls2, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxEptVpidCap, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTruePinbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTrueProcbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTrueExitCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTrueEntryCtls, /**< Takes real value as reference. */
559419830ee63b8481ade36d8994f235932aae49vboxsync
559419830ee63b8481ade36d8994f235932aae49vboxsync kCpumMsrRdFn_Amd64Efer,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrRdFn_Amd64SyscallTarget,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrRdFn_Amd64LongSyscallTarget,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Amd64CompSyscallTarget,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Amd64SyscallFlagMask,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Amd64FsBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Amd64GsBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Amd64KernelGsBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Amd64TscAux,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelEblCrPowerOn,
559419830ee63b8481ade36d8994f235932aae49vboxsync kCpumMsrRdFn_IntelI7CoreThreadCount,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelP4EbcHardPowerOn,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelP4EbcSoftPowerOn,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelP4EbcFrequencyId,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelP6FsbFrequency, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelPlatformInfo,
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelFlexRatio, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelPkgCStConfigControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelPmgIoCaptureBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelLastBranchFromToN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelLastBranchFromN,
26f38400c03761b1934b05fa93a64188e88e9904vboxsync kCpumMsrRdFn_IntelLastBranchToN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelLastBranchTos,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelBblCrCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelBblCrCtl3,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7TemperatureTarget, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7MsrOffCoreResponseN,/**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7MiscPwrMgmt,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelP6CrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCpuId1FeatureMaskEcdx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCpuId1FeatureMaskEax,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCpuId80000001FeatureMaskEcdx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7SandyAesNiCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7TurboRatioLimit, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7LbrSelect,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7SandyErrorControl,
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7VirtualLegacyWireCap,/**< Returns range value. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7PowerCtl,
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyPebsNumAlt,
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7PebsLdLat,
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7PkgCnResidencyN, /**< Takes C-state number. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7CoreCnResidencyN, /**< Takes C-state number. */
56fa1b550cbdeec7ef620d566155a388c04ca796vboxsync kCpumMsrRdFn_IntelI7SandyVrCurrentConfig,/**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyVrMiscConfig, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyRaplPowerUnit, /**< Takes real value as reference. */
acf97addaaed7b946d412cfcff46547ba7cb33bfvboxsync kCpumMsrRdFn_IntelI7SandyPkgCnIrtlN, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyPkgC2Residency, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7RaplPkgPowerLimit, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPkgEnergyStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPkgPerfStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPkgPowerInfo, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramPowerLimit, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramEnergyStatus,/**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramPerfStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramPowerInfo, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0PowerLimit, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0EnergyStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0Policy, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0PerfStatus, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7RaplPp1PowerLimit, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7RaplPp1EnergyStatus, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7RaplPp1Policy, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpNominal, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpLevel1, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpLevel2, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyTurboActivationRatio,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncPerfGlobalCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncPerfGlobalStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncPerfGlobalOvfCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncPerfFixedCtrCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncPerfFixedCtr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncCBoxConfig,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncArbPerfCtrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7UncArbPerfEvtSelN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCore2EmttmCrTablesN, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCore2SmmCStMiscInfo,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCore1ExtConfig,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCore1DtsCalControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCore2PeciControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
559419830ee63b8481ade36d8994f235932aae49vboxsync kCpumMsrRdFn_P6LastBranchFromIp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_P6LastBranchToIp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_P6LastIntFromIp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_P6LastIntToIp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hTscRate,
559419830ee63b8481ade36d8994f235932aae49vboxsync kCpumMsrRdFn_AmdFam15hLwpCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hLwpCbAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hMc4MiscN,
559419830ee63b8481ade36d8994f235932aae49vboxsync kCpumMsrRdFn_AmdK8PerfCtlN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8PerfCtrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8SysCfg, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8HwCr,
26f38400c03761b1934b05fa93a64188e88e9904vboxsync kCpumMsrRdFn_AmdK8IorrBaseN,
559419830ee63b8481ade36d8994f235932aae49vboxsync kCpumMsrRdFn_AmdK8IorrMaskN,
37fb67be7d1d328213aeda3f56ab5aacd37416d1vboxsync kCpumMsrRdFn_AmdK8TopOfMemN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8NbCfg1,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8McXcptRedir,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8CpuNameN,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8HwThermalCtrl, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8SwThermalCtrl,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8FidVidControl, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8FidVidStatus, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8McCtlMaskN,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8SmiOnIoTrapN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8SmiOnIoTrapCtlSts,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8IntPendingMessage,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8SmiTriggerIoCycle,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hMmioCfgBaseAddr,
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hTrapCtlMaybe,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdFam10hPStateCurLimit, /**< Returns range value. */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hPStateControl, /**< Returns range value. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdFam10hPStateStatus, /**< Returns range value. */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hPStateN, /**< Returns range value. This isn't an register index! */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hCofVidControl, /**< Returns range value. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdFam10hCofVidStatus, /**< Returns range value. */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hCStateIoBaseAddr,
873db999b6c8aa54ad92544e8a82d7cee26f87bfvboxsync kCpumMsrRdFn_AmdFam10hCpuWatchdogTimer,
873db999b6c8aa54ad92544e8a82d7cee26f87bfvboxsync kCpumMsrRdFn_AmdK8SmmBase,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8SmmAddr,
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8SmmMask,
873db999b6c8aa54ad92544e8a82d7cee26f87bfvboxsync kCpumMsrRdFn_AmdK8VmCr,
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdK8IgnNe,
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdK8SmmCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8VmHSavePa,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hVmLockKey,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hSmmLockKey,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hLocalSmiStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hOsVisWrkIdLength,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hOsVisWrkStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam16hL2IPerfCtlN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam16hL2IPerfCtrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hNorthbridgePerfCtlN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hNorthbridgePerfCtrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7MicrocodeCtl, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7ClusterIdMaybe, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8CpuIdCtlStd07hEbax,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8CpuIdCtlStd06hEcx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8CpuIdCtlStd01hEdcx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8CpuIdCtlExt01hEdcx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8PatchLevel, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7DebugStatusMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7BHTraceBaseMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7BHTracePtrMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7BHTraceLimitMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7HardwareDebugToolCfgMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7FastFlushCountMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7NodeId,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7DrXAddrMaskN, /**< Takes register index. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7Dr0DataMatchMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7Dr0DataMaskMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7LoadStoreCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7InstrCacheCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7DataCacheCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7BusUnitCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7DebugCtl2Maybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hFpuCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hDecoderCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hBusUnitCfg2,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hCombUnitCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hCombUnitCfg2,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hCombUnitCfg3,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hExecUnitCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam15hLoadStoreCfg2,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsFetchCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsFetchLinAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsFetchPhysAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsOpExecCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsOpRip,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsOpData,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsOpData2,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsOpData3,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsDcLinAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsDcPhysAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam10hIbsCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdFam14hIbsBrTarget,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Gim,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** End of valid MSR read function indexes. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_End
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync} CPUMMSRRDFN;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/**
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * MSR write functions.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync */
3942acfaf590eaef4740d7b8a5311bb91e2bed0dvboxsynctypedef enum CPUMMSRWRFN
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync{
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Invalid zero value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Invalid = 0,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Writes are ignored, the fWrGpMask is observed though. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IgnoreWrite,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Writes cause GP(0) to be raised, the fWrGpMask should be UINT64_MAX. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_ReadOnly,
45b7b06f3c4ef53f499c355505010a2b050802f4vboxsync /** Alias to the MSR range starting at the MSR given by
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUMMSRRANGE::uValue. Must be used in pair with
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * kCpumMsrRdFn_MsrAlias. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_MsrAlias,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
1524bfd2c9963f605135f70fc15ddb018a1e9178vboxsync kCpumMsrWrFn_Ia32P5McAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32P5McType,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32TimestampCounter,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32ApicBase,
682342827b0e80c493c820603508e79e76c42658vboxsync kCpumMsrWrFn_Ia32FeatureControl,
682342827b0e80c493c820603508e79e76c42658vboxsync kCpumMsrWrFn_Ia32BiosSignId,
8cb8cf7eeafbf2ad5b23866ca19f257bd3aaf9e7vboxsync kCpumMsrWrFn_Ia32BiosUpdateTrigger,
8cb8cf7eeafbf2ad5b23866ca19f257bd3aaf9e7vboxsync kCpumMsrWrFn_Ia32SmmMonitorCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32PmcN,
53799e1f1f6601cd3d6be95ff1aa8d3648712618vboxsync kCpumMsrWrFn_Ia32MonitorFilterLineSize,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MPerf,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32APerf,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrPhysBaseN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrPhysMaskN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrFixed, /**< Takes CPUMCPU offset. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrDefType,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32Pat,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32SysEnterCs,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32SysEnterEsp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32SysEnterEip,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32McgStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32McgCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32DebugCtl,
53799e1f1f6601cd3d6be95ff1aa8d3648712618vboxsync kCpumMsrWrFn_Ia32SmrrPhysBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32SmrrPhysMask,
53799e1f1f6601cd3d6be95ff1aa8d3648712618vboxsync kCpumMsrWrFn_Ia32PlatformDcaCap,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32Dca0Cap,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfEvtSelN, /**< Range value indicates the register number. */
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfStatus,
53799e1f1f6601cd3d6be95ff1aa8d3648712618vboxsync kCpumMsrWrFn_Ia32PerfCtl,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32FixedCtrN, /**< Takes register number of start of range. */
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfCapabilities,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32FixedCtrCtrl,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfGlobalStatus,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfGlobalCtrl,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfGlobalOvfCtrl,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PebsEnable,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32ClockModulation,
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32ThermInterrupt,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32ThermStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32Therm2Ctl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MiscEnable,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32McCtlStatusAddrMiscN, /**< Takes bank number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32McNCtl2, /**< Takes register number of start of range. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32DsArea,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32TscDeadline,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32X2ApicN,
79883babb0e5b9c7397c304d576bfc29282542afvboxsync kCpumMsrWrFn_Ia32DebugInterface,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Amd64Efer,
22646c9d8a83d8fd3f164563f0141636fcc5a71bvboxsync kCpumMsrWrFn_Amd64SyscallTarget,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Amd64LongSyscallTarget,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Amd64CompSyscallTarget,
22646c9d8a83d8fd3f164563f0141636fcc5a71bvboxsync kCpumMsrWrFn_Amd64SyscallFlagMask,
7a896688c49bde3fa1490e7ebb321ac51b6ad29dvboxsync kCpumMsrWrFn_Amd64FsBase,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Amd64GsBase,
681380880d4131019871e8f22cb3349b757168cavboxsync kCpumMsrWrFn_Amd64KernelGsBase,
681380880d4131019871e8f22cb3349b757168cavboxsync kCpumMsrWrFn_Amd64TscAux,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelEblCrPowerOn,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelP4EbcHardPowerOn,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelP4EbcSoftPowerOn,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelP4EbcFrequencyId,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelFlexRatio,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelPkgCStConfigControl,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelPmgIoCaptureBase,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelLastBranchFromToN,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelLastBranchFromN,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelLastBranchToN,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelLastBranchTos,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelBblCrCtl,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelBblCrCtl3,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelI7TemperatureTarget,
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelI7MsrOffCoreResponseN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7MiscPwrMgmt,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelP6CrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelCpuId1FeatureMaskEcdx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelCpuId1FeatureMaskEax,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelCpuId80000001FeatureMaskEcdx,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7SandyAesNiCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7TurboRatioLimit,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7LbrSelect,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7SandyErrorControl,
e8f5203e447f6c0729dae4e9b2c30fae30b9d774vboxsync kCpumMsrWrFn_IntelI7PowerCtl,
067777fa032e4ab5cbda22e890f4032c3543e11dvboxsync kCpumMsrWrFn_IntelI7SandyPebsNumAlt,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7PebsLdLat,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7SandyVrCurrentConfig,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7SandyVrMiscConfig,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7SandyPkgCnIrtlN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7RaplPkgPowerLimit,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7RaplDramPowerLimit,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7RaplPp0PowerLimit,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7RaplPp0Policy,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7RaplPp1PowerLimit,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7RaplPp1Policy,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7IvyConfigTdpControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelI7IvyTurboActivationRatio,
90e6b90c36958bb8eb46e30484412e9b500612d6vboxsync kCpumMsrWrFn_IntelI7UncPerfGlobalCtrl,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7UncPerfGlobalStatus,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7UncPerfGlobalOvfCtrl,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7UncPerfFixedCtrCtrl,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7UncPerfFixedCtr,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7UncArbPerfCtrN,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelI7UncArbPerfEvtSelN,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelCore2EmttmCrTablesN,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelCore2SmmCStMiscInfo,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMsrWrFn_IntelCore1ExtConfig,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelCore1DtsCalControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_IntelCore2PeciControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_P6LastIntFromIp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_P6LastIntToIp,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam15hTscRate,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam15hLwpCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam15hLwpCbAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hMc4MiscN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8PerfCtlN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8PerfCtrN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8SysCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8HwCr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8IorrBaseN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8IorrMaskN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8TopOfMemN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8NbCfg1,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8McXcptRedir,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8CpuNameN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8HwThermalCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8SwThermalCtrl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8FidVidControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8McCtlMaskN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8SmiOnIoTrapN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8SmiOnIoTrapCtlSts,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8IntPendingMessage,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8SmiTriggerIoCycle,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hMmioCfgBaseAddr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hTrapCtlMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hPStateControl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hPStateStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hPStateN,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hCofVidControl,
c3ad07071523338d76960d8da7678860aea8b03dvboxsync kCpumMsrWrFn_AmdFam10hCofVidStatus,
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync kCpumMsrWrFn_AmdFam10hCStateIoBaseAddr,
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync kCpumMsrWrFn_AmdFam10hCpuWatchdogTimer,
7847c123aebebc6d3d5c1406619cfba1ab6457c1vboxsync kCpumMsrWrFn_AmdK8SmmBase,
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync kCpumMsrWrFn_AmdK8SmmAddr,
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync kCpumMsrWrFn_AmdK8SmmMask,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8VmCr,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8IgnNe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8SmmCtl,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK8VmHSavePa,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hVmLockKey,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hSmmLockKey,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hLocalSmiStatus,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdFam10hOsVisWrkIdLength,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdFam10hOsVisWrkStatus,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdFam16hL2IPerfCtlN,
07150389a9b621b6ca075140dc22e3acc067ad96vboxsync kCpumMsrWrFn_AmdFam16hL2IPerfCtrN,
c3ad07071523338d76960d8da7678860aea8b03dvboxsync kCpumMsrWrFn_AmdFam15hNorthbridgePerfCtlN,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdFam15hNorthbridgePerfCtrN,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK7MicrocodeCtl,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK7ClusterIdMaybe,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK8CpuIdCtlStd07hEbax,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK8CpuIdCtlStd06hEcx,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK8CpuIdCtlStd01hEdcx,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK8CpuIdCtlExt01hEdcx,
47e2ddf908aebbc4adbc758d46a6266a4c9c5051vboxsync kCpumMsrWrFn_AmdK8PatchLoader,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7DebugStatusMaybe,
6cac05f856d982151579a9d445a109960c2c07d2vboxsync kCpumMsrWrFn_AmdK7BHTraceBaseMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7BHTracePtrMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7BHTraceLimitMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7HardwareDebugToolCfgMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7FastFlushCountMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7NodeId,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7DrXAddrMaskN, /**< Takes register index. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7Dr0DataMatchMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7Dr0DataMaskMaybe,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7LoadStoreCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7InstrCacheCfg,
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7DataCacheCfg,
kCpumMsrWrFn_AmdK7BusUnitCfg,
kCpumMsrWrFn_AmdK7DebugCtl2Maybe,
kCpumMsrWrFn_AmdFam15hFpuCfg,
kCpumMsrWrFn_AmdFam15hDecoderCfg,
kCpumMsrWrFn_AmdFam10hBusUnitCfg2,
kCpumMsrWrFn_AmdFam15hCombUnitCfg,
kCpumMsrWrFn_AmdFam15hCombUnitCfg2,
kCpumMsrWrFn_AmdFam15hCombUnitCfg3,
kCpumMsrWrFn_AmdFam15hExecUnitCfg,
kCpumMsrWrFn_AmdFam15hLoadStoreCfg2,
kCpumMsrWrFn_AmdFam10hIbsFetchCtl,
kCpumMsrWrFn_AmdFam10hIbsFetchLinAddr,
kCpumMsrWrFn_AmdFam10hIbsFetchPhysAddr,
kCpumMsrWrFn_AmdFam10hIbsOpExecCtl,
kCpumMsrWrFn_AmdFam10hIbsOpRip,
kCpumMsrWrFn_AmdFam10hIbsOpData,
kCpumMsrWrFn_AmdFam10hIbsOpData2,
kCpumMsrWrFn_AmdFam10hIbsOpData3,
kCpumMsrWrFn_AmdFam10hIbsDcLinAddr,
kCpumMsrWrFn_AmdFam10hIbsDcPhysAddr,
kCpumMsrWrFn_AmdFam10hIbsCtl,
kCpumMsrWrFn_AmdFam14hIbsBrTarget,
kCpumMsrWrFn_Gim,
/** End of valid MSR write function indexes. */
kCpumMsrWrFn_End
} CPUMMSRWRFN;
/**
* MSR range.
*/
typedef struct CPUMMSRRANGE
{
/** The first MSR. [0] */
uint32_t uFirst;
/** The last MSR. [4] */
uint32_t uLast;
/** The read function (CPUMMSRRDFN). [8] */
uint16_t enmRdFn;
/** The write function (CPUMMSRWRFN). [10] */
uint16_t enmWrFn;
/** The offset of the 64-bit MSR value relative to the start of CPUMCPU.
* UINT16_MAX if not used by the read and write functions. [12] */
uint16_t offCpumCpu;
/** Reserved for future hacks. [14] */
uint16_t fReserved;
/** The init/read value. [16]
* When enmRdFn is kCpumMsrRdFn_INIT_VALUE, this is the value returned on RDMSR.
* offCpumCpu must be UINT16_MAX in that case, otherwise it must be a valid
* offset into CPUM. */
uint64_t uValue;
/** The bits to ignore when writing. [24] */
uint64_t fWrIgnMask;
/** The bits that will cause a GP(0) when writing. [32]
* This is always checked prior to calling the write function. Using
* UINT64_MAX effectively marks the MSR as read-only. */
uint64_t fWrGpMask;
/** The register name, if applicable. [40] */
char szName[56];
#ifdef VBOX_WITH_STATISTICS
/** The number of reads. */
STAMCOUNTER cReads;
/** The number of writes. */
STAMCOUNTER cWrites;
/** The number of times ignored bits were written. */
STAMCOUNTER cIgnoredBits;
/** The number of GPs generated. */
STAMCOUNTER cGps;
#endif
} CPUMMSRRANGE;
#ifdef VBOX_WITH_STATISTICS
AssertCompileSize(CPUMMSRRANGE, 128);
#else
AssertCompileSize(CPUMMSRRANGE, 96);
#endif
/** Pointer to an MSR range. */
typedef CPUMMSRRANGE *PCPUMMSRRANGE;
/** Pointer to a const MSR range. */
typedef CPUMMSRRANGE const *PCCPUMMSRRANGE;
/** @name Guest Register Getters.
* @{ */
VMMDECL(void) CPUMGetGuestGDTR(PVMCPU pVCpu, PVBOXGDTR pGDTR);
VMMDECL(RTGCPTR) CPUMGetGuestIDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
VMMDECL(RTSEL) CPUMGetGuestTR(PVMCPU pVCpu, PCPUMSELREGHID pHidden);
VMMDECL(RTSEL) CPUMGetGuestLDTR(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestLdtrEx(PVMCPU pVCpu, uint64_t *pGCPtrBase, uint32_t *pcbLimit);
VMMDECL(uint64_t) CPUMGetGuestCR0(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestCR2(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestCR3(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestCR4(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestCR8(PVMCPU pVCpu);
VMMDECL(int) CPUMGetGuestCRx(PVMCPU pVCpu, unsigned iReg, uint64_t *pValue);
VMMDECL(uint32_t) CPUMGetGuestEFlags(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestEIP(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestRIP(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestEAX(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestEBX(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestECX(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestEDX(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestESI(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestEDI(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestESP(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestEBP(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestCS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestDS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestES(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestFS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestGS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetGuestSS(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestDR0(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestDR1(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestDR2(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestDR3(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestDR6(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestDR7(PVMCPU pVCpu);
VMMDECL(int) CPUMGetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t *pValue);
VMMDECL(void) CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
VMMDECL(uint32_t) CPUMGetGuestCpuIdStdMax(PVM pVM);
VMMDECL(uint32_t) CPUMGetGuestCpuIdExtMax(PVM pVM);
VMMDECL(uint32_t) CPUMGetGuestCpuIdCentaurMax(PVM pVM);
VMMDECL(uint64_t) CPUMGetGuestEFER(PVMCPU pVCpu);
VMMDECL(VBOXSTRICTRC) CPUMQueryGuestMsr(PVMCPU pVCpu, uint32_t idMsr, uint64_t *puValue);
VMMDECL(VBOXSTRICTRC) CPUMSetGuestMsr(PVMCPU pVCpu, uint32_t idMsr, uint64_t uValue);
VMMDECL(CPUMCPUVENDOR) CPUMGetGuestCpuVendor(PVM pVM);
VMMDECL(CPUMCPUVENDOR) CPUMGetHostCpuVendor(PVM pVM);
/** @} */
/** @name Guest Register Setters.
* @{ */
VMMDECL(int) CPUMSetGuestGDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit);
VMMDECL(int) CPUMSetGuestIDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit);
VMMDECL(int) CPUMSetGuestTR(PVMCPU pVCpu, uint16_t tr);
VMMDECL(int) CPUMSetGuestLDTR(PVMCPU pVCpu, uint16_t ldtr);
VMMDECL(int) CPUMSetGuestCR0(PVMCPU pVCpu, uint64_t cr0);
VMMDECL(int) CPUMSetGuestCR2(PVMCPU pVCpu, uint64_t cr2);
VMMDECL(int) CPUMSetGuestCR3(PVMCPU pVCpu, uint64_t cr3);
VMMDECL(int) CPUMSetGuestCR4(PVMCPU pVCpu, uint64_t cr4);
VMMDECL(int) CPUMSetGuestDR0(PVMCPU pVCpu, uint64_t uDr0);
VMMDECL(int) CPUMSetGuestDR1(PVMCPU pVCpu, uint64_t uDr1);
VMMDECL(int) CPUMSetGuestDR2(PVMCPU pVCpu, uint64_t uDr2);
VMMDECL(int) CPUMSetGuestDR3(PVMCPU pVCpu, uint64_t uDr3);
VMMDECL(int) CPUMSetGuestDR6(PVMCPU pVCpu, uint64_t uDr6);
VMMDECL(int) CPUMSetGuestDR7(PVMCPU pVCpu, uint64_t uDr7);
VMMDECL(int) CPUMSetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t Value);
VMMDECL(int) CPUMSetGuestEFlags(PVMCPU pVCpu, uint32_t eflags);
VMMDECL(int) CPUMSetGuestEIP(PVMCPU pVCpu, uint32_t eip);
VMMDECL(int) CPUMSetGuestEAX(PVMCPU pVCpu, uint32_t eax);
VMMDECL(int) CPUMSetGuestEBX(PVMCPU pVCpu, uint32_t ebx);
VMMDECL(int) CPUMSetGuestECX(PVMCPU pVCpu, uint32_t ecx);
VMMDECL(int) CPUMSetGuestEDX(PVMCPU pVCpu, uint32_t edx);
VMMDECL(int) CPUMSetGuestESI(PVMCPU pVCpu, uint32_t esi);
VMMDECL(int) CPUMSetGuestEDI(PVMCPU pVCpu, uint32_t edi);
VMMDECL(int) CPUMSetGuestESP(PVMCPU pVCpu, uint32_t esp);
VMMDECL(int) CPUMSetGuestEBP(PVMCPU pVCpu, uint32_t ebp);
VMMDECL(int) CPUMSetGuestCS(PVMCPU pVCpu, uint16_t cs);
VMMDECL(int) CPUMSetGuestDS(PVMCPU pVCpu, uint16_t ds);
VMMDECL(int) CPUMSetGuestES(PVMCPU pVCpu, uint16_t es);
VMMDECL(int) CPUMSetGuestFS(PVMCPU pVCpu, uint16_t fs);
VMMDECL(int) CPUMSetGuestGS(PVMCPU pVCpu, uint16_t gs);
VMMDECL(int) CPUMSetGuestSS(PVMCPU pVCpu, uint16_t ss);
VMMDECL(void) CPUMSetGuestEFER(PVMCPU pVCpu, uint64_t val);
VMMDECL(void) CPUMSetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature);
VMMDECL(void) CPUMClearGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature);
VMMDECL(bool) CPUMGetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature);
VMMDECL(void) CPUMSetGuestCtx(PVMCPU pVCpu, const PCPUMCTX pCtx);
VMM_INT_DECL(void) CPUMGuestLazyLoadHiddenCsAndSs(PVMCPU pVCpu);
VMM_INT_DECL(void) CPUMGuestLazyLoadHiddenSelectorReg(PVMCPU pVCpu, PCPUMSELREG pSReg);
VMMR0_INT_DECL(void) CPUMR0SetGuestTscAux(PVMCPU pVCpu, uint64_t uValue);
VMMR0_INT_DECL(uint64_t) CPUMR0GetGuestTscAux(PVMCPU pVCpu);
/** @} */
/** @name Misc Guest Predicate Functions.
* @{ */
VMMDECL(bool) CPUMIsGuestIn16BitCode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestIn32BitCode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestIn64BitCode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestNXEnabled(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestPageSizeExtEnabled(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestPagingEnabled(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestR0WriteProtEnabled(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestInRealMode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestInRealOrV86Mode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestInProtectedMode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestInPagedProtectedMode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestInLongMode(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestInPAEMode(PVMCPU pVCpu);
VMM_INT_DECL(bool) CPUMIsGuestInRawMode(PVMCPU pVCpu);
#ifndef VBOX_WITHOUT_UNNAMED_UNIONS
/**
* Tests if the guest is running in real mode or not.
*
* @returns true if in real mode, otherwise false.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestInRealModeEx(PCPUMCTX pCtx)
{
return !(pCtx->cr0 & X86_CR0_PE);
}
/**
* Tests if the guest is running in real or virtual 8086 mode.
*
* @returns @c true if it is, @c false if not.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestInRealOrV86ModeEx(PCPUMCTX pCtx)
{
return !(pCtx->cr0 & X86_CR0_PE)
|| pCtx->eflags.Bits.u1VM; /* Cannot be set in long mode. Intel spec 2.3.1 "System Flags and Fields in IA-32e Mode". */
}
/**
* Tests if the guest is running in virtual 8086 mode.
*
* @returns @c true if it is, @c false if not.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestInV86ModeEx(PCPUMCTX pCtx)
{
return (pCtx->eflags.Bits.u1VM == 1);
}
/**
* Tests if the guest is running in paged protected or not.
*
* @returns true if in paged protected mode, otherwise false.
* @param pVM The VM handle.
*/
DECLINLINE(bool) CPUMIsGuestInPagedProtectedModeEx(PCPUMCTX pCtx)
{
return (pCtx->cr0 & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG);
}
/**
* Tests if the guest is running in long mode or not.
*
* @returns true if in long mode, otherwise false.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestInLongModeEx(PCPUMCTX pCtx)
{
return (pCtx->msrEFER & MSR_K6_EFER_LMA) == MSR_K6_EFER_LMA;
}
VMM_INT_DECL(bool) CPUMIsGuestIn64BitCodeSlow(PCPUMCTX pCtx);
/**
* Tests if the guest is running in 64 bits mode or not.
*
* @returns true if in 64 bits protected mode, otherwise false.
* @param pVCpu The current virtual CPU.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestIn64BitCodeEx(PCPUMCTX pCtx)
{
if (!(pCtx->msrEFER & MSR_K6_EFER_LMA))
return false;
if (!CPUMSELREG_ARE_HIDDEN_PARTS_VALID(NULL, &pCtx->cs))
return CPUMIsGuestIn64BitCodeSlow(pCtx);
return pCtx->cs.Attr.n.u1Long;
}
/**
* Tests if the guest has paging enabled or not.
*
* @returns true if paging is enabled, otherwise false.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestPagingEnabledEx(PCPUMCTX pCtx)
{
return !!(pCtx->cr0 & X86_CR0_PG);
}
/**
* Tests if the guest is running in PAE mode or not.
*
* @returns true if in PAE mode, otherwise false.
* @param pCtx Current CPU context
*/
DECLINLINE(bool) CPUMIsGuestInPAEModeEx(PCPUMCTX pCtx)
{
/* Intel mentions EFER.LMA and EFER.LME in different parts of their spec. We shall use EFER.LMA rather
than EFER.LME as it reflects if the CPU has entered paging with EFER.LME set. */
return ( (pCtx->cr4 & X86_CR4_PAE)
&& CPUMIsGuestPagingEnabledEx(pCtx)
&& !(pCtx->msrEFER & MSR_K6_EFER_LMA));
}
#endif /* VBOX_WITHOUT_UNNAMED_UNIONS */
/** @} */
/** @name Hypervisor Register Getters.
* @{ */
VMMDECL(RTSEL) CPUMGetHyperCS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetHyperDS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetHyperES(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetHyperFS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetHyperGS(PVMCPU pVCpu);
VMMDECL(RTSEL) CPUMGetHyperSS(PVMCPU pVCpu);
#if 0 /* these are not correct. */
VMMDECL(uint32_t) CPUMGetHyperCR0(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperCR2(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperCR3(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperCR4(PVMCPU pVCpu);
#endif
/** This register is only saved on fatal traps. */
VMMDECL(uint32_t) CPUMGetHyperEAX(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperEBX(PVMCPU pVCpu);
/** This register is only saved on fatal traps. */
VMMDECL(uint32_t) CPUMGetHyperECX(PVMCPU pVCpu);
/** This register is only saved on fatal traps. */
VMMDECL(uint32_t) CPUMGetHyperEDX(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperESI(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperEDI(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperEBP(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperESP(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperEFlags(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperEIP(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetHyperRIP(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetHyperIDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
VMMDECL(uint32_t) CPUMGetHyperGDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
VMMDECL(RTSEL) CPUMGetHyperLDTR(PVMCPU pVCpu);
VMMDECL(RTGCUINTREG) CPUMGetHyperDR0(PVMCPU pVCpu);
VMMDECL(RTGCUINTREG) CPUMGetHyperDR1(PVMCPU pVCpu);
VMMDECL(RTGCUINTREG) CPUMGetHyperDR2(PVMCPU pVCpu);
VMMDECL(RTGCUINTREG) CPUMGetHyperDR3(PVMCPU pVCpu);
VMMDECL(RTGCUINTREG) CPUMGetHyperDR6(PVMCPU pVCpu);
VMMDECL(RTGCUINTREG) CPUMGetHyperDR7(PVMCPU pVCpu);
VMMDECL(void) CPUMGetHyperCtx(PVMCPU pVCpu, PCPUMCTX pCtx);
VMMDECL(uint32_t) CPUMGetHyperCR3(PVMCPU pVCpu);
/** @} */
/** @name Hypervisor Register Setters.
* @{ */
VMMDECL(void) CPUMSetHyperGDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
VMMDECL(void) CPUMSetHyperLDTR(PVMCPU pVCpu, RTSEL SelLDTR);
VMMDECL(void) CPUMSetHyperIDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
VMMDECL(void) CPUMSetHyperCR3(PVMCPU pVCpu, uint32_t cr3);
VMMDECL(void) CPUMSetHyperTR(PVMCPU pVCpu, RTSEL SelTR);
VMMDECL(void) CPUMSetHyperCS(PVMCPU pVCpu, RTSEL SelCS);
VMMDECL(void) CPUMSetHyperDS(PVMCPU pVCpu, RTSEL SelDS);
VMMDECL(void) CPUMSetHyperES(PVMCPU pVCpu, RTSEL SelDS);
VMMDECL(void) CPUMSetHyperFS(PVMCPU pVCpu, RTSEL SelDS);
VMMDECL(void) CPUMSetHyperGS(PVMCPU pVCpu, RTSEL SelDS);
VMMDECL(void) CPUMSetHyperSS(PVMCPU pVCpu, RTSEL SelSS);
VMMDECL(void) CPUMSetHyperESP(PVMCPU pVCpu, uint32_t u32ESP);
VMMDECL(int) CPUMSetHyperEFlags(PVMCPU pVCpu, uint32_t Efl);
VMMDECL(void) CPUMSetHyperEIP(PVMCPU pVCpu, uint32_t u32EIP);
VMM_INT_DECL(void) CPUMSetHyperState(PVMCPU pVCpu, uint32_t u32EIP, uint32_t u32ESP, uint32_t u32EAX, uint32_t u32EDX);
VMMDECL(void) CPUMSetHyperDR0(PVMCPU pVCpu, RTGCUINTREG uDr0);
VMMDECL(void) CPUMSetHyperDR1(PVMCPU pVCpu, RTGCUINTREG uDr1);
VMMDECL(void) CPUMSetHyperDR2(PVMCPU pVCpu, RTGCUINTREG uDr2);
VMMDECL(void) CPUMSetHyperDR3(PVMCPU pVCpu, RTGCUINTREG uDr3);
VMMDECL(void) CPUMSetHyperDR6(PVMCPU pVCpu, RTGCUINTREG uDr6);
VMMDECL(void) CPUMSetHyperDR7(PVMCPU pVCpu, RTGCUINTREG uDr7);
VMMDECL(void) CPUMSetHyperCtx(PVMCPU pVCpu, const PCPUMCTX pCtx);
VMMDECL(int) CPUMRecalcHyperDRx(PVMCPU pVCpu, uint8_t iGstReg, bool fForceHyper);
/** @} */
VMMDECL(void) CPUMPushHyper(PVMCPU pVCpu, uint32_t u32);
VMMDECL(int) CPUMQueryHyperCtxPtr(PVMCPU pVCpu, PCPUMCTX *ppCtx);
VMMDECL(PCPUMCTX) CPUMGetHyperCtxPtr(PVMCPU pVCpu);
VMMDECL(PCCPUMCTXCORE) CPUMGetHyperCtxCore(PVMCPU pVCpu);
VMMDECL(PCPUMCTX) CPUMQueryGuestCtxPtr(PVMCPU pVCpu);
VMMDECL(PCCPUMCTXCORE) CPUMGetGuestCtxCore(PVMCPU pVCpu);
VMM_INT_DECL(int) CPUMRawEnter(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
VMM_INT_DECL(int) CPUMRawLeave(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, int rc);
VMMDECL(uint32_t) CPUMRawGetEFlags(PVMCPU pVCpu);
VMMDECL(void) CPUMRawSetEFlags(PVMCPU pVCpu, uint32_t fEfl);
/** @name Changed flags.
* These flags are used to keep track of which important register that
* have been changed since last they were reset. The only one allowed
* to clear them is REM!
* @{
*/
#define CPUM_CHANGED_FPU_REM RT_BIT(0)
#define CPUM_CHANGED_CR0 RT_BIT(1)
#define CPUM_CHANGED_CR4 RT_BIT(2)
#define CPUM_CHANGED_GLOBAL_TLB_FLUSH RT_BIT(3)
#define CPUM_CHANGED_CR3 RT_BIT(4)
#define CPUM_CHANGED_GDTR RT_BIT(5)
#define CPUM_CHANGED_IDTR RT_BIT(6)
#define CPUM_CHANGED_LDTR RT_BIT(7)
#define CPUM_CHANGED_TR RT_BIT(8) /**@< Currently unused. */
#define CPUM_CHANGED_SYSENTER_MSR RT_BIT(9)
#define CPUM_CHANGED_HIDDEN_SEL_REGS RT_BIT(10) /**@< Currently unused. */
#define CPUM_CHANGED_CPUID RT_BIT(11)
#define CPUM_CHANGED_ALL ( CPUM_CHANGED_FPU_REM \
| CPUM_CHANGED_CR0 \
| CPUM_CHANGED_CR4 \
| CPUM_CHANGED_GLOBAL_TLB_FLUSH \
| CPUM_CHANGED_CR3 \
| CPUM_CHANGED_GDTR \
| CPUM_CHANGED_IDTR \
| CPUM_CHANGED_LDTR \
| CPUM_CHANGED_TR \
| CPUM_CHANGED_SYSENTER_MSR \
| CPUM_CHANGED_HIDDEN_SEL_REGS \
| CPUM_CHANGED_CPUID )
/** @} */
VMMDECL(void) CPUMSetChangedFlags(PVMCPU pVCpu, uint32_t fChangedFlags);
VMMR3DECL(uint32_t) CPUMR3RemEnter(PVMCPU pVCpu, uint32_t *puCpl);
VMMR3DECL(void) CPUMR3RemLeave(PVMCPU pVCpu, bool fNoOutOfSyncSels);
VMMDECL(bool) CPUMSupportsFXSR(PVM pVM);
VMMDECL(bool) CPUMIsHostUsingSysEnter(PVM pVM);
VMMDECL(bool) CPUMIsHostUsingSysCall(PVM pVM);
VMMDECL(bool) CPUMIsGuestFPUStateActive(PVMCPU pVCpu);
VMMDECL(void) CPUMDeactivateGuestFPUState(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestDebugStateActive(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsGuestDebugStateActivePending(PVMCPU pVCpu);
VMMDECL(void) CPUMDeactivateGuestDebugState(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsHyperDebugStateActive(PVMCPU pVCpu);
VMMDECL(bool) CPUMIsHyperDebugStateActivePending(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestCPL(PVMCPU pVCpu);
VMMDECL(CPUMMODE) CPUMGetGuestMode(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMGetGuestCodeBits(PVMCPU pVCpu);
VMMDECL(DISCPUMODE) CPUMGetGuestDisMode(PVMCPU pVCpu);
VMMDECL(uint64_t) CPUMGetGuestScalableBusFrequency(PVM pVM);
/** @name Typical scalable bus frequency values.
* @{ */
/** Special internal value indicating that we don't know the frequency.
* @internal */
#define CPUM_SBUSFREQ_UNKNOWN UINT64_C(1)
#define CPUM_SBUSFREQ_100MHZ UINT64_C(100000000)
#define CPUM_SBUSFREQ_133MHZ UINT64_C(133333333)
#define CPUM_SBUSFREQ_167MHZ UINT64_C(166666666)
#define CPUM_SBUSFREQ_200MHZ UINT64_C(200000000)
#define CPUM_SBUSFREQ_267MHZ UINT64_C(266666666)
#define CPUM_SBUSFREQ_333MHZ UINT64_C(333333333)
#define CPUM_SBUSFREQ_400MHZ UINT64_C(400000000)
/** @} */
#ifdef IN_RING3
/** @defgroup grp_cpum_r3 The CPUM ring-3 API
* @{
*/
VMMR3DECL(int) CPUMR3Init(PVM pVM);
VMMR3DECL(int) CPUMR3InitCompleted(PVM pVM);
VMMR3DECL(void) CPUMR3LogCpuIds(PVM pVM);
VMMR3DECL(void) CPUMR3Relocate(PVM pVM);
VMMR3DECL(int) CPUMR3Term(PVM pVM);
VMMR3DECL(void) CPUMR3Reset(PVM pVM);
VMMR3DECL(void) CPUMR3ResetCpu(PVM pVM, PVMCPU pVCpu);
VMMDECL(bool) CPUMR3IsStateRestorePending(PVM pVM);
VMMR3DECL(void) CPUMR3SetHWVirtEx(PVM pVM, bool fHWVirtExEnabled);
VMMR3DECL(int) CPUMR3SetCR4Feature(PVM pVM, RTHCUINTREG fOr, RTHCUINTREG fAnd);
VMMR3DECL(RCPTRTYPE(PCCPUMCPUID)) CPUMR3GetGuestCpuIdStdRCPtr(PVM pVM);
VMMR3DECL(RCPTRTYPE(PCCPUMCPUID)) CPUMR3GetGuestCpuIdExtRCPtr(PVM pVM);
VMMR3DECL(RCPTRTYPE(PCCPUMCPUID)) CPUMR3GetGuestCpuIdCentaurRCPtr(PVM pVM);
VMMR3DECL(RCPTRTYPE(PCCPUMCPUID)) CPUMR3GetGuestCpuIdDefRCPtr(PVM pVM);
VMMR3DECL(int) CPUMR3CpuIdInsert(PVM pVM, PCPUMCPUIDLEAF pNewLeaf);
VMMR3DECL(int) CPUMR3CpuIdGetLeaf(PVM pVM, PCPUMCPUIDLEAF pLeaf, uint32_t uLeaf, uint32_t uSubLeaf);
VMMR3DECL(CPUMMICROARCH) CPUMR3CpuIdDetermineMicroarchEx(CPUMCPUVENDOR enmVendor, uint8_t bFamily,
uint8_t bModel, uint8_t bStepping);
VMMR3DECL(const char *) CPUMR3MicroarchName(CPUMMICROARCH enmMicroarch);
VMMR3DECL(int) CPUMR3CpuIdCollectLeaves(PCPUMCPUIDLEAF *ppaLeaves, uint32_t *pcLeaves);
VMMR3DECL(int) CPUMR3CpuIdDetectUnknownLeafMethod(PCPUMUKNOWNCPUID penmUnknownMethod, PCPUMCPUID pDefUnknown);
VMMR3DECL(const char *) CPUMR3CpuIdUnknownLeafMethodName(CPUMUKNOWNCPUID enmUnknownMethod);
VMMR3DECL(CPUMCPUVENDOR) CPUMR3CpuIdDetectVendorEx(uint32_t uEAX, uint32_t uEBX, uint32_t uECX, uint32_t uEDX);
VMMR3DECL(const char *) CPUMR3CpuVendorName(CPUMCPUVENDOR enmVendor);
VMMR3DECL(int) CPUMR3MsrRangesInsert(PVM pVM, PCCPUMMSRRANGE pNewRange);
/** @} */
#endif /* IN_RING3 */
#ifdef IN_RC
/** @defgroup grp_cpum_rc The CPUM Raw-mode Context API
* @{
*/
/**
* Calls a guest trap/interrupt handler directly
*
* Assumes a trap stack frame has already been setup on the guest's stack!
* This function does not return!
*
* @param pRegFrame Original trap/interrupt context
* @param selCS Code selector of handler
* @param pHandler GC virtual address of handler
* @param eflags Callee's EFLAGS
* @param selSS Stack selector for handler
* @param pEsp Stack address for handler
*/
DECLASM(void) CPUMGCCallGuestTrapHandler(PCPUMCTXCORE pRegFrame, uint32_t selCS, RTRCPTR pHandler,
uint32_t eflags, uint32_t selSS, RTRCPTR pEsp);
/**
* Call guest V86 code directly.
*
* This function does not return!
*
* @param pRegFrame Original trap/interrupt context
*/
DECLASM(void) CPUMGCCallV86Code(PCPUMCTXCORE pRegFrame);
VMMDECL(int) CPUMHandleLazyFPU(PVMCPU pVCpu);
VMMDECL(uint32_t) CPUMRCGetGuestCPL(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
#ifdef VBOX_WITH_RAW_RING1
VMMDECL(void) CPUMRCRecheckRawState(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
#endif
/** @} */
#endif /* IN_RC */
#ifdef IN_RING0
/** @defgroup grp_cpum_r0 The CPUM ring-0 API
* @{
*/
VMMR0_INT_DECL(int) CPUMR0ModuleInit(void);
VMMR0_INT_DECL(int) CPUMR0ModuleTerm(void);
VMMR0_INT_DECL(int) CPUMR0InitVM(PVM pVM);
VMMR0_INT_DECL(int) CPUMR0Trap07Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
VMMR0_INT_DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
VMMR0_INT_DECL(int) CPUMR0SaveHostDebugState(PVM pVM, PVMCPU pVCpu);
VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuestAndRestoreHost(PVMCPU pVCpu, bool fDr6);
VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuest(PVMCPU pVCpu, bool fDr6);
VMMR0_INT_DECL(void) CPUMR0LoadGuestDebugState(PVMCPU pVCpu, bool fDr6);
VMMR0_INT_DECL(void) CPUMR0LoadHyperDebugState(PVMCPU pVCpu, bool fDr6);
#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
VMMR0_INT_DECL(void) CPUMR0SetLApic(PVMCPU pVCpu, RTCPUID idHostCpu);
#endif
/** @} */
#endif /* IN_RING0 */
/** @} */
RT_C_DECLS_END
#endif