cpum.h revision c1d279fc0865b91a40b30eda02ed14f6533fe1a4
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUM - CPU Monitor(/ Manager).
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Copyright (C) 2006-2015 Oracle Corporation
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * available from http://www.virtualbox.org. This file is free software;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * you can redistribute it and/or modify it under the terms of the GNU
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * General Public License (GPL) as published by the Free Software
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * The contents of this file may alternatively be used under the terms
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * of the Common Development and Distribution License Version 1.0
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * VirtualBox OSE distribution, in which case the provisions of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CDDL are applicable instead of those of the GPL.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * You may elect to license modified versions of this file under the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * terms and conditions of either the GPL or the CDDL or both.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @defgroup grp_cpum The CPU Monitor / Manager API
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUID feature to set or clear.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The APIC feature bit. (Std+Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The sysenter/sysexit feature bit. (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The SYSCALL/SYSEXIT feature bit (64 bits mode only for Intel CPUs). (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The PAE feature bit. (Std+Ext) */
24986763e9e9e6633a4a54479be945d577fdfd34vboxsync /** The NX feature bit. (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The LAHF/SAHF feature bit (64 bits mode only). (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The LONG MODE feature bit. (Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The PAT feature bit. (Std+Ext) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The x2APIC feature bit. (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The RDTSCP feature bit. (Ext) */
99fc25fde31ac60ee18ac48eab7027dea4272a0bvboxsync /** The Hypervisor Present bit. (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The MWait Extensions bits (Std) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** 32bit hackishness. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPU Vendor.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** 32bit hackishness. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * X86 and AMD64 CPU microarchitectures and in processor generations.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @remarks The separation here is sometimes a little bit too finely grained,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * and the differences is more like processor generation than micro
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * arch. This can be useful, so we'll provide functions for getting at
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * more coarse grained info.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_8086 = kCpumMicroarch_Intel_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_P6 = kCpumMicroarch_Intel_P6_Core_Atom_First,
dbca5bd5e2f9d025c280c2f040518de4e93ff58dvboxsync kCpumMicroarch_Intel_Core_Yonah, /**< Core, also known as Enhanced Pentium M. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core2_Merom = kCpumMicroarch_Intel_Core2_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Core7_Nehalem = kCpumMicroarch_Intel_Core7_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Bonnell = kCpumMicroarch_Intel_Atom_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Lincroft, /**< Second generation bonnell (44nm). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_Atom_Saltwell, /**< 32nm shrink of Bonnell. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Willamette = kCpumMicroarch_Intel_NB_First, /**< 180nm */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Intel_NB_Gallatin, /**< 90nm Xeon, Pentium 4 Extreme Edition ("Emergency Edition"). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Am286 = kCpumMicroarch_AMD_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_Am486Enh, /**< Covers Am5x86 as well. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K7_Palomino = kCpumMicroarch_AMD_K7_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_130nm = kCpumMicroarch_AMD_K8_First, /**< 130nm Clawhammer, Sledgehammer, Newcastle, Paris, Odessa, Dublin */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_90nm_DualCore, /**< 90nm with two cores. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_K8_90nm_AMDV, /**< 90nm with AMD-V (usually) and two cores (usually). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Bulldozer = kCpumMicroarch_AMD_15h_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Steamroller, /**< Yet to be released, might have different family. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_AMD_15h_Excavator, /**< Yet to be released, might have different family. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Centaur_C6 = kCpumMicroarch_VIA_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5A, /**< 180nm Samuel - Cyrix III, C3, 1GigaPro. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5B, /**< 150nm Samuel 2 - Cyrix III, C3, 1GigaPro, Eden ESP, XP 2000+. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5C, /**< 130nm Ezra - C3, Eden ESP. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5N, /**< 130nm Ezra-T - C3. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5XL, /**< 130nm Nehemiah - C3, Eden ESP, Eden-N. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C3_C5P, /**< 130nm Nehemiah+ - C3. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_VIA_C7_C5J, /**< 90nm Esther - C7, C7-D, C7-M, Eden, Eden ULV. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync kCpumMicroarch_Cyrix_5x86 = kCpumMicroarch_Cyrix_First,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching netburst CPUs. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_INTEL_NETBURST(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_Intel_NB_First && (a_enmMicroarch) <= kCpumMicroarch_Intel_NB_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching Core7 CPUs. */
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#define CPUMMICROARCH_IS_INTEL_CORE7(a_enmMicroarch) \
83d61602c6968041692aa7203ee51c4085c7e460vboxsync ((a_enmMicroarch) >= kCpumMicroarch_Intel_Core7_First && (a_enmMicroarch) <= kCpumMicroarch_Intel_Core7_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family OFh CPUs (aka K8). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_0FH(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_AMD_K8_First && (a_enmMicroarch) <= kCpumMicroarch_AMD_K8_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 10H CPUs (aka K10). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_10H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_K10)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 11H CPUs (aka Lion). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_11H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_K10_Lion)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 12H CPUs (aka Llano). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_12H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_K10_Llano)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 14H CPUs (aka Bobcat). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_14H(a_enmMicroarch) ((a_enmMicroarch) == kCpumMicroarch_AMD_Bobcat)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 15H CPUs (bulldozer and it's
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * decendants). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_15H(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_AMD_15h_First && (a_enmMicroarch) <= kCpumMicroarch_AMD_15h_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Predicate macro for catching AMD Family 16H CPUs. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMMICROARCH_IS_AMD_FAM_16H(a_enmMicroarch) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ((a_enmMicroarch) >= kCpumMicroarch_AMD_16h_First && (a_enmMicroarch) <= kCpumMicroarch_AMD_16h_End)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * CPUID leaf.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The leaf number. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The sub-leaf number. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Sub-leaf mask. This is 0 when sub-leaves aren't used. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The EAX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The EBX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The ECX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The EDX value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flags. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Pointer to a CPUID leaf. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Pointer to a const CPUID leaf. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @name CPUMCPUIDLEAF::fFlags
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Indicates that ECX (the sub-leaf indicator) doesn't change when
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * requesting the final leaf and all undefined leaves that follows it.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Observed for 0x0000000b on Intel. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CPUMCPUIDLEAF_F_SUBLEAVES_ECX_UNCHANGED RT_BIT_32(0)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Method used to deal with unknown CPUID leafs.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Invalid zero value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Use given default values (DefCpuId). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Return the last standard leaf.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Intel Sandy Bridge has been observed doing this. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Return the last standard leaf, with ecx observed.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Intel Sandy Bridge has been observed doing this. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The register values are passed thru unmodified. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** End of valid value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Ensure 32-bit type. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Pointer to unknown CPUID leaf method. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * MSR read functions.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Invalid zero value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Return the CPUMMSRRANGE::uValue. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Alias to the MSR range starting at the MSR given by
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUMMSRRANGE::uValue. Must be used in pair with
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * kCpumMsrWrFn_MsrAlias. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Write only register, GP all read attempts. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PlatformId, /**< Takes real CPU value for reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32BiosSignId, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrCap, /**< Takes real CPU value for reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrPhysBaseN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrPhysMaskN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MtrrFixed, /**< Takes CPUMCPU offset. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfEvtSelN, /**< Range value indicates the register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfStatus, /**< Range value returned. */
eb30b3bfcb8b0e55f5498ba7a84e55a536debcd7vboxsync kCpumMsrRdFn_Ia32PerfCtl, /**< Range value returned. */
eb30b3bfcb8b0e55f5498ba7a84e55a536debcd7vboxsync kCpumMsrRdFn_Ia32FixedCtrN, /**< Takes register number of start of range. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfCapabilities, /**< Takes reference value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32PerfGlobalStatus, /**< Takes reference value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ClockModulation, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ThermInterrupt, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32ThermStatus, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32Therm2Ctl, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32MiscEnable, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McCtlStatusAddrMiscN, /**< Takes bank number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32McNCtl2, /**< Takes register number of start of range. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxBase, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxPinbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxProcbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxExitCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxEntryCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxMisc, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr0Fixed0, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr0Fixed1, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr4Fixed0, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxCr4Fixed1, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxVmcsEnum, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxProcBasedCtls2, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxEptVpidCap, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTruePinbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTrueProcbasedCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTrueExitCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_Ia32VmxTrueEntryCtls, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelP6FsbFrequency, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelFlexRatio, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7TemperatureTarget, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7MsrOffCoreResponseN,/**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7TurboRatioLimit, /**< Returns range value. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7VirtualLegacyWireCap,/**< Returns range value. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7PkgCnResidencyN, /**< Takes C-state number. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7CoreCnResidencyN, /**< Takes C-state number. */
56fa1b550cbdeec7ef620d566155a388c04ca796vboxsync kCpumMsrRdFn_IntelI7SandyVrCurrentConfig,/**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyVrMiscConfig, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyRaplPowerUnit, /**< Takes real value as reference. */
acf97addaaed7b946d412cfcff46547ba7cb33bfvboxsync kCpumMsrRdFn_IntelI7SandyPkgCnIrtlN, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7SandyPkgC2Residency, /**< Takes real value as reference. */
e69378448f919940b0b999796d40a23df2a7aa39vboxsync kCpumMsrRdFn_IntelI7RaplPkgPowerLimit, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPkgEnergyStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPkgPerfStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPkgPowerInfo, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramPowerLimit, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramEnergyStatus,/**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramPerfStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplDramPowerInfo, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0PowerLimit, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0EnergyStatus, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0Policy, /**< Takes real value as reference. */
b40ca073ac6b445a7a49aa6b15fca3c2a26f97a9vboxsync kCpumMsrRdFn_IntelI7RaplPp0PerfStatus, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7RaplPp1PowerLimit, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7RaplPp1EnergyStatus, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7RaplPp1Policy, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpNominal, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpLevel1, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelI7IvyConfigTdpLevel2, /**< Takes real value as reference. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_IntelCore2EmttmCrTablesN, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8SysCfg, /**< Range value returned. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8HwThermalCtrl, /**< Range value returned. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdK8FidVidControl, /**< Range value returned. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8FidVidStatus, /**< Range value returned. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdFam10hPStateCurLimit, /**< Returns range value. */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hPStateControl, /**< Returns range value. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdFam10hPStateStatus, /**< Returns range value. */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hPStateN, /**< Returns range value. This isn't an register index! */
f3fd5f0cfee6865de86bef793a549083d37edd4fvboxsync kCpumMsrRdFn_AmdFam10hCofVidControl, /**< Returns range value. */
886d0ed1f0aa2e75c92140ca240345679d617e4cvboxsync kCpumMsrRdFn_AmdFam10hCofVidStatus, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7MicrocodeCtl, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7ClusterIdMaybe, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK8PatchLevel, /**< Returns range value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrRdFn_AmdK7DrXAddrMaskN, /**< Takes register index. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** End of valid MSR read function indexes. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * MSR write functions.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Invalid zero value. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Writes are ignored, the fWrGpMask is observed though. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Writes cause GP(0) to be raised, the fWrGpMask should be UINT64_MAX. */
45b7b06f3c4ef53f499c355505010a2b050802f4vboxsync /** Alias to the MSR range starting at the MSR given by
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CPUMMSRRANGE::uValue. Must be used in pair with
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * kCpumMsrRdFn_MsrAlias. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrPhysBaseN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrPhysMaskN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32MtrrFixed, /**< Takes CPUMCPU offset. */
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32PerfEvtSelN, /**< Range value indicates the register number. */
db946a685afcb5cfb59b1342a2fc637fc0c04c50vboxsync kCpumMsrWrFn_Ia32FixedCtrN, /**< Takes register number of start of range. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32McCtlStatusAddrMiscN, /**< Takes bank number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_Ia32McNCtl2, /**< Takes register number of start of range. */
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync kCpumMsrWrFn_IntelI7MsrOffCoreResponseN, /**< Takes register number. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync kCpumMsrWrFn_AmdK7DrXAddrMaskN, /**< Takes register index. */
} CPUMMSRWRFN;
typedef struct CPUMMSRRANGE
#ifdef VBOX_WITH_STATISTICS
} CPUMMSRRANGE;
#ifdef VBOX_WITH_STATISTICS
VMMDECL(void) CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
#ifndef VBOX_WITHOUT_UNNAMED_UNIONS
|| pCtx->eflags.Bits.u1VM; /* Cannot be set in long mode. Intel spec 2.3.1 "System Flags and Fields in IA-32e Mode". */
/* Intel mentions EFER.LMA and EFER.LME in different parts of their spec. We shall use EFER.LMA rather
VMM_INT_DECL(void) CPUMSetHyperState(PVMCPU pVCpu, uint32_t u32EIP, uint32_t u32ESP, uint32_t u32EAX, uint32_t u32EDX);
| CPUM_CHANGED_CR0 \
| CPUM_CHANGED_CR4 \
| CPUM_CHANGED_CR3 \
| CPUM_CHANGED_TR \
#ifdef IN_RING3
VMMR3DECL(int) CPUMR3CpuIdGetLeaf(PVM pVM, PCPUMCPUIDLEAF pLeaf, uint32_t uLeaf, uint32_t uSubLeaf);
VMMR3DECL(int) CPUMR3CpuIdDetectUnknownLeafMethod(PCPUMUKNOWNCPUID penmUnknownMethod, PCPUMCPUID pDefUnknown);
VMMR3DECL(CPUMCPUVENDOR) CPUMR3CpuIdDetectVendorEx(uint32_t uEAX, uint32_t uEBX, uint32_t uECX, uint32_t uEDX);
#ifdef IN_RC
#ifdef VBOX_WITH_RAW_RING1
#ifdef IN_RING0