/*
*/
/*
* Copyright (c) 2006-2007, 2013, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*/
#ifndef _INTEL_SDVO_REGS_H
#define _INTEL_SDVO_REGS_H
/**
* @file SDVO command definitions and structures.
*/
#define SDVO_OUTPUT_FIRST (0)
#pragma pack(1)
struct intel_sdvo_caps {
} __attribute__((packed));
#pragma pack()
/* Note: SDVO detailed timing flags match EDID misc flags. */
/** This matches the EDID DTD structure, more or less */
#pragma pack(1)
struct intel_sdvo_dtd {
struct {
} part1;
struct {
/** lower 4 bits each vsync offset, vsync width */
/**
* 2 high bits of hsync offset, 2 high bits of hsync width,
* bits 4-5 of vsync offset, and 2 high bits of vsync width.
*/
/** bits 6-7 of vsync offset at bits 6-7 */
} part2;
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
struct intel_sdvo_pixel_clock_range {
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
} __attribute__((packed));
#pragma pack()
/* I2C registers for SDVO */
/* Status results */
/** Returns a struct intel_sdvo_caps */
/**
* Reports which inputs are trained (managed to sync).
*
* Devices must have trained within 2 vsyncs of a mode change.
*/
#pragma pack(1)
} __attribute__((packed));
#pragma pack()
/** Returns a struct intel_sdvo_output_flags of active outputs. */
/**
* Sets the current set of active outputs.
*
* Takes a struct intel_sdvo_output_flags. Must be preceded by a SET_IN_OUT_MAP
* on multi-output devices.
*/
/**
* Returns the current mapping of SDVO inputs to outputs on the device.
*
* Returns two struct intel_sdvo_output_flags structures.
*/
struct intel_sdvo_in_out_map {
};
/**
* Sets the current mapping of SDVO inputs to outputs on the device.
*
* Takes two struct i380_sdvo_output_flags structures.
*/
/**
* Returns a struct intel_sdvo_output_flags of attached displays.
*/
/**
* Returns a struct intel_sdvo_ouptut_flags of displays supporting hot plugging.
*/
/**
* Takes a struct intel_sdvo_output_flags.
*/
/**
* Returns a struct intel_sdvo_output_flags of displays with hot plug
* interrupts enabled.
*/
#pragma pack(1)
} __attribute__((packed));
#pragma pack()
/**
* Selects which input is affected by future input commands.
*
* Commands affected include SET_INPUT_TIMINGS_PART[12],
* GET_INPUT_TIMINGS_PART[12], GET_PREFERRED_INPUT_TIMINGS_PART[12],
* GET_INPUT_PIXEL_CLOCK_RANGE, and CREATE_PREFERRED_INPUT_TIMINGS.
*/
#pragma pack(1)
struct intel_sdvo_set_target_input_args {
} __attribute__((packed));
#pragma pack()
/**
* Takes a struct intel_sdvo_output_flags of which outputs are targetted by
* future output commands.
*
* Affected commands inclue SET_OUTPUT_TIMINGS_PART[12],
* GET_OUTPUT_TIMINGS_PART[12], and GET_OUTPUT_PIXEL_CLOCK_RANGE.
*/
/* Part 1 */
/* Part 2 */
/**
* Generates a DTD based on the given width, height, and flags.
*
* This will be supported by any device supporting scaling or interlaced
* modes.
*/
/** Returns a struct intel_sdvo_pixel_clock_range */
/** Returns a struct intel_sdvo_pixel_clock_range */
/** Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */
/** Returns a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
/** Takes a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
/** 5 bytes of bit flags for TV formats shared by all TV format functions */
#pragma pack(1)
struct intel_sdvo_tv_format {
} __attribute__((packed));
#pragma pack()
/** Returns the resolutiosn that can be used with the given TV format */
#pragma pack(1)
struct intel_sdvo_sdtv_resolution_request {
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
struct intel_sdvo_sdtv_resolution_reply {
} __attribute__((packed));
#pragma pack()
/* Get supported resolution with squire pixel aspect ratio that can be
scaled for the requested HDTV format */
#pragma pack(1)
struct intel_sdvo_hdtv_resolution_request {
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
struct intel_sdvo_hdtv_resolution_reply {
} __attribute__((packed));
#pragma pack()
/* Get supported power state returns info for encoder and monitor, rely on
last SetTargetInput and SetTargetOutput calls */
/* Get power state returns info for encoder and monitor, rely on last
SetTargetInput and SetTargetOutput calls */
/**
* The panel power sequencing parameters are in units of milliseconds.
* The high fields are bits 8:9 of the 10-bit values.
*/
#pragma pack(1)
struct sdvo_panel_power_sequencing {
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
struct sdvo_max_backlight_reply {
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
struct sdvo_get_ambient_light_reply {
} __attribute__((packed));
#pragma pack()
#pragma pack(1)
struct sdvo_set_ambient_light_reply {
} __attribute__((packed));
#pragma pack()
/* Set display power state */
#pragma pack(1)
struct intel_sdvo_enhancements_reply {
} __attribute__((packed));
#pragma pack()
/* Picture enhancement limits below are dependent on the current TV format,
* and thus need to be queried and set after it.
*/
#pragma pack(1)
struct intel_sdvo_enhancement_limits_reply {
} __attribute__((packed));
#pragma pack()
# define SDVO_LVDS_COLOR_DEPTH_18 (0 << 0)
#pragma pack(1)
struct intel_sdvo_enhancements_arg {
}__attribute__((packed));
#pragma pack()
/* HDMI op codes */
#define SDVO_HBUF_INDEX_ELD 0
#pragma pack(1)
struct intel_sdvo_encode{
} __attribute__ ((packed));
#pragma pack()
#endif /* _INTEL_SDVO_REGS_H */