1450N/A * Copyright (c) 2006, 2013, Oracle and/or its affiliates. All rights reserved. 1450N/A * Copyright 2006 Dave Airlie <airlied@linux.ie> 1450N/A * Copyright (c) 2006-2007, 2013, Intel Corporation 1450N/A * Jesse Barnes <jesse.barnes@intel.com> 1450N/A * Permission is hereby granted, free of charge, to any person obtaining a 1450N/A * copy of this software and associated documentation files (the "Software"), 1450N/A * to deal in the Software without restriction, including without limitation 1450N/A * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1450N/A * and/or sell copies of the Software, and to permit persons to whom the 1450N/A * Software is furnished to do so, subject to the following conditions: 1450N/A * The above copyright notice and this permission notice (including the next 1450N/A * paragraph) shall be included in all copies or substantial portions of the 1450N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1450N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1450N/A * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1450N/A * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1450N/A * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 1450N/A * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 1450N/A * DEALINGS IN THE SOFTWARE. 1450N/A * Eric Anholt <eric@anholt.net> 1450N/A "NTSC_M" ,
"NTSC_J" ,
"NTSC_443",
1450N/A "PAL_B" ,
"PAL_D" ,
"PAL_G" ,
1450N/A "PAL_H" ,
"PAL_I" ,
"PAL_M" ,
1450N/A "PAL_N" ,
"PAL_NC" ,
"PAL_60" ,
1450N/A "SECAM_B" ,
"SECAM_D" ,
"SECAM_G" ,
1450N/A "SECAM_K" ,
"SECAM_K1",
"SECAM_L" ,
1450N/A /* Register for the SDVO device: SDVOB or SDVOC */ 1450N/A /* Active outputs controlled by this SDVO output */ 1450N/A * Capabilities of the SDVO device returned by 1450N/A * i830_sdvo_get_capabilities() 1450N/A /* Pixel clock limitations reported by the SDVO device, in kHz */ 1450N/A * For multiple function SDVO device, 1450N/A * this is for current attached outputs. 1450N/A * Hotplug activation bits for this device 1450N/A * This is used to select the color range of RBG outputs in HDMI mode. 1450N/A * It is only valid when using TMDS encoding and 8 bit per color mode. 1450N/A * This is set if we're going to treat the device as TV-out. 1450N/A * While we have these nice friendly flags for output types that ought 1450N/A * to decide this for us, the S-Video output on our HDMI+S-Video card 1450N/A /* On different gens SDVOB is at different places. */ 1450N/A /* This is for current tv format name */ 1450N/A * This is set if we treat the device as HDMI, instead of DVI. 1450N/A * This is set if we detect output of sdvo device as LVDS. 1450N/A * have a valid fixed mode to use with the panel. 1450N/A * This is sdvo fixed pannel mode pointer 1450N/A /* DDC bus used by this SDVO encoder */ 1450N/A * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 1450N/A /* Mark the type of connector */ 1450N/A /* This contains all current supported TV format */ 1450N/A /* add the property for the SDVO-TV */ 1450N/A /* Add variable to record current setting for the above property */ 1450N/A /* this is to get the range of margin.*/ 1450N/A * Writes the SDVOB or SDVOC with the given value, but always writes both 1450N/A * SDVOB and SDVOC to work around apparent hardware issues (according to 1450N/A * Write the registers twice for luck. Sometimes, 1450N/A * writing them only once doesn't appear to 'stick'. 1450N/A * The BIOS does this too. Yay, magic 1450N/A/** Mapping of command numbers to names, for debug output */ 1450N/A /* Add the op code for SDVO enhancements */ 1450N/A /* Would be simpler to allocate both in one go ? */ 1450N/A /* the following two are to read the response */ 1450N/A /* failure in I2C transfer */ 1450N/A u8 retry =
15;
/* 5 quick checks, followed by 10 long checks */ 1450N/A * The documentation states that all commands will be 1450N/A * processed within 15µs, and that we need only poll 1450N/A * the status byte a maximum of 3 times in order for the 1450N/A * Check 5 times in case the hardware failed to read the docs. 1450N/A * Also beware that the first response by many devices is to 1450N/A * reply PENDING and stall for time. TVs are notorious for 1450N/A * requiring longer than specified to complete their replies. 1450N/A * Originally (in the DDX long ago), the delay was only ever 15ms 1450N/A * with an additional delay of 30ms applied for TVs added later after 1450N/A * many experiments. To accommodate both sets of delays, we do a 1450N/A * sequence of slow checks if the device is falling behind and fails 1450N/A /* Read the command response */ 1450N/A /* This must be the immediately preceding write before the i2c xfer */ 1450N/A * Return whether each input is trained. 1450N/A * This function is making an assumption about the layout of the response, 1450N/A * which should be checked against the docs. 1450N/A /* Convert the values from units of 10 kHz to kHz. */ 1450N/A /* do some mode translations */ 1450N/A /* Buffer size is 0 based, hooray! */ 1450N/A /* sdvo spec says that the ecc is handled by the hw, and it looks like 1450N/A * we must not send the ecc field, either. */ 1450N/A/* Asks the sdvo controller for the preferred input mode given the output mode. 1450N/A * Unfortunately we have to set up the full output mode to do that. */ 1450N/A /* Reset the input timing to the screen. Assume always input 0. */ 1450N/A /* SDVO TV has fixed PLL values depend on its clock range, 1450N/A this mirrors vbios setting. */ 1450N/A /* We need to construct preferred input timings based on our 1450N/A * output timings. To do that, we have to set the output 1450N/A * timings, even though this isn't really the right place in 1450N/A * the sequence to do it. Oh well. 1450N/A /* Make the CRTC code factor in the SDVO pixel multiplier. The 1450N/A * SDVO device will factor out the multiplier during mode_set. 1450N/A /* See CEA-861-E - 5.1 Default Encoding Parameters */ 1450N/A /* FIXME: This bit is only valid when using TMDS encoding and 8 1450N/A /* Clock computation needs to happen after pixel multiplier. */ 1450N/A /* First, set the input mapping for the first input to our controlled 1450N/A * output. This is only correct if we're a single-input device, in 1450N/A * which case the first input is the output from the appropriate SDVO 1450N/A * channel on the motherboard. In a two-input device, the first input 1450N/A * will be SDVOB and the second SDVOC. 1450N/A /* Set the output timings to the screen */ 1450N/A /* lvds has a special fixed output timing. */ 1450N/A /* Set the input timing to the screen. Assume always input 0. */ 1450N/A /* We have tried to get input timing in mode_fixup, and filled into 1450N/A /* Set the SDVO control regs. */ 1450N/A /* The real mode polarity is set by the SDVO commands, using 1450N/A * struct intel_sdvo_dtd. */ 1450N/A /* done in crtc_mode_set as the dpll_md reg must be written early */ 1450N/A /* done in crtc_mode_set as it lives inside the dpll register */ 1450N/A /* Some sdvo encoders are not spec compliant and don't 1450N/A * implement the mandatory get_timings function. */ 1450N/A * pixel multiplier readout is tricky: Only on i915g/gm it is stored in 1450N/A * the sdvo port register, on all other platforms it is part of the dpll 1450N/A * state. Since the general pipe state readout happens before the 1450N/A * encoder->get_config we so already have a valid pixel multplier on all 1450N/A /* Cross check the port pixel multiplier with the sdvo encoder state. */ 1450N/A return;
/* no pixel multiplier readout support yet */ 1450N/A /* HW workaround for IBX, we need to move the port to 1450N/A * transcoder A before disabling it. */ 1450N/A /* Again we need to write this twice. */ 1450N/A /* Transcoder selection bits only update 1450N/A * effectively on vblank. */ 1450N/A /* HW workaround for IBX, we need to move the port 1450N/A * to transcoder A before disabling it, so restore it here. */ 1450N/A /* Warn if the device reported failure to sync. 1450N/A * A lot of SDVO devices fail to notify of sync, but it's 1450N/A * a given it the status is a success, we succeeded. 1450N/A /* dvo supports only 2 dpms states. */ 1450N/A /* Only need to change hw state when actually enabled */ 1450N/A /* We set active outputs manually below in case pipe dpms doesn't change 1450N/A " sdvo_version_major: %d\n" 1450N/A " sdvo_version_minor: %d\n" 1450N/A /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1450N/A /* Is there more than one type of output? */ 1450N/A/* Mac mini hack -- use the same DDC as the analog connector */ 1450N/A * Don't use the 1 as the argument of DDC bus switch to get 1450N/A * the EDID. It is used for SDVO SPD ROM. 1450N/A * If we found the EDID on the other bus, 1450N/A * assume that is the correct DDC bus. 1450N/A * When there is no edid and no monitor is connected with VGA 1450N/A * port, try to use the CRT ddc to read the EDID for DVI-connector. 1450N/A /* DDC bus is shared, match EDID to connector type */ 1450N/A /* if we have an edid check it matches the connection */ 1450N/A /* May update encoder flag for like clock for SDVO TV, etc.*/ 1450N/A /* set the bus switch and get the modes */ 1450N/A * Mac mini hack. On this device, the DVI-I connector shares one DDC 1450N/A * link between analog and digital outputs. So, if the regular SDVO 1450N/A * DDC fails, check to see if the analog output is disconnected, in 1450N/A * which case we'll look there for the digital DDC data. 1450N/A * Note! This is in reply order (see loop in get_tv_modes). 1450N/A 416, 0,
200,
201,
232,
233, 0,
1450N/A 416, 0,
240,
241,
272,
273, 0,
1450N/A 496, 0,
300,
301,
332,
333, 0,
1450N/A 736, 0,
350,
351,
382,
383, 0,
1450N/A 736, 0,
400,
401,
432,
433, 0,
1450N/A 736, 0,
480,
481,
512,
513, 0,
1450N/A 800, 0,
480,
481,
512,
513, 0,
1450N/A 800, 0,
576,
577,
608,
609, 0,
1450N/A 816, 0,
350,
351,
382,
383, 0,
1450N/A 816, 0,
400,
401,
432,
433, 0,
1450N/A 816, 0,
480,
481,
512,
513, 0,
1450N/A 816, 0,
540,
541,
572,
573, 0,
1450N/A 816, 0,
576,
577,
608,
609, 0,
1450N/A 864, 0,
576,
577,
608,
609, 0,
1450N/A 896, 0,
600,
601,
632,
633, 0,
1450N/A 928, 0,
624,
625,
656,
657, 0,
1450N/A 1016, 0,
766,
767,
798,
799, 0,
1450N/A 1120, 0,
768,
769,
800,
801, 0,
1450N/A 1376, 0,
1024,
1025,
1056,
1057, 0,
1450N/A /* Read the list of supported input resolutions for the selected TV 1450N/A * Fetch modes from VBT. For SDVO prefer the VBT mode since some 1450N/A * SDVO->LVDS transcoders can't cope with the EDID mode. 1450N/A /* Guarantee the mode is preferred */ 1450N/A * Attempt to get the mode list from DDC. 1450N/A * Assume that the preferred modes are 1450N/A * arranged in priority order. 1450N/A /* FIXME: this bit is only valid when using TMDS 1450N/A * encoding and 8 bit per color mode. */ 1450N/A /* OSOL i2c_del_adapter(&intel_sdvo->ddc); */ 1450N/A /* Make a mask of outputs less than or equal to our own priority in the 1450N/A /* Count bits to find what number we are in the priority list. */ 1450N/A /* If more than 3 outputs, default to DDC bus 3 for now. */ 1450N/A /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1450N/A * Choose the appropriate DDC bus for control bus switch command for this 1450N/A * SDVO output based on the controlled output. 1450N/A * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1450N/A * outputs, then LVDS outputs. 1450N/A /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 1450N/A * our code totally fails once we start using gmbus. Hence fall back to 1450N/A/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 1450N/A /* If the BIOS described our SDVO device, take advantage of it. */ 1450N/A /* If the BIOS only described a different SDVO device, use the 1450N/A * address that it isn't using. 1450N/A /* No SDVO device info is found for another DVO port, 1450N/A * so use mapping assumption we had before BIOS parsing. 1450N/A /* Some SDVO devices have one-shot hotplug interrupts. 1450N/A * Ensure that they get re-enabled when an interrupt happens. 1450N/A /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 1450N/A /* TV has no XXX1 function block */ 1450N/A /* when horizontal overscan is supported, Add the left/right property */ 1450N/A "default %d, current %d\n",
1450N/A "default %d, current %d\n",
1450N/A /* OSOL_i915: sdvo->ddc.owner = THIS_MODULE; */ 1450N/A /* OSOL_i915: sdvo->ddc.dev.parent = &dev->pdev->dev; */ 1450N/A /* OSOL_i915: return i2c_add_adapter(&sdvo->ddc) == 0; */ 1450N/A /* encoder type will be decided later */ 1450N/A /* Read the regs to test if we can talk to the device */ 1450N/A for (i = 0; i <
0x40; i++) {
1450N/A /* In default case sdvo lvds is false */ 1450N/A /* Output_setup can leave behind connectors! */ 1450N/A /* Only enable the hotplug irq if we need it, to work around noisy 1450N/A * Cloning SDVO with anything is often impossible, since the SDVO 1450N/A * encoder can request a special input timing mode. And even if that's 1450N/A * not the case we have evidence that cloning a plain unscaled mode with 1450N/A * VGA doesn't really work. Furthermore the cloning flags are way too 1450N/A * simplistic anyway to express such constraints, so just give up on 1450N/A * cloning for SDVO encoders. 1450N/A /* Set the input timing to the screen. Assume always input 0. */ 1450N/A "clock range %dMHz - %dMHz, " 1450N/A "input 1: %c, input 2: %c, " 1450N/A "output 1: %c, output 2: %c\n",
1450N/A /* check currently supported outputs */ 1450N/A// i2c_del_adapter(&intel_sdvo->ddc);