/*
*/
/*
* Copyright 2006 Dave Airlie <airlied@linux.ie>
* Copyright (c) 2006-2007, 2013, Intel Corporation
* Jesse Barnes <jesse.barnes@intel.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*/
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_sun_i2c.h" /* OSOL_i915 */
#include "intel_drv.h"
#include "drm_edid.h"
#include "i915_drm.h"
#include "i915_drv.h"
#include "intel_sdvo_regs.h"
static const char *tv_format_names[] = {
"NTSC_M" , "NTSC_J" , "NTSC_443",
"PAL_B" , "PAL_D" , "PAL_G" ,
"PAL_H" , "PAL_I" , "PAL_M" ,
"PAL_N" , "PAL_NC" , "PAL_60" ,
"SECAM_B" , "SECAM_D" , "SECAM_G" ,
"SECAM_K" , "SECAM_K1", "SECAM_L" ,
"SECAM_60"
};
struct intel_sdvo {
/* Register for the SDVO device: SDVOB or SDVOC */
/* Active outputs controlled by this SDVO output */
/*
* Capabilities of the SDVO device returned by
* i830_sdvo_get_capabilities()
*/
/* Pixel clock limitations reported by the SDVO device, in kHz */
/*
* For multiple function SDVO device,
* this is for current attached outputs.
*/
/*
* Hotplug activation bits for this device
*/
/**
* This is used to select the color range of RBG outputs in HDMI mode.
* It is only valid when using TMDS encoding and 8 bit per color mode.
*/
bool color_range_auto;
/**
* This is set if we're going to treat the device as TV-out.
*
* While we have these nice friendly flags for output types that ought
* to decide this for us, the S-Video output on our HDMI+S-Video card
* shows up as RGB1 (VGA).
*/
bool is_tv;
/* On different gens SDVOB is at different places. */
bool is_sdvob;
/* This is for current tv format name */
int tv_format_index;
/**
* This is set if we treat the device as HDMI, instead of DVI.
*/
bool is_hdmi;
bool has_hdmi_monitor;
bool has_hdmi_audio;
/**
* This is set if we detect output of sdvo device as LVDS.
* have a valid fixed mode to use with the panel.
*/
bool is_lvds;
/**
* This is sdvo fixed pannel mode pointer
*/
/* DDC bus used by this SDVO encoder */
/*
* the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
*/
};
struct intel_sdvo_connector {
/* Mark the type of connector */
/* This contains all current supported TV format */
int format_supported_num;
/* add the property for the SDVO-TV */
/* Add variable to record current setting for the above property */
/* this is to get the range of margin.*/
};
{
}
{
struct intel_sdvo, base);
}
{
}
static bool
static bool
struct intel_sdvo_connector *intel_sdvo_connector,
int type);
static bool
struct intel_sdvo_connector *intel_sdvo_connector);
/**
* Writes the SDVOB or SDVOC with the given value, but always writes both
* SDVOB and SDVOC to work around apparent hardware issues (according to
* comments in the BIOS).
*/
{
int i;
return;
}
else
/*
* Write the registers twice for luck. Sometimes,
* writing them only once doesn't appear to 'stick'.
* The BIOS does this too. Yay, magic
*/
for (i = 0; i < 2; i++)
{
}
}
{
{
.flags = 0,
.len = 1,
},
{
.len = 1,
}
};
int ret;
return true;
return false;
}
/** Mapping of command numbers to names, for debug output */
static const struct _sdvo_cmd_name {
const char *name;
} sdvo_cmd_names[] = {
/* Add the op code for SDVO enhancements */
/* HDMI op code */
};
{
int i;
DRM_DEBUG_KMS("%s: W: %02X ",
for (i = 0; i < args_len; i++)
for (; i < 8; i++)
DRM_LOG_KMS(" ");
for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
break;
}
}
if (i == ARRAY_SIZE(sdvo_cmd_names))
DRM_LOG_KMS("\n");
}
static const char *cmd_status_names[] = {
"Power on",
"Success",
"Not supported",
"Invalid arg",
"Pending",
"Target not specified",
"Scaling not supported"
};
{
int i, ret = true;
/* Would be simpler to allocate both in one go ? */
if (!buf)
return false;
if (!msgs) {
return false;
}
for (i = 0; i < args_len; i++) {
}
/* the following two are to read the response */
if (ret < 0) {
ret = false;
goto out;
}
if (ret != i+3) {
/* failure in I2C transfer */
ret = false;
}
out:
return ret;
}
void *response, int response_len)
{
int i;
/*
* The documentation states that all commands will be
* processed within 15µs, and that we need only poll
* the status byte a maximum of 3 times in order for the
* command to be complete.
*
* Check 5 times in case the hardware failed to read the docs.
*
* Also beware that the first response by many devices is to
* reply PENDING and stall for time. TVs are notorious for
* requiring longer than specified to complete their replies.
* Originally (in the DDX long ago), the delay was only ever 15ms
* with an additional delay of 30ms applied for TVs added later after
* many experiments. To accommodate both sets of delays, we do a
* sequence of slow checks if the device is falling behind and fails
* to reply within 5*15us.
*/
&status))
goto log_fail;
if (retry < 10)
msleep(15);
else
udelay(15);
&status))
goto log_fail;
}
else
if (status != SDVO_CMD_STATUS_SUCCESS)
goto log_fail;
/* Read the command response */
for (i = 0; i < response_len; i++) {
SDVO_I2C_RETURN_0 + i,
goto log_fail;
}
DRM_LOG_KMS("\n");
return true;
DRM_LOG_KMS("... failed\n");
return false;
}
{
return 1;
return 2;
else
return 4;
}
{
/* This must be the immediately preceding write before the i2c xfer */
return intel_sdvo_write_cmd(intel_sdvo,
&ddc_bus, 1);
}
{
return false;
}
static bool
{
return false;
}
{
return intel_sdvo_set_value(intel_sdvo,
}
/**
* Return whether each input is trained.
*
* This function is making an assumption about the layout of the response,
* which should be checked against the docs.
*/
static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
{
return false;
return true;
}
{
return intel_sdvo_set_value(intel_sdvo,
}
{
return intel_sdvo_get_value(intel_sdvo,
}
int mode)
{
switch (mode) {
case DRM_MODE_DPMS_ON:
break;
case DRM_MODE_DPMS_STANDBY:
break;
case DRM_MODE_DPMS_SUSPEND:
break;
case DRM_MODE_DPMS_OFF:
break;
}
return intel_sdvo_set_value(intel_sdvo,
}
int *clock_min,
int *clock_max)
{
return false;
/* Convert the values from units of 10 kHz to kHz. */
return true;
}
{
return intel_sdvo_set_value(intel_sdvo,
}
struct intel_sdvo_dtd *dtd)
{
}
struct intel_sdvo_dtd *dtd)
{
}
struct intel_sdvo_dtd *dtd)
{
return intel_sdvo_set_timing(intel_sdvo,
}
struct intel_sdvo_dtd *dtd)
{
return intel_sdvo_set_timing(intel_sdvo,
}
struct intel_sdvo_dtd *dtd)
{
return intel_sdvo_get_timing(intel_sdvo,
}
static bool
{
if (intel_sdvo->is_lvds &&
return intel_sdvo_set_value(intel_sdvo,
}
struct intel_sdvo_dtd *dtd)
{
}
{
}
const struct drm_display_mode *mode)
{
int mode_clock;
/* do some mode translations */
mode_clock /= 10;
(v_sync_len & 0xf);
}
const struct intel_sdvo_dtd *dtd)
{
}
{
return intel_sdvo_get_value(intel_sdvo,
}
{
}
{
}
#if 0
{
int i, j;
for (i = 0; i <= av_split; i++) {
set_buf_index, 2);
for (j = 0; j <= buf_size; j += 8) {
NULL, 0);
pos += 8;
}
}
}
#endif
{
int i;
set_buf_index, 2))
return false;
&hbuf_size, 1))
return false;
/* Buffer size is 0 based, hooray! */
hbuf_size++;
DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
for (i = 0; i < hbuf_size; i += 8) {
if (i < length)
tmp, 8))
return false;
}
return intel_sdvo_set_value(intel_sdvo,
&tx_rate, 1);
}
const struct drm_display_mode *adjusted_mode)
{
.type = DIP_TYPE_AVI,
.ver = DIP_VERSION_AVI,
.len = DIP_LEN_AVI,
};
if (intel_sdvo->rgb_quant_range_selectable) {
else
}
/* sdvo spec says that the ecc is handled by the hw, and it looks like
* we must not send the ecc field, either. */
}
{
return intel_sdvo_set_value(intel_sdvo,
}
static bool
const struct drm_display_mode *mode)
{
return false;
return false;
return true;
}
/* Asks the sdvo controller for the preferred input mode given the output mode.
* Unfortunately we have to set up the full output mode to do that. */
static bool
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
/* Reset the input timing to the screen. Assume always input 0. */
return false;
return false;
&input_dtd))
return false;
return true;
}
{
/* SDVO TV has fixed PLL values depend on its clock range,
this mirrors vbios setting. */
clock->n = 3;
clock->n = 6;
} else {
}
pipe_config->clock_set = true;
}
struct intel_crtc_config *pipe_config)
{
DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
pipe_config->has_pch_encoder = true;
/* We need to construct preferred input timings based on our
* output timings. To do that, we have to set the output
* timings, even though this isn't really the right place in
* the sequence to do it. Oh well.
*/
if (intel_sdvo->is_tv) {
return false;
mode,
pipe_config->sdvo_tv_clock = true;
} else if (intel_sdvo->is_lvds) {
return false;
mode,
}
/* Make the CRTC code factor in the SDVO pixel multiplier. The
* SDVO device will factor out the multiplier during mode_set.
*/
if (intel_sdvo->color_range_auto) {
/* See CEA-861-E - 5.1 Default Encoding Parameters */
/* FIXME: This bit is only valid when using TMDS encoding and 8
* bit per color mode. */
if (intel_sdvo->has_hdmi_monitor &&
else
intel_sdvo->color_range = 0;
}
if (intel_sdvo->color_range)
pipe_config->limited_color_range = true;
/* Clock computation needs to happen after pixel multiplier. */
if (intel_sdvo->is_tv)
return true;
}
{
int rate;
if (!mode)
return;
/* First, set the input mapping for the first input to our controlled
* output. This is only correct if we're a single-input device, in
* which case the first input is the output from the appropriate SDVO
* channel on the motherboard. In a two-input device, the first input
* will be SDVOB and the second SDVOC.
*/
/* Set the output timings to the screen */
return;
/* lvds has a special fixed output timing. */
if (intel_sdvo->is_lvds)
else
DRM_INFO("Setting output timings on %s failed\n",
/* Set the input timing to the screen. Assume always input 0. */
return;
if (intel_sdvo->has_hdmi_monitor) {
(void) intel_sdvo_set_colorimetry(intel_sdvo,
} else
if (intel_sdvo->is_tv &&
return;
/* We have tried to get input timing in mode_fixup, and filled into
* adjusted_mode.
*/
DRM_INFO("Setting input timings on %s failed\n",
default:
DRM_ERROR("unknown pixel mutlipler specified\n");
}
return;
/* Set the SDVO control regs. */
/* The real mode polarity is set by the SDVO commands, using
* struct intel_sdvo_dtd. */
} else {
switch (intel_sdvo->sdvo_reg) {
case GEN3_SDVOB:
break;
case GEN3_SDVOC:
break;
}
}
else
if (intel_sdvo->has_hdmi_audio)
/*LINTED E_NOP_IF_STMT*/
/* done in crtc_mode_set as the dpll_md reg must be written early */
/*LINTED E_NOP_IF_STMT*/
/* done in crtc_mode_set as it lives inside the dpll register */
} else {
}
}
{
return true;
else
return false;
}
{
return false;
if (HAS_PCH_CPT(dev))
else
return true;
}
struct intel_crtc_config *pipe_config)
{
int encoder_pixel_multiplier = 0;
bool ret;
if (!ret) {
/* Some sdvo encoders are not spec compliant and don't
* implement the mandatory get_timings function. */
DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
} else {
else
else
}
/*
* the sdvo port register, on all other platforms it is part of the dpll
* state. Since the general pipe state readout happens before the
* encoder->get_config we so already have a valid pixel multplier on all
* other platfroms.
*/
>> SDVO_PORT_MULTIPLY_SHIFT) + 1;
}
/* Cross check the port pixel multiplier with the sdvo encoder state. */
switch (val) {
case SDVO_CLOCK_RATE_MULT_1X:
break;
case SDVO_CLOCK_RATE_MULT_2X:
break;
case SDVO_CLOCK_RATE_MULT_4X:
break;
}
if(HAS_PCH_SPLIT(dev))
return; /* no pixel multiplier readout support yet */
DRM_ERROR("SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
}
{
if (0)
if ((temp & SDVO_ENABLE) != 0) {
/* HW workaround for IBX, we need to move the port to
* transcoder A before disabling it. */
if (temp & SDVO_PIPE_B_SELECT) {
temp &= ~SDVO_PIPE_B_SELECT;
/* Again we need to write this twice. */
/* Transcoder selection bits only update
* effectively on vblank. */
if (crtc)
else
msleep(50);
}
}
}
}
{
int i;
if ((temp & SDVO_ENABLE) == 0) {
/* HW workaround for IBX, we need to move the port
* to transcoder A before disabling it, so restore it here. */
if (HAS_PCH_IBX(dev))
}
for (i = 0; i < 2; i++)
/* Warn if the device reported failure to sync.
* A lot of SDVO devices fail to notify of sync, but it's
* a given it the status is a success, we succeeded.
*/
DRM_DEBUG_KMS("First %s output reported failure to "
}
if (0)
}
{
/* dvo supports only 2 dpms states. */
if (mode != DRM_MODE_DPMS_ON)
return;
/* Only need to change hw state when actually enabled */
if (!crtc) {
return;
}
/* We set active outputs manually below in case pipe dpms doesn't change
* due to cloning. */
if (mode != DRM_MODE_DPMS_ON) {
if (0)
} else {
if (0)
}
}
struct drm_display_mode *mode)
{
return MODE_NO_DBLESCAN;
return MODE_CLOCK_LOW;
return MODE_CLOCK_HIGH;
if (intel_sdvo->is_lvds) {
return MODE_PANEL;
return MODE_PANEL;
}
return MODE_OK;
}
static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
{
return false;
DRM_DEBUG_KMS("SDVO capabilities:\n"
" vendor_id: %d\n"
" device_id: %d\n"
" device_rev_id: %d\n"
" sdvo_version_major: %d\n"
" sdvo_version_minor: %d\n"
" sdvo_inputs_mask: %d\n"
" smooth_scaling: %d\n"
" sharp_scaling: %d\n"
" up_scaling: %d\n"
" down_scaling: %d\n"
" stall_support: %d\n"
" output_flags: %d\n",
caps->output_flags);
return true;
}
{
/* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
* on the line. */
return 0;
return 0;
return hotplug;
}
{
}
static bool
{
/* Is there more than one type of output? */
}
static struct edid *
{
}
/* Mac mini hack -- use the same DDC as the analog connector */
static struct edid *
{
return drm_get_edid(connector,
}
static enum drm_connector_status
{
/*
* Don't use the 1 as the argument of DDC bus switch to get
* the EDID. It is used for SDVO SPD ROM.
*/
if (edid)
break;
}
/*
* If we found the EDID on the other bus,
* assume that is the correct DDC bus.
*/
}
/*
* When there is no edid and no monitor is connected with VGA
* port, try to use the CRT ddc to read the EDID for DVI-connector.
*/
/* DDC bus is shared, match EDID to connector type */
if (intel_sdvo->is_hdmi) {
}
} else
}
if (status == connector_status_connected) {
}
return status;
}
static bool
{
DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
return connector_is_digital == monitor_is_digital;
}
static enum drm_connector_status
{
&response, 2))
return connector_status_unknown;
DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
if (response == 0)
return connector_status_disconnected;
intel_sdvo->has_hdmi_monitor = false;
intel_sdvo->has_hdmi_audio = false;
intel_sdvo->rgb_quant_range_selectable = false;
else if (IS_TMDS(intel_sdvo_connector))
else {
/* if we have an edid check it matches the connection */
edid))
else
} else
}
/* May update encoder flag for like clock for SDVO TV, etc.*/
if (ret == connector_status_connected) {
intel_sdvo->is_tv = false;
intel_sdvo->is_lvds = false;
if (response & SDVO_TV_MASK)
intel_sdvo->is_tv = true;
if (response & SDVO_LVDS_MASK)
}
return ret;
}
{
/* set the bus switch and get the modes */
/*
* Mac mini hack. On this device, the DVI-I connector shares one DDC
* link between analog and digital outputs. So, if the regular SDVO
* DDC fails, check to see if the analog output is disconnected, in
* which case we'll look there for the digital DDC data.
*/
edid)) {
}
}
}
/*
* Set of SDVO TV modes.
* Note! This is in reply order (see loop in get_tv_modes).
* XXX: all 60Hz refresh?
*/
416, 0, 200, 201, 232, 233, 0,
416, 0, 240, 241, 272, 273, 0,
496, 0, 300, 301, 332, 333, 0,
736, 0, 350, 351, 382, 383, 0,
736, 0, 400, 401, 432, 433, 0,
736, 0, 480, 481, 512, 513, 0,
800, 0, 480, 481, 512, 513, 0,
800, 0, 576, 577, 608, 609, 0,
816, 0, 350, 351, 382, 383, 0,
816, 0, 400, 401, 432, 433, 0,
816, 0, 480, 481, 512, 513, 0,
816, 0, 540, 541, 572, 573, 0,
816, 0, 576, 577, 608, 609, 0,
864, 0, 576, 577, 608, 609, 0,
896, 0, 600, 601, 632, 633, 0,
928, 0, 624, 625, 656, 657, 0,
1016, 0, 766, 767, 798, 799, 0,
1120, 0, 768, 769, 800, 801, 0,
1376, 0, 1024, 1025, 1056, 1057, 0,
};
{
int i;
/* Read the list of supported input resolutions for the selected TV
* format.
*/
return;
return;
return;
for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
if (reply & (1 << i)) {
&sdvo_tv_modes[i]);
if (nmode)
}
}
{
/*
* Fetch modes from VBT. For SDVO prefer the VBT mode since some
* SDVO->LVDS transcoders can't cope with the EDID mode.
*/
/* Guarantee the mode is preferred */
}
}
/*
* Attempt to get the mode list from DDC.
* Assume that the preferred modes are
* arranged in priority order.
*/
intel_sdvo->is_lvds = true;
break;
}
}
}
{
if (IS_TV(intel_sdvo_connector))
else if (IS_LVDS(intel_sdvo_connector))
else
}
static void
{
if (intel_sdvo_connector->left)
if (intel_sdvo_connector->right)
if (intel_sdvo_connector->top)
if (intel_sdvo_connector->bottom)
if (intel_sdvo_connector->hpos)
if (intel_sdvo_connector->vpos)
if (intel_sdvo_connector->contrast)
if (intel_sdvo_connector->hue)
}
{
}
{
bool has_audio = false;
if (!intel_sdvo->is_hdmi)
return false;
return has_audio;
}
static int
struct drm_property *property,
{
int ret;
if (ret)
return ret;
int i = (int)val;
bool has_audio;
if (i == intel_sdvo_connector->force_audio)
return 0;
if (i == HDMI_AUDIO_AUTO)
else
has_audio = (i == HDMI_AUDIO_ON);
return 0;
goto done;
}
switch (val) {
case INTEL_BROADCAST_RGB_AUTO:
intel_sdvo->color_range_auto = true;
break;
case INTEL_BROADCAST_RGB_FULL:
intel_sdvo->color_range_auto = false;
intel_sdvo->color_range = 0;
break;
intel_sdvo->color_range_auto = false;
/* FIXME: this bit is only valid when using TMDS
* encoding and 8 bit per color mode. */
break;
default:
return -EINVAL;
}
return 0;
goto done;
}
goto set_value; \
}
if (val >= TV_FORMAT_NUM)
return -EINVAL;
if (intel_sdvo->tv_format_index ==
return 0;
goto done;
} else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
return 0;
goto set_value;
return 0;
goto set_value;
return 0;
goto set_value;
return 0;
goto set_value;
}
}
return -EINVAL; /* unknown property */
return -EIO;
done:
return 0;
}
.dpms = intel_sdvo_dpms,
};
};
{
/* OSOL i2c_del_adapter(&intel_sdvo->ddc); */
}
};
static void
{
unsigned int num_bits;
/* Make a mask of outputs less than or equal to our own priority in the
* list.
*/
switch (sdvo->controlled_output) {
case SDVO_OUTPUT_LVDS1:
case SDVO_OUTPUT_LVDS0:
case SDVO_OUTPUT_TMDS1:
case SDVO_OUTPUT_TMDS0:
case SDVO_OUTPUT_RGB1:
mask |= SDVO_OUTPUT_RGB1;
case SDVO_OUTPUT_RGB0:
mask |= SDVO_OUTPUT_RGB0;
break;
}
/* Count bits to find what number we are in the priority list. */
/* If more than 3 outputs, default to DDC bus 3 for now. */
if (num_bits > 3)
num_bits = 3;
/* Corresponds to SDVO_CONTROL_BUS_DDCx */
}
/**
* Choose the appropriate DDC bus for control bus switch command for this
* SDVO output based on the controlled output.
*
* DDC bus number assignment is in a priority order of RGB outputs, then TMDS
* outputs, then LVDS outputs.
*/
static void
{
else
if (mapping->initialized)
else
}
static void
{
else
else
/* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
* our code totally fails once we start using gmbus. Hence fall back to
* bit banging for now. */
}
/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
static void
{
}
static bool
{
return intel_sdvo_check_supp_encode(intel_sdvo);
}
static u8
{
} else {
}
/* If the BIOS described our SDVO device, take advantage of it. */
if (my_mapping->slave_addr)
return my_mapping->slave_addr;
/* If the BIOS only described a different SDVO device, use the
* address that it isn't using.
*/
if (other_mapping->slave_addr) {
return 0x72;
else
return 0x70;
}
/* No SDVO device info is found for another DVO port,
* so use mapping assumption we had before BIOS parsing.
*/
return 0x70;
else
return 0x72;
}
static void
struct intel_sdvo *encoder)
{
}
static void
struct intel_sdvo_connector *connector)
{
intel_sdvo->color_range_auto = true;
}
}
static bool
{
if (!intel_sdvo_connector)
return false;
if (device == 0) {
} else if (device == 1) {
}
/* Some SDVO devices have one-shot hotplug interrupts.
* Ensure that they get re-enabled when an interrupt happens.
*/
} else {
}
intel_sdvo->is_hdmi = true;
}
if (intel_sdvo->is_hdmi)
return true;
}
static bool
{
if (!intel_sdvo_connector)
return false;
intel_sdvo->is_tv = true;
goto err;
goto err;
return true;
err:
return false;
}
static bool
{
if (!intel_sdvo_connector)
return false;
if (device == 0) {
} else if (device == 1) {
}
return true;
}
static bool
{
if (!intel_sdvo_connector)
return false;
if (device == 0) {
} else if (device == 1) {
}
goto err;
return true;
err:
return false;
}
static bool
{
intel_sdvo->is_tv = false;
intel_sdvo->is_lvds = false;
/* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
if (flags & SDVO_OUTPUT_TMDS0)
if (!intel_sdvo_dvi_init(intel_sdvo, 0))
return false;
return false;
/* TV has no XXX1 function block */
if (flags & SDVO_OUTPUT_SVID0)
return false;
if (flags & SDVO_OUTPUT_CVBS0)
return false;
if (flags & SDVO_OUTPUT_YPRPB0)
return false;
if (flags & SDVO_OUTPUT_RGB0)
if (!intel_sdvo_analog_init(intel_sdvo, 0))
return false;
return false;
if (flags & SDVO_OUTPUT_LVDS0)
if (!intel_sdvo_lvds_init(intel_sdvo, 0))
return false;
return false;
if ((flags & SDVO_OUTPUT_MASK) == 0) {
intel_sdvo->controlled_output = 0;
DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
return false;
}
return true;
}
{
}
}
struct intel_sdvo_connector *intel_sdvo_connector,
int type)
{
return false;
return false;
if (format_map == 0)
return false;
for (i = 0 ; i < TV_FORMAT_NUM; i++)
if (format_map & (1 << i))
if (!intel_sdvo_connector->tv_format)
return false;
for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
return true;
}
if (enhancements.name) { \
return false; \
intel_sdvo_connector->name = \
if (!intel_sdvo_connector->name) return false; \
} \
} while(0)
static bool
struct intel_sdvo_connector *intel_sdvo_connector,
{
if (enhancements.overscan_h) {
&data_value, 4))
return false;
&response, 2))
return false;
if (!intel_sdvo_connector->left)
return false;
if (!intel_sdvo_connector->right)
return false;
DRM_DEBUG_KMS("h_overscan: max %d, "
"default %d, current %d\n",
}
if (enhancements.overscan_v) {
&data_value, 4))
return false;
&response, 2))
return false;
"top_margin", 0, data_value[0]);
if (!intel_sdvo_connector->top)
return false;
"bottom_margin", 0, data_value[0]);
if (!intel_sdvo_connector->bottom)
return false;
DRM_DEBUG_KMS("v_overscan: max %d, "
"default %d, current %d\n",
}
if (enhancements.dot_crawl) {
return false;
if (!intel_sdvo_connector->dot_crawl)
return false;
}
return true;
}
static bool
struct intel_sdvo_connector *intel_sdvo_connector,
{
return true;
}
struct intel_sdvo_connector *intel_sdvo_connector)
{
union {
} enhancements;
enhancements.response = 0;
(void) intel_sdvo_get_value(intel_sdvo,
&enhancements, sizeof(enhancements));
if (enhancements.response == 0) {
DRM_DEBUG_KMS("No enhancement is supported\n");
return true;
}
if (IS_TV(intel_sdvo_connector))
else if(IS_LVDS(intel_sdvo_connector))
return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
else
return true;
}
int num)
{
return -EIO;
}
{
}
};
static bool
struct drm_device *dev)
{
/* OSOL_i915: sdvo->ddc.owner = THIS_MODULE; */
/* OSOL_i915: sdvo->ddc.class = I2C_CLASS_DDC; */
/* OSOL_i915: sdvo->ddc.dev.parent = &dev->pdev->dev; */
return 1;
/* OSOL_i915: return i2c_add_adapter(&sdvo->ddc) == 0; */
}
{
int i;
if (!intel_sdvo)
return false;
goto err_i2c_bus;
/* encoder type will be decided later */
/* Read the regs to test if we can talk to the device */
for (i = 0; i < 0x40; i++) {
DRM_DEBUG_KMS("No SDVO device found on %s\n",
goto err;
}
}
/* In default case sdvo lvds is false */
goto err;
DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
/* Output_setup can leave behind connectors! */
goto err_output;
}
/* Only enable the hotplug irq if we need it, to work around noisy
* hotplug lines.
*/
if (intel_sdvo->hotplug_active) {
}
/*
* Cloning SDVO with anything is often impossible, since the SDVO
* encoder can request a special input timing mode. And even if that's
* not the case we have evidence that cloning a plain unscaled mode with
* VGA doesn't really work. Furthermore the cloning flags are way too
* simplistic anyway to express such constraints, so just give up on
* cloning for SDVO encoders.
*/
/* Set the input timing to the screen. Assume always input 0. */
goto err_output;
goto err_output;
DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
"clock range %dMHz - %dMHz, "
"input 1: %c, input 2: %c, "
"output 1: %c, output 2: %c\n",
/* check currently supported outputs */
return true;
err:
// i2c_del_adapter(&intel_sdvo->ddc);
return false;
}