/*
*/
#ifndef __RADEON_IO32_H__
#define __RADEON_IO32_H__
#ifdef _MULTI_DATAMODEL
/*
* For radeon_cp_init()
*/
typedef struct drm_radeon_init_32 {
int func;
unsigned int sarea_priv_offset;
int cp_mode;
int gart_size;
int ring_size;
int usec_timeout;
unsigned int fb_bpp;
unsigned int depth_bpp;
unsigned int ring_offset;
unsigned int ring_rptr_offset;
unsigned int buffers_offset;
unsigned int gart_textures_offset;
/*
* radeon_cp_buffers()
*/
typedef struct drm_dma_32 {
int context;
int send_count;
int request_count;
int request_size;
int granted_count;
} drm_dma_32_t;
/*
* drm_radeon_clear()
*/
typedef struct drm_radeon_clear_32 {
unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
unsigned int color_mask;
unsigned int depth_mask;
/*
* For radeon_cp_texture()
*/
typedef struct drm_radeon_tex_image_32 {
unsigned int x, y;
typedef struct drm_radeon_texture_32 {
unsigned int offset;
int pitch;
int format;
int width;
int height;
/*
* for radeon_cp_stipple()
*/
typedef struct drm_radeon_stipple_32 {
/*
* radeon_cp_vertex2()
*/
typedef struct drm_radeon_vertex2_32 {
int idx;
int discard;
int nr_states;
int nr_prims;
/*
* radeon_cp_cmdbuf()
*/
typedef struct drm_radeon_kcmd_buffer_32 {
int bufsz;
int nbox;
/*
* radeon_cp_getparam()
*/
typedef struct drm_radeon_getparam_32 {
int param;
/*
* radeon_mem_alloc()
*/
typedef struct drm_radeon_mem_alloc_32 {
int region;
int alignment;
int size;
/*
* radeon_irq_emit()
*/
typedef struct drm_radeon_irq_emit_32 {
/*
* radeon_cp_setparam()
*/
#pragma pack(1)
typedef struct drm_radeon_setparam_32 {
unsigned int param;
#pragma pack()
#endif /* _MULTI_DATAMODEL */
#endif /* __RADEON_IO32_H__ */