/*
*/
/*
* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
*
* Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Fremont, California.
* Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
* All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef __RADEON_DRM_H__
#define __RADEON_DRM_H__
/*
* WARNING: If you change any of these defines, make sure to change the
* defines in the X server file (radeon_sarea.h)
*/
#ifndef __RADEON_SAREA_DEFINES__
#define __RADEON_SAREA_DEFINES__
/*
* Old style state flags, required for sarea interface (1.1 and 1.2
* clears) and 1.2 drm_vertex2 ioctl.
*/
/* handled client-side */
/* version 1.2 and newer */
/*
* New style per-packet identifiers for use in cmd_buffer ioctl with
* the RADEON_EMIT_PACKET command. Comments relate new packets to old
* state bits and the packet size:
*/
/*
* Commands understood by cmd_buffer ioctl. More can be added but
* obviously these can't be removed or changed:
*/
/* emit one of the register packets above */
/* emit hw packet wrapped in cliprects */
/*
* emit hw wait commands -- note:
* doesn't make the cpu wait, just
* the graphics hardware
*/
typedef union {
int i;
struct {
} header;
struct {
} packet;
struct {
} scalars;
struct {
} vectors;
struct {
} veclinear;
struct {
} dma;
struct {
} wait;
/* Allowed parameters for R300_CMD_PACKET3 */
#define R300_CMD_PACKET3_CLEAR 0
/*
* Commands understood by cmd_buffer ioctl for R300.
* The interface has not been stabilized, so some of these may be removed
* and eventually reordered before stabilization.
*/
/* emit sequence ending 3d rendering */
/*
*/
#ifdef u
#undef u
#endif /* u */
typedef union {
unsigned int u;
struct {
} header;
struct {
} packet0;
struct {
} vpu;
struct {
} packet3;
struct {
} delay;
struct {
} dma;
struct {
} wait;
struct {
} scratch;
/* Primitive types */
/* Byte offsets for indirect buffer data */
/*
* minimum of 64k, and there are at most 64 of them per heap.
*/
#define RADEON_LOCAL_TEX_HEAP 0
/*
* Blits have strict offset rules. All blit offset must be aligned on
* a 1K-byte boundary.
*/
#endif /* __RADEON_SAREA_DEFINES__ */
typedef struct {
unsigned int red;
unsigned int green;
unsigned int blue;
unsigned int alpha;
typedef struct {
/* Context state */
unsigned int pp_fog_color;
unsigned int re_solid_color;
unsigned int rb3d_blendcntl;
unsigned int rb3d_depthoffset;
unsigned int rb3d_depthpitch;
unsigned int rb3d_zstencilcntl;
unsigned int rb3d_cntl;
unsigned int rb3d_coloroffset;
unsigned int re_width_height;
unsigned int rb3d_colorpitch;
unsigned int se_cntl;
/* Vertex format state */
/* Line state */
unsigned int re_line_state;
/* Bumpmap state */
unsigned int pp_rot_matrix_1;
/* Mask state */
unsigned int rb3d_ropcntl;
unsigned int rb3d_planemask;
/* Viewport state */
unsigned int se_vport_xoffset;
unsigned int se_vport_yscale;
unsigned int se_vport_yoffset;
unsigned int se_vport_zscale;
unsigned int se_vport_zoffset;
/* Setup state */
/* Misc state */
unsigned int re_misc;
typedef struct {
/* Zbias state */
unsigned int se_zbias_constant;
/* Setup registers for each texture unit */
typedef struct {
unsigned int pp_txfilter;
unsigned int pp_txformat;
unsigned int pp_txoffset;
unsigned int pp_txcblend;
unsigned int pp_txablend;
unsigned int pp_tfactor;
unsigned int pp_border_color;
typedef struct {
unsigned int start;
unsigned int finish;
typedef struct {
unsigned int dirty;
typedef struct {
/*
* The channel for communication of state information to the
* kernel on firing a vertex buffer with either of the
*/
unsigned int dirty;
unsigned int vertsize;
unsigned int vc_format;
/* The current cliprects, or a subset thereof. */
unsigned int nbox;
/* Counters for client-side throttling of rendering clients. */
unsigned int last_frame;
unsigned int last_dispatch;
unsigned int last_clear;
int ctx_owner;
/*
* WARNING: If you change any of these defines, make sure to change the
* defines in the Xserver file (xf86drmRadeon.h)
*
* KW: actually it's illegal to change any of this (backwards compatibility).
*/
/*
* Radeon specific ioctls
* The device specific ioctl range is 0x40 to 0x79.
*/
#define DRM_RADEON_NOT_USED
#define DRM_IOCTL_RADEON_CP_INIT \
#define DRM_IOCTL_RADEON_CP_START \
#define DRM_IOCTL_RADEON_CP_STOP \
#define DRM_IOCTL_RADEON_CP_RESET \
#define DRM_IOCTL_RADEON_CP_IDLE \
#define DRM_IOCTL_RADEON_RESET \
#define DRM_IOCTL_RADEON_FULLSCREEN \
#define DRM_IOCTL_RADEON_SWAP \
#define DRM_IOCTL_RADEON_CLEAR \
#define DRM_IOCTL_RADEON_VERTEX \
#define DRM_IOCTL_RADEON_INDICES \
#define DRM_IOCTL_RADEON_STIPPLE \
#define DRM_IOCTL_RADEON_INDIRECT \
#define DRM_IOCTL_RADEON_TEXTURE \
#define DRM_IOCTL_RADEON_VERTEX2 \
#define DRM_IOCTL_RADEON_CMDBUF \
#define DRM_IOCTL_RADEON_GETPARAM \
#define DRM_IOCTL_RADEON_FLIP \
#define DRM_IOCTL_RADEON_ALLOC \
#define DRM_IOCTL_RADEON_FREE \
#define DRM_IOCTL_RADEON_INIT_HEAP \
#define DRM_IOCTL_RADEON_IRQ_EMIT \
#define DRM_IOCTL_RADEON_IRQ_WAIT \
#define DRM_IOCTL_RADEON_CP_RESUME \
#define DRM_IOCTL_RADEON_SETPARAM \
#define DRM_IOCTL_RADEON_SURF_ALLOC \
#define DRM_IOCTL_RADEON_SURF_FREE \
typedef struct drm_radeon_init {
enum {
} func;
unsigned long sarea_priv_offset;
int cp_mode;
int gart_size;
int ring_size;
int usec_timeout;
unsigned int fb_bpp;
unsigned int depth_bpp;
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
unsigned long gart_textures_offset;
typedef struct drm_radeon_cp_stop {
int flush;
int idle;
typedef struct drm_radeon_fullscreen {
enum {
} func;
#define CLEAR_X1 0
typedef union drm_radeon_clear_rect {
float f[5];
typedef struct drm_radeon_clear {
unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
unsigned int color_mask;
typedef struct drm_radeon_vertex {
int prim;
typedef struct drm_radeon_indices {
int prim;
int idx;
int start;
int end;
/*
* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices
* - allows multiple primitives and state changes in a single ioctl
* - supports driver change to emit native primitives
*/
typedef struct drm_radeon_vertex2 {
int nr_states;
int nr_prims;
/*
* v1.3 - obsoletes drm_radeon_vertex2
* - allows arbitarily large cliprect list
* - allows updating of tcl packet, vector and scalar state
* - allows memory-efficient description of state updates
* - allows state to be emitted without a primitive
* (for clears, ctx switches)
* - allows more than one dma buffer to be referenced per ioctl
* - supports tcl driver
* - may be extended in future versions with new cmd types, packets
*/
typedef struct drm_radeon_cmd_buffer {
int bufsz;
int nbox;
typedef struct drm_radeon_tex_image {
unsigned int x, y; /* Blit coordinates */
typedef struct drm_radeon_texture {
unsigned int offset;
int pitch;
int format;
int height;
typedef struct drm_radeon_stipple {
typedef struct drm_radeon_indirect {
int idx;
int start;
int end;
int discard;
/* enum for card type parameters */
#define RADEON_CARD_PCI 0
/*
* 1.3: An ioctl to get parameters that aren't available to the 3d
* client any other way.
*/
/* card offset of 1st GART buffer */
/* Added with DRM version 1.6. */
/* Added with DRM version 1.8. */
typedef struct drm_radeon_getparam {
int param;
/* 1.6: Set up a memory manager for regions of shared memory: */
typedef struct drm_radeon_mem_alloc {
int region;
int alignment;
int size;
typedef struct drm_radeon_mem_free {
int region;
int region_offset;
typedef struct drm_radeon_mem_init_heap {
int region;
int size;
int start;
/* 1.6: Userspace can request & wait on irq's: */
typedef struct drm_radeon_irq_emit {
typedef struct drm_radeon_irq_wait {
int irq_seq;
/*
* 1.10: Clients tell the DRM where they think the framebuffer is located in
* the card's address space, via a new generic ioctl to set parameters
*/
typedef struct drm_radeon_setparam {
unsigned int param;
/* determined framebuffer location */
/* PCI Gart Location */
/* Use new memory map */
/* PCI GART Table Size */
/* VBLANK CRTC */
typedef struct drm_radeon_surface_alloc {
unsigned int address;
unsigned int size;
unsigned int flags;
typedef struct drm_radeon_surface_free {
unsigned int address;
#endif /* __RADEON_DRM_H__ */