2N/A * The contents of this file are subject to the terms of the 2N/A * Common Development and Distribution License (the "License"). 2N/A * You may not use this file except in compliance with the License. 2N/A * See the License for the specific language governing permissions 2N/A * and limitations under the License. 2N/A * When distributing Covered Code, include this CDDL HEADER in each 2N/A * If applicable, add the following below this CDDL HEADER, with the 2N/A * fields enclosed by brackets "[]" replaced with your own identifying 2N/A * information: Portions Copyright [yyyy] [name of copyright owner] 2N/A * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 2N/A * Use is subject to license terms. 2N/A * Copyright 2007 Jason King. All rights reserved. 2N/A * Use is subject to license terms. 2N/A#
pragma ident "%Z%%M% %I% %E% SMI" 2N/A * The sparc disassembler is mostly straightforward, each instruction is 2N/A * represented by an inst_t structure. The inst_t definitions are organized 2N/A * into tables. The tables are correspond to the opcode maps documented in the 2N/A * various sparc architecture manuals. Each table defines the bit range of the 2N/A * instruction whose value act as an index into the array of instructions. A 2N/A * table can also refer to another table if needed. Each table also contains 2N/A * a function pointer of type format_fcn that knows how to output the 2N/A * instructions in the table, as well as handle any synthetic instructions 2N/A * Unfortunately, the changes from sparcv8 -> sparcv9 not only include new 2N/A * instructions, they sometimes renamed or just reused the same instruction to 2N/A * do different operations (i.e. the sparcv8 coprocessor instructions). To 2N/A * accommodate this, each table can define an overlay table. The overlay table 2N/A * is a list of (table index, architecture, new instruction definition) values. 2N/A * Traversal starts with the first table, 2N/A * get index value from the instruction 2N/A * if an relevant overlay entry exists for this index, 2N/A * grab the overlay definition 2N/A * grab the definition from the array (corresponding to the index value) 2N/A * If the entry is an instruction, 2N/A * call print function of instruction. 2N/A * If the entry is a pointer to another table 2N/A * traverse the table 2N/A * To keep dis happy, for sparc, instead of actually returning an error, if 2N/A * the instruction cannot be disassembled, we instead merely place the value 2N/A * of the instruction into the output buffer. 2N/A * Adding new instructions: 2N/A * With the above information, it hopefully makes it clear how to add support 2N/A * for decoding new instructions. Presumably, with new instructions will come 2N/A * a new dissassembly mode (I.e. DIS_SPARC_V8, DIS_SPARC_V9, etc.). 2N/A * If the dissassembled format does not correspond to one of the existing 2N/A * formats, a new formatter will have to be written. The 'flags' value of 2N/A * inst_t is intended to instruct the corresponding formatter about how to 2N/A * output the instruction. 2N/A * If the corresponding entry in the correct table is currently unoccupied, 2N/A * simply replace the INVALID entry with the correct definition. The INST and 2N/A * TABLE macros are suggested to be used for this. If there is already an 2N/A * instruction defined, then the entry must be placed in an overlay table. If 2N/A * no overlay table exists for the instruction table, one will need to be 2N/A#
endif /* DIS_STANDALONE */ 2N/A#
endif /* DIS_STANDALONE */ 2N/A * The dis_i386.c comment for this says it returns the previous instruction, 2N/A * however, I'm fairly sure it's actually returning the _address_ of the 2N/A * nth previous instruction. 2N/A /* this allows sparc code to be tested on x86 */ 2N/A#
endif /* DIS_STANDALONE */ 2N/A#
endif /* DIS_STANDALONE */