/*
* GRUB -- GRand Unified Bootloader
* Copyright (C) 2000,2001,2002,2003,2004,2005,2007,2008,2009,2010 Free Software Foundation, Inc.
*
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* GRUB is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with GRUB. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef FULOONG2F
#else
#endif
/* Put serial init as soon as possible. But on Fuloong2f serial is past
Geode, so on Fuloong2f we need Geode first.
*/
#ifndef FULOONG2F
#endif
/* Find CS5536 controller. */
/* $t4 chooses device in priority encoding. */
/* Resulting value is kept in GRUB_MACHINE_PCI_CONF_CTRL_REG.
This way we don't need to sacrifice a register for it. */
/* We have only one bus (0). Function is 0. */
1:
/* In case of failure try again. CS5536 may be slow to come up. */
#ifndef FULOONG2F
#endif
/* Set GPIO LBAR. */
/* Set mask to 0xf and enabled bit to 1. */
| GRUB_CS5536_LBAR_ENABLE) >> 32)
#ifdef FULOONG2F
#endif
/* Initialise SMBus controller. */
/* Set SMBUS LBAR. */
/* Set mask to 0xf and enabled bit to 1. */
| GRUB_CS5536_LBAR_ENABLE) >> 32)
/* Disable SMB. */
/* Disable interrupts. */
/* Set as master. */
/* Launch SMBus controller at slowest speed possible. */
/* Yeeloong and Fuloong2f have only one memory slot. */
/* Output first byte on serial for debugging. */
/* And here is our goal: DDR2 controller initialisation. */
/* Use addiu for sign-extension. */
addiu $t2, $zero, ~(GRUB_CPU_LOONGSON_CORECFG_DISABLE_DDR2_SPACE|GRUB_CPU_LOONGSON_CORECFG_BUFFER_CPU)
b continue
b fatal
b fatal
b fatal
1:
/* Same as similarly named C function but in asm since
we need it early. */
/* In: none. Out: none. Clobbered: $t0, $t1, $t2, $a0, $a1, $a2. */
#ifdef FULOONG2F
#endif
/* Turn off the interrupt. */
/* Set DLAB. */
/* Set the baud rate 115200. */
/* Set the line status. */
/* Enable the FIFO. */
/* Turn on DTR and RTS. */
/* Let message return to original caller. */
/* Print message on serial console. */
/* In: $a0 = asciiz message. Out: none. Clobbered: $t0, $t1, $a0. */
1:
/* Print 32-bit hexadecimal on serial.
In: $a0. Out: None. Clobbered: $a0, $t0, $t1, $t2
*/
1:
self:
b self
/* Write CS5536 MSR.
In: $a0 address, $a1 lower word, $a2 upper word.
Out: None
Clobbered: $t0
*/
/* Wait for SMBus data or empty transmitter. */
/* In: $a0 = exception handler. Out: none. Clobbered: $t0, $t1 */
1:
return:
/* Read SPD byte. In: $a0 byte, $a1 device. Out: $v0 read byte (0x100 on failure).
Clobbered: $t0, $t1, $t2, $t3, $a0. */
/* Send START. */
/* Send device address. */
/* Send ACK. */
/* Send byte address. */
/* Send START. */
/* Send device address. */
/* Send STOP. */
.p2align 3
#ifdef FULOONG2F
#else
#endif
#ifdef FULOONG2F
#else
#endif
.quad 0 /* 16 */
.quad 0 /* 17 */
.quad 0 /* 18 */
.quad 0 /* 19 */
.quad 0 /* 1a */
.quad 0 /* 1b */
.quad 0 /* 1c */
/* Dump of GPIO connections. FIXME: Remove useless and macroify. */
#ifdef FULOONG2F
.long 0xffff0000, 0x2eefd110, 0xffff0000, 0xffff0000
.long 0x2eefd110, 0xffff0000, 0x1000efff, 0xefff1000
.long 0x3df3c20c, 0xffff0000, 0xffff0000, 0xffff0000
.long 0x7df3820c, 0x3df3c20c, 0xffff0000, 0x00000000
.long 0xffff0000, 0xffff0000, 0x3de3c21c, 0x3d83c27c
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000
.long 0xffff0000, 0xffff0000, 0x0000ffff, 0xffff0000
.long 0xefff1000, 0xffff0000, 0xffff0000, 0xffff0000
.long 0xefff1000, 0xefff1000, 0xffff0000, 0x00000000
.long 0xffff0000, 0xffff0000, 0xefff1000, 0xefff1000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
#else
.long 0xffff0000, 0x2ffdd002, 0xffff0000, 0xffff0000
.long 0x2fffd000, 0xffff0000, 0x1000efff, 0xefff1000
.long 0x3ffbc004, 0xffff0000, 0xffff0000, 0xffff0000
.long 0x3ffbc004, 0x3ffbc004, 0xffff0000, 0x00000000
.long 0xffff0000, 0xffff0000, 0x3ffbc004, 0x3f9bc064
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000
.long 0xffff0000, 0xffff0000, 0x0000ffff, 0xffff0000
.long 0xefff1000, 0xffff0000, 0xffff0000, 0xffff0000
.long 0xefff1000, 0xefff1000, 0xffff0000, 0x00000000
.long 0xffff0000, 0xffff0000, 0xefff1000, 0xffff0000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x00000000, 0x00000000, 0x00000000
.long 0x00000000, 0x50000000, 0x00000000, 0x00000000
#endif
continue:
/* 0 */
/* 1 */
1:
/* 2 */
/* 3 */
/* 4 */
/* 5 */
/* FIXME: figure termination resistance. */
/* $v0 = 15 - $v0. */
/* Find the fastest supported CAS latency. */
2:
b 2b
1:
/* $v0 = 15 - ($v0 + 1) = 14 - $v0. */
1:
/* Desactivate DDR2 registers. */
/* Enable cache. */
/* Set line size to 32 bytes and disabled cache. */
/* Invalidate all I-cache entries. */
1:
/* Invalidate all D-cache entries. */
1:
/* All four ways. */
/* Invalidate all S-cache entries. */
1:
/* All four ways. */
/* Finally enable cache. */
/* Set ROM delay cycles to 1. */
/* Take advantage of cache. */
#ifdef FULOONG2F
#else
#endif