4319N/A * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. 0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 0N/A * This code is free software; you can redistribute it and/or modify it 0N/A * under the terms of the GNU General Public License version 2 only, as 0N/A * published by the Free Software Foundation. 0N/A * This code is distributed in the hope that it will be useful, but WITHOUT 0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 0N/A * version 2 for more details (a copy is included in the LICENSE file that 0N/A * accompanied this code). 0N/A * You should have received a copy of the GNU General Public License version 0N/A * 2 along with this work; if not, write to the Free Software Foundation, 0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 0N/A// Some fun naming (textual) substitutions: 0N/A// RegMask::get_low_elem() ==> RegMask::find_first_elem() 0N/A// RegMask::Special ==> RegMask::Empty 0N/A// RegMask::_flags ==> RegMask::is_AllStack() 0N/A// RegMask::operator<<=() ==> RegMask::Insert() 0N/A// RegMask::operator>>=() ==> RegMask::Remove() 0N/A// RegMask::Union() ==> RegMask::OR 0N/A// RegMask::Inter() ==> RegMask::AND 0N/A// OptoRegister::RegName ==> OptoReg::Name 0N/A// OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version 0N/A// numregs in chaitin ==> proper degree in chaitin 0N/A//-------------Non-zero bit search methods used by RegMask--------------------- 0N/A// Find lowest 1, or return 32 if empty 0N/A// Find highest 1, or return 32 if empty 0N/A//------------------------------RegMask---------------------------------------- 0N/A// The ADL file describes how to print the machine-specific registers, as well 0N/A// as any notion of register classes. We provide a register mask, which is 0N/A// just a collection of Register numbers. 0N/A// The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. 0N/A// RM_SIZE is the size of a register mask in words. 0N/A// FORALL_BODY replicates a BODY macro once per word in the register mask. 0N/A// The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. 0N/A// However, it means the ADLC can redefine the unroll macro and all loops 0N/A// over register masks will be unrolled by the correct amount. 0N/A // Array of Register Mask bits. This array is large enough to cover 0N/A // all the machine registers and all parameters that need to be passed 0N/A // on the stack (stack registers) up to some interesting limit. Methods 0N/A // that need more parameters will NOT be compiled. On Intel, the limit 0N/A // is something like 90+ parameters. 0N/A // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. 0N/A // Also, consider the maximum alignment size for a normally allocated 0N/A // value. Since we allocate register pairs but not register quads (at 0N/A // present), this alignment is SlotsPerLong (== 2). A normally 0N/A // aligned allocated register is either a single register, or a pair 0N/A // of adjacent registers, the lower-numbered being even. 0N/A // See also is_aligned_Pairs() below, and the padding added before 0N/A // Matcher::_new_SP to keep allocated pairs aligned properly. 0N/A // If we ever go to quad-word allocations, SlotsPerQuad will become 0N/A // the controlling alignment constraint. Note that this alignment 0N/A // requirement is internal to the allocator, and independent of any 0N/A // particular platform. 0N/A // A constructor only used by the ADLC output. All mask fields are filled 0N/A // in directly. Calls to this look something like RM(1,2,3,4); 0N/A // Handy copying constructor 0N/A // Construct an empty mask 0N/A // Construct a mask with a single bit 0N/A // Check for register being in mask 0N/A // The last bit in the register mask indicates that the mask should repeat 0N/A // indefinitely with ONE bits. Returns TRUE if mask is infinite or 0N/A // unbounded in size. Returns FALSE if mask is finite size. 0N/A // Work around an -xO3 optimization problme in WS6U1. The old way: 0N/A // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } 0N/A // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() 0N/A // follows an Insert() loop, like the one found in init_spill_mask(). Using 0N/A // Insert() instead works because the index into _A in computed instead of 0N/A // constant. See bug 4665841. 0N/A // Test for being a not-empty mask. 0N/A // Find lowest-numbered register from mask, or BAD if mask is empty. 0N/A // Get highest-numbered register from mask, or BAD if mask is empty. 0N/A // Find the lowest-numbered register pair in the mask. Return the 0N/A // HIGHEST register number in the pair, or BAD if no pairs. 0N/A // Assert that the mask contains only bit pairs. 0N/A // Clear out partial bits; leave only aligned adjacent bit pairs. 0N/A // Smear out partial bits; leave only aligned adjacent bit pairs. 0N/A // Verify that the mask contains only aligned adjacent bit pairs 0N/A // Test that the mask contains only aligned adjacent bit pairs 0N/A // mask is a pair of misaligned registers 0N/A // Test for single register 0N/A // Test for a single adjacent pair 3845N/A // Test for a single adjacent set of ideal register's size. 3845N/A // Find the lowest-numbered register set in the mask. Return the 3845N/A // HIGHEST register number in the set, or BAD if no sets. 3845N/A // Assert that the mask contains only bit sets. 3845N/A // Clear out partial bits; leave only aligned adjacent bit sets of size. 3845N/A // Smear out partial bits to aligned adjacent bit sets. 3845N/A // Verify that the mask contains only aligned adjacent bit sets 3845N/A // Test that the mask contains only aligned adjacent bit sets 3845N/A // mask is a set of misaligned registers 3845N/A // Test for a single adjacent set 0N/A // Fast overlap test. Non-zero if any registers in common. 0N/A // Special test for register pressure based splitting 0N/A // UP means register only, Register plus stack, or stack only is DOWN 0N/A // Clear a register mask 0N/A // Fill a register mask with 1's 0N/A // Insert register into mask 0N/A // Remove register from mask 0N/A // OR 'rm' into 'this' 0N/A // AND 'rm' into 'this' 0N/A // Subtract 'rm' from 'this' 0N/A // Compute size of register mask: number of bits 0N/A // NOTE: -1 in computation reflects the usage of the last 3845N/A // bit of the regmask as an infinite stack flag and 3845N/A // -7 is to keep mask aligned for largest value (VecY). 3845N/A // NOTE: -SlotsPerVecY in computation reflects the need 3845N/A // to keep mask aligned for largest value (VecY). 0N/A// Do not use this constant directly in client code! 1879N/A#
endif // SHARE_VM_OPTO_REGMASK_HPP