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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
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* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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#ifndef SHARE_VM_OPTO_REGMASK_HPP
#define SHARE_VM_OPTO_REGMASK_HPP
#include "opto/optoreg.hpp"
#ifdef TARGET_ARCH_MODEL_x86_32
# include "adfiles/adGlobals_x86_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_x86_64
# include "adfiles/adGlobals_x86_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_sparc
# include "adfiles/adGlobals_sparc.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_zero
# include "adfiles/adGlobals_zero.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_arm
# include "adfiles/adGlobals_arm.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc
# include "adfiles/adGlobals_ppc.hpp"
#endif
// Some fun naming (textual) substitutions:
//
// RegMask::get_low_elem() ==> RegMask::find_first_elem()
// RegMask::Special ==> RegMask::Empty
// RegMask::_flags ==> RegMask::is_AllStack()
// RegMask::operator<<=() ==> RegMask::Insert()
// RegMask::operator>>=() ==> RegMask::Remove()
// RegMask::Union() ==> RegMask::OR
// RegMask::Inter() ==> RegMask::AND
//
// OptoRegister::RegName ==> OptoReg::Name
//
// OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version
//
// numregs in chaitin ==> proper degree in chaitin
//-------------Non-zero bit search methods used by RegMask---------------------
// Find lowest 1, or return 32 if empty
// Find highest 1, or return 32 if empty
//------------------------------RegMask----------------------------------------
// The ADL file describes how to print the machine-specific registers, as well
// as any notion of register classes. We provide a register mask, which is
// just a collection of Register numbers.
// The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
// RM_SIZE is the size of a register mask in words.
// FORALL_BODY replicates a BODY macro once per word in the register mask.
// The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
// However, it means the ADLC can redefine the unroll macro and all loops
// over register masks will be unrolled by the correct amount.
union {
// Array of Register Mask bits. This array is large enough to cover
// all the machine registers and all parameters that need to be passed
// on the stack (stack registers) up to some interesting limit. Methods
// that need more parameters will NOT be compiled. On Intel, the limit
// is something like 90+ parameters.
};
enum {
};
public:
// SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
// Also, consider the maximum alignment size for a normally allocated
// value. Since we allocate register pairs but not register quads (at
// present), this alignment is SlotsPerLong (== 2). A normally
// aligned allocated register is either a single register, or a pair
// of adjacent registers, the lower-numbered being even.
// See also is_aligned_Pairs() below, and the padding added before
// Matcher::_new_SP to keep allocated pairs aligned properly.
// If we ever go to quad-word allocations, SlotsPerQuad will become
// the controlling alignment constraint. Note that this alignment
// requirement is internal to the allocator, and independent of any
// particular platform.
// A constructor only used by the ADLC output. All mask fields are filled
// in directly. Calls to this look something like RM(1,2,3,4);
# define BODY(I) int a##I,
int dummy = 0 ) {
}
// Handy copying constructor
}
// Construct an empty mask
// Construct a mask with a single bit
// Check for register being in mask
}
// The last bit in the register mask indicates that the mask should repeat
// indefinitely with ONE bits. Returns TRUE if mask is infinite or
// unbounded in size. Returns FALSE if mask is finite size.
// Work around an -xO3 optimization problme in WS6U1. The old way:
// void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); }
// will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack()
// follows an Insert() loop, like the one found in init_spill_mask(). Using
// Insert() instead works because the index into _A in computed instead of
// constant. See bug 4665841.
// Test for being a not-empty mask.
int is_NotEmpty( ) const {
int tmp = 0;
return tmp;
}
// Find lowest-numbered register from mask, or BAD if mask is empty.
}
// Get highest-numbered register from mask, or BAD if mask is empty.
}
// Find the lowest-numbered register pair in the mask. Return the
// HIGHEST register number in the pair, or BAD if no pairs.
// Assert that the mask contains only bit pairs.
// Clear out partial bits; leave only aligned adjacent bit pairs.
void clear_to_pairs();
// Smear out partial bits; leave only aligned adjacent bit pairs.
void smear_to_pairs();
// Verify that the mask contains only aligned adjacent bit pairs
// Test that the mask contains only aligned adjacent bit pairs
bool is_aligned_pairs() const;
// mask is a pair of misaligned registers
// Test for single register
int is_bound1() const;
// Test for a single adjacent pair
int is_bound_pair() const;
// Test for a single adjacent set of ideal register's size.
return true;
} else if (is_bound1() || is_bound_pair()) {
return true;
}
return false;
}
// Find the lowest-numbered register set in the mask. Return the
// HIGHEST register number in the set, or BAD if no sets.
// Assert that the mask contains only bit sets.
// Clear out partial bits; leave only aligned adjacent bit sets of size.
void clear_to_sets(const int size);
// Smear out partial bits to aligned adjacent bit sets.
void smear_to_sets(const int size);
// Verify that the mask contains only aligned adjacent bit sets
void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
// Test that the mask contains only aligned adjacent bit sets
bool is_aligned_sets(const int size) const;
// mask is a set of misaligned registers
// Test for a single adjacent set
int is_bound_set(const int size) const;
// Fast overlap test. Non-zero if any registers in common.
return
0 ;
}
// Special test for register pressure based splitting
// UP means register only, Register plus stack, or stack only is DOWN
bool is_UP() const;
// Clear a register mask
void Clear( ) {
}
// Fill a register mask with 1's
void Set_All( ) {
}
// Insert register into mask
}
// Remove register from mask
}
// OR 'rm' into 'this'
}
// AND 'rm' into 'this'
}
// Subtract 'rm' from 'this'
}
// Compute size of register mask: number of bits
#ifndef PRODUCT
#endif
// NOTE: -1 in computation reflects the usage of the last
// bit of the regmask as an infinite stack flag and
// -7 is to keep mask aligned for largest value (VecY).
}
// NOTE: -SlotsPerVecY in computation reflects the need
// to keep mask aligned for largest value (VecY).
}
};
// Do not use this constant directly in client code!
#endif // SHARE_VM_OPTO_REGMASK_HPP