3845N/A * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 0N/A * This code is free software; you can redistribute it and/or modify it 0N/A * under the terms of the GNU General Public License version 2 only, as 0N/A * published by the Free Software Foundation. 0N/A * This code is distributed in the hope that it will be useful, but WITHOUT 0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 0N/A * version 2 for more details (a copy is included in the LICENSE file that 0N/A * accompanied this code). 0N/A * You should have received a copy of the GNU General Public License version 0N/A * 2 along with this work; if not, write to the Free Software Foundation, 0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 0N/A//---------------------------MachOper------------------------------------------ 0N/A // Allocate right next to the MachNodes in the same arena 0N/A // Number of input edges. 0N/A // Generally at least 1 0N/A // Array of Register masks 0N/A // Methods to output the encoding of the operand 0N/A // Negate conditional branches. Error for non-branch Nodes 0N/A // Return the value requested 0N/A // result register lookup, corresponding to int_format 0N/A // input register lookup, corresponding to ext_format 0N/A // helpers for MacroAssembler generation from ADLC 0N/A // A zero, default, indicates this value is not needed. 0N/A // May need to lookup the base register, as done in int_ and ext_format 0N/A // Parameters needed to support MEMORY_INTERFACE access to stackSlot 0N/A // Check for PC-Relative displacement 0N/A // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP 0N/A // Only returns non-null value for i486.ad's indOffset32X 0N/A // Return the method's address 0N/A // Hash and compare over operands are currently identical 0N/A // Virtual clone, since I do not know how big the MachOper is. 0N/A // Return ideal Type from simple operands. Fail for complex operands. 0N/A // Set an integer offset if we have one, or error otherwise 0N/A // Return name of operand 0N/A virtual const char *
Name()
const {
return "???";}
0N/A // Methods to output the text version of the operand 0N/A//------------------------------MachNode--------------------------------------- 0N/A// Base type for all machine specific nodes. All node classes generated by the 0N/A// ADLC inherit from this class. 0N/A // Required boilerplate 0N/A virtual int Opcode()
const;
// Always equal to MachNode 0N/A virtual uint rule()
const = 0;
// Machine-specific opcode 0N/A // Number of inputs which come before the first operand. 0N/A // Generally at least 1, to skip the Control input 0N/A // Copy inputs and operands to new node of instruction. 0N/A // Called from cisc_version() and short_branch_version(). 0N/A // !!!! The method's body is defined in ad_<arch>.cpp file. 0N/A // Return an equivalent instruction using memory for cisc_operand position 0N/A // Modify this instruction's register mask to use stack version for cisc_operand 0N/A // Support for short branches 2676N/A // Avoid back to back some instructions on some CPUs. 2963N/A // instruction implemented with a call 0N/A // First index in _in[] corresponding to operand, or -1 if there is none 0N/A // Register class input is expected in 0N/A // cisc-spillable instructions redefine for use by in_RegMask 0N/A // If this instruction is a 2-address instruction, then return the 0N/A // index of the input which must match the output. Not nessecary 0N/A // for instructions which bind the input and output register to the 0N/A // same singleton regiser (e.g., Intel IDIV which binds AX to be 0N/A // both an input and an output). It is nessecary when the input and 0N/A // output have choices - but they must use the same choice. 0N/A // Array of complex operand pointers. Each corresponds to zero or 0N/A // more leafs. Must be set by MachNode constructor to point to an 0N/A // internal array of MachOpers. The MachOper array is sized by 0N/A // specific MachNodes described in the ADL. 0N/A // Emit bytes into cbuf 0N/A // Size of instruction in bytes 0N/A // Helper function that computes size by emitting code 0N/A // Return the alignment required (in units of relocInfo::addr_unit()) 0N/A // for this instruction (must be a power of 2) 0N/A // Return the padding (in bytes) to be emitted before this 0N/A // instruction to properly align it. 0N/A // Return number of relocatable values contained in this instruction 0N/A // Hash and compare over operands. Used to do GVN on machine Nodes. 0N/A // Expand method for MachNode, replaces nodes representing pseudo 0N/A // instructions with a set of nodes which represent real machine 0N/A // instructions and compute the same value. 0N/A // Bottom_type call; value comes from operand0 0N/A // If this is a memory op, return the base pointer and fixed offset. 0N/A // If there are no such, return NULL. If there are multiple addresses 0N/A // or the address is indeterminate (rare cases) then return (Node*)-1, 0N/A // which serves as node bottom. 0N/A // If the offset is not statically determined, set it to Type::OffsetBot. 0N/A // This method is free to ignore stack slots if that helps. 0N/A // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible 0N/A // Helper for get_base_and_disp: find the base and index input nodes. 0N/A // Returns the MachOper as determined by memory_operand(), for use, if 0N/A // needed by the caller. If (MachOper *)-1 is returned, base and index 0N/A // are set to NodeSentinel. If (MachOper *) NULL is returned, base and 0N/A // index are set to NULL. 0N/A // Helper for memory_inputs: Which operand carries the necessary info? 0N/A // By default, returns NULL, which means there is no such operand. 0N/A // If it returns (MachOper*)-1, this means there are multiple memories. 0N/A // Call "get_base_and_disp" to decide which category of memory is used here. 0N/A // Apply peephole rule(s) to this instruction 0N/A // Top-level ideal Opcode matched 0N/A // Adds the label for the case 0N/A // Set the absolute address for methods 0N/A // Should we clone rather than spill this instruction? 0N/A // Get the pipeline info 0N/A virtual const char *
Name()
const = 0;
// Machine-specific name 0N/A//------------------------------MachIdealNode---------------------------- 0N/A// Machine specific versions of nodes that must be defined by user. 0N/A// These are not converted by matcher from ideal nodes to machine nodes 0N/A// but are inserted into the code by the compiler. 0N/A // Define the following defaults for non-matched machine nodes 0N/A//------------------------------MachTypeNode---------------------------- 0N/A// Machine Nodes that need to retain a known Type. 0N/A virtual uint size_of()
const {
return sizeof(*
this); }
// Size is bigger 0N/A//------------------------------MachBreakpointNode---------------------------- 0N/A// Machine breakpoint or interrupt Node 0N/A virtual const char *
Name()
const {
return "Breakpoint"; }
1915N/A//------------------------------MachConstantBaseNode-------------------------- 1915N/A// Machine node that represents the base address of the constant table. 1915N/A virtual const char*
Name()
const {
return "MachConstantBaseNode"; }
1915N/A//------------------------------MachConstantNode------------------------------- 1915N/A// Machine node that holds a constant which is stored in the constant table. 1915N/A // Input edge of MachConstantBaseNode. 0N/A//------------------------------MachUEPNode----------------------------------- 0N/A// Machine Unvalidated Entry Point Node 0N/A virtual const char *
Name()
const {
return "Unvalidated-Entry-Point"; }
0N/A//------------------------------MachPrologNode-------------------------------- 0N/A// Machine function Prolog Node 0N/A virtual const char *
Name()
const {
return "Prolog"; }
0N/A//------------------------------MachEpilogNode-------------------------------- 0N/A// Machine function Epilog Node 0N/A // Offset of safepoint from the beginning of the node 0N/A virtual const char *
Name()
const {
return "Epilog"; }
0N/A//------------------------------MachNopNode----------------------------------- 0N/A// Machine function Nop Node 0N/A virtual const char *
Name()
const {
return "Nop"; }
0N/A//------------------------------MachSpillCopyNode------------------------------ 0N/A// Machine SpillCopy Node. Copies 1 or 2 words from any location to any 0N/A// location (stack or register). 0N/A virtual const char *
Name()
const {
return "MachSpillCopy"; }
2678N/A//------------------------------MachBranchNode-------------------------------- 2678N/A// Abstract machine branch Node 2678N/A // Support for short branches 0N/A//------------------------------MachNullChkNode-------------------------------- 0N/A// Machine-dependent null-pointer-check Node. Points a real MachNode that is 0N/A// also some kind of memory op. Turns the indicated MachNode into a 0N/A// conditional branch with good latency on the ptr-not-null path and awful 0N/A// latency on the pointer-is-null path. 0N/A virtual const char *
Name()
const {
return "NullCheck"; }
0N/A//------------------------------MachProjNode---------------------------------- 0N/A// Machine-dependent Ideal projections (how is that for an oxymoron). Really 0N/A// just MachNodes made by the Ideal world that replicate simple projections 0N/A// but with machine-dependent input & output register masks. Generally 0N/A// produced as part of calling conventions. Normally I make MachNodes as part 0N/A// of the Matcher process, but the Matcher is ill suited to issues involving 0N/A// frame handling, so frame handling is all done in the Ideal world with 0N/A// occasional callbacks to the machine model for important info. 0N/A fat_proj =
999 // Projs killing many regs, defined by _rout 0N/A // Need size_of() for virtual ProjNode::clone() 0N/A//------------------------------MachIfNode------------------------------------- 0N/A// Machine-specific versions of IfNodes 0N/A virtual uint size_of()
const {
return sizeof(*
this); }
// Size is bigger 0N/A float _prob;
// Probability branch goes either way 2678N/A // Negate conditional branches. 2667N/A//------------------------------MachGotoNode----------------------------------- 2667N/A// Machine-specific versions of GotoNodes 0N/A//------------------------------MachFastLockNode------------------------------------- 0N/A// Machine-specific versions of FastLockNodes 0N/A virtual uint size_of()
const {
return sizeof(*
this); }
// Size is bigger 0N/A//------------------------------MachReturnNode-------------------------------- 0N/A// Machine-specific versions of subroutine returns 0N/A virtual bool pinned()
const {
return true; };
0N/A//------------------------------MachSafePointNode----------------------------- 0N/A// Machine-specific versions of safepoints 0N/A // Functionality from old debug nodes 0N/A//------------------------------MachCallNode---------------------------------- 0N/A// Machine-specific versions of subroutine calls 0N/A float _cnt;
// Estimate of number of times called 0N/A virtual bool pinned()
const {
return false; }
0N/A//------------------------------MachCallJavaNode------------------------------ 0N/A// "Base" class for machine-specific versions of subroutine calls 0N/A int _bci;
// Byte Code index of call byte code 0N/A//------------------------------MachCallStaticJavaNode------------------------ 0N/A// Machine-specific versions of monomorphic subroutine calls 0N/A const char *
_name;
// Runtime wrapper name 0N/A // If this is an uncommon trap, return the request code, else zero. 0N/A//------------------------------MachCallDynamicJavaNode------------------------ 0N/A// Machine-specific versions of possibly megamorphic subroutine calls 0N/A//------------------------------MachCallRuntimeNode---------------------------- 0N/A// Machine-specific versions of subroutine calls 0N/A const char *
_name;
// Printable name, if _method is NULL 0N/A//------------------------------MachHaltNode----------------------------------- 0N/A// Machine-specific versions of halt nodes 0N/A//------------------------------MachTempNode----------------------------------- 0N/A// Node used by the adlc to construct inputs to represent temporary registers 0N/A virtual const char *
Name()
const {
return "MachTemp";}
0N/A//------------------------------labelOper-------------------------------------- 0N/A// Machine-independent version of label operand 0N/A // Supported for fixed size branches 0N/A virtual const char *
Name()
const {
return "Label";}
0N/A//------------------------------methodOper-------------------------------------- 0N/A// Machine-independent version of method operand 0N/A virtual const char *
Name()
const {
return "Method";}
1879N/A#
endif // SHARE_VM_OPTO_MACHNODE_HPP