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*
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* accompanied this code).
*
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* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
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#ifndef SHARE_VM_OPTO_MACHNODE_HPP
#define SHARE_VM_OPTO_MACHNODE_HPP
#include "opto/callnode.hpp"
#include "opto/matcher.hpp"
#include "opto/multnode.hpp"
#include "opto/regmask.hpp"
class BufferBlob;
class CodeBuffer;
class JVMState;
class MachCallDynamicJavaNode;
class MachCallJavaNode;
class MachCallLeafNode;
class MachCallNode;
class MachCallRuntimeNode;
class MachCallStaticJavaNode;
class MachEpilogNode;
class MachIfNode;
class MachNullCheckNode;
class MachOper;
class MachProjNode;
class MachPrologNode;
class MachReturnNode;
class MachSafePointNode;
class MachSpillCopyNode;
class Matcher;
class PhaseRegAlloc;
class RegMask;
class State;
//---------------------------MachOper------------------------------------------
public:
// Allocate right next to the MachNodes in the same arena
// Opcode
// Number of input edges.
// Generally at least 1
// Array of Register masks
// Methods to output the encoding of the operand
// Negate conditional branches. Error for non-branch Nodes
virtual void negate();
// Return the value requested
// result register lookup, corresponding to int_format
// input register lookup, corresponding to ext_format
// helpers for MacroAssembler generation from ADLC
}
}
}
}
}
}
#endif
virtual bool constant_is_oop() const;
virtual TypeOopPtr *oop() const;
virtual int ccode() const;
// A zero, default, indicates this value is not needed.
// May need to lookup the base register, as done in int_ and ext_format
virtual int scale() const;
// Parameters needed to support MEMORY_INTERFACE access to stackSlot
// Check for PC-Relative displacement
virtual bool disp_is_oop() const;
virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
virtual int base_position() const; // base edge position, or -1
virtual int index_position() const; // index edge position, or -1
// Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
// Only returns non-null value for i486.ad's indOffset32X
// Return the label
// Return the method's address
// Hash and compare over operands are currently identical
// Virtual clone, since I do not know how big the MachOper is.
// Return ideal Type from simple operands. Fail for complex operands.
// Set an integer offset if we have one, or error otherwise
#ifndef PRODUCT
// Return name of operand
// Methods to output the text version of the operand
#endif
};
//------------------------------MachNode---------------------------------------
// Base type for all machine specific nodes. All node classes generated by the
// ADLC inherit from this class.
public:
}
// Required boilerplate
virtual int Opcode() const; // Always equal to MachNode
// Number of inputs which come before the first operand.
// Generally at least 1, to skip the Control input
// Copy inputs and operands to new node of instruction.
// Called from cisc_version() and short_branch_version().
// !!!! The method's body is defined in ad_<arch>.cpp file.
// Return an equivalent instruction using memory for cisc_operand position
// Modify this instruction's register mask to use stack version for cisc_operand
virtual void use_cisc_RegMask();
// Support for short branches
// Avoid back to back some instructions on some CPUs.
// instruction implemented with a call
// First index in _in[] corresponding to operand, or -1 if there is none
// Register class input is expected in
// cisc-spillable instructions redefine for use by in_RegMask
// If this instruction is a 2-address instruction, then return the
// index of the input which must match the output. Not nessecary
// for instructions which bind the input and output register to the
// same singleton regiser (e.g., Intel IDIV which binds AX to be
// both an input and an output). It is nessecary when the input and
// output have choices - but they must use the same choice.
// Array of complex operand pointers. Each corresponds to zero or
// more leafs. Must be set by MachNode constructor to point to an
// internal array of MachOpers. The MachOper array is sized by
// specific MachNodes described in the ADL.
// Emit bytes into cbuf
// Size of instruction in bytes
// Helper function that computes size by emitting code
// Return the alignment required (in units of relocInfo::addr_unit())
// for this instruction (must be a power of 2)
// Return the padding (in bytes) to be emitted before this
// instruction to properly align it.
// Return number of relocatable values contained in this instruction
virtual int reloc() const { return 0; }
// Hash and compare over operands. Used to do GVN on machine Nodes.
// Expand method for MachNode, replaces nodes representing pseudo
// instructions with a set of nodes which represent real machine
// instructions and compute the same value.
// Bottom_type call; value comes from operand0
virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; }
// If this is a memory op, return the base pointer and fixed offset.
// If there are no such, return NULL. If there are multiple addresses
// or the address is indeterminate (rare cases) then return (Node*)-1,
// which serves as node bottom.
// If the offset is not statically determined, set it to Type::OffsetBot.
// This method is free to ignore stack slots if that helps.
// Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
// Helper for get_base_and_disp: find the base and index input nodes.
// Returns the MachOper as determined by memory_operand(), for use, if
// needed by the caller. If (MachOper *)-1 is returned, base and index
// are set to NodeSentinel. If (MachOper *) NULL is returned, base and
// index are set to NULL.
// Helper for memory_inputs: Which operand carries the necessary info?
// By default, returns NULL, which means there is no such operand.
// If it returns (MachOper*)-1, this means there are multiple memories.
// Call "get_base_and_disp" to decide which category of memory is used here.
// Apply peephole rule(s) to this instruction
virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
// Top-level ideal Opcode matched
// Adds the label for the case
// Set the absolute address for methods
// Should we clone rather than spill this instruction?
bool rematerialize() const;
// Get the pipeline info
static const Pipeline *pipeline_class();
#ifndef PRODUCT
virtual const char *Name() const = 0; // Machine-specific name
#endif
};
//------------------------------MachIdealNode----------------------------
// Machine specific versions of nodes that must be defined by user.
// These are not converted by matcher from ideal nodes to machine nodes
// but are inserted into the code by the compiler.
public:
MachIdealNode( ) {}
// Define the following defaults for non-matched machine nodes
virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
};
//------------------------------MachTypeNode----------------------------
// Machine Nodes that need to retain a known Type.
public:
MachTypeNode( ) {}
#ifndef PRODUCT
#endif
};
//------------------------------MachBreakpointNode----------------------------
// Machine breakpoint or interrupt Node
public:
MachBreakpointNode( ) {}
#ifndef PRODUCT
#endif
};
//------------------------------MachConstantBaseNode--------------------------
// Machine node that represents the base address of the constant table.
public:
static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
public:
}
#ifndef PRODUCT
#endif
};
//------------------------------MachConstantNode-------------------------------
// Machine node that holds a constant which is stored in the constant table.
protected:
public:
}
#ifdef ASSERT
dump();
#endif
}
if (idx == mach_constant_base_node_input())
return MachConstantBaseNode::static_out_RegMask();
}
// Input edge of MachConstantBaseNode.
int constant_offset();
};
//------------------------------MachUEPNode-----------------------------------
// Machine Unvalidated Entry Point Node
public:
MachUEPNode( ) {}
#ifndef PRODUCT
#endif
};
//------------------------------MachPrologNode--------------------------------
// Machine function Prolog Node
public:
MachPrologNode( ) {}
virtual int reloc() const;
#ifndef PRODUCT
#endif
};
//------------------------------MachEpilogNode--------------------------------
// Machine function Epilog Node
public:
virtual int reloc() const;
private:
bool _do_polling;
public:
// Offset of safepoint from the beginning of the node
int safepoint_offset() const;
#ifndef PRODUCT
#endif
};
//------------------------------MachNopNode-----------------------------------
// Machine function Nop Node
private:
int _count;
public:
#ifndef PRODUCT
#endif
};
//------------------------------MachSpillCopyNode------------------------------
// Machine SpillCopy Node. Copies 1 or 2 words from any location to any
// location (stack or register).
public:
add_req(n);
}
#ifndef PRODUCT
#endif
};
//------------------------------MachBranchNode--------------------------------
// Abstract machine branch Node
public:
}
// Support for short branches
virtual bool pinned() const { return true; };
};
//------------------------------MachNullChkNode--------------------------------
// Machine-dependent null-pointer-check Node. Points a real MachNode that is
// also some kind of memory op. Turns the indicated MachNode into a
// conditional branch with good latency on the ptr-not-null path and awful
// latency on the pointer-is-null path.
public:
}
virtual void negate() { }
#ifndef PRODUCT
#endif
};
//------------------------------MachProjNode----------------------------------
// Machine-dependent Ideal projections (how is that for an oxymoron). Really
// just MachNodes made by the Ideal world that replicate simple projections
// but with machine-dependent input & output register masks. Generally
// produced as part of calling conventions. Normally I make MachNodes as part
// of the Matcher process, but the Matcher is ill suited to issues involving
// frame handling, so frame handling is all done in the Ideal world with
// occasional callbacks to the machine model for important info.
public:
MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
}
enum projType {
};
virtual int Opcode() const;
virtual const Type *bottom_type() const;
// Need size_of() for virtual ProjNode::clone()
#ifndef PRODUCT
#endif
};
//------------------------------MachIfNode-------------------------------------
// Machine-specific versions of IfNodes
public:
}
// Negate conditional branches.
virtual void negate() = 0;
#ifndef PRODUCT
#endif
};
//------------------------------MachGotoNode-----------------------------------
// Machine-specific versions of GotoNodes
public:
}
};
//------------------------------MachFastLockNode-------------------------------------
// Machine-specific versions of FastLockNodes
public:
};
//------------------------------MachReturnNode--------------------------------
// Machine-specific versions of subroutine returns
public:
}
virtual bool pinned() const { return true; };
};
//------------------------------MachSafePointNode-----------------------------
// Machine-specific versions of safepoints
public:
}
_jvms = s;
}
virtual const Type *bottom_type() const;
// Functionality from old debug nodes
}
}
}
}
}
}
}
};
//------------------------------MachCallNode----------------------------------
// Machine-specific versions of subroutine calls
protected:
public:
}
virtual const Type *bottom_type() const;
virtual bool pinned() const { return false; }
virtual int ret_addr_offset() { return 0; }
bool return_value_is_used() const;
#ifndef PRODUCT
#endif
};
//------------------------------MachCallJavaNode------------------------------
// "Base" class for machine-specific versions of subroutine calls
protected:
public:
}
#ifndef PRODUCT
#endif
};
//------------------------------MachCallStaticJavaNode------------------------
// Machine-specific versions of monomorphic subroutine calls
public:
}
// If this is an uncommon trap, return the request code, else zero.
int uncommon_trap_request() const;
virtual int ret_addr_offset();
#ifndef PRODUCT
#endif
};
//------------------------------MachCallDynamicJavaNode------------------------
// Machine-specific versions of possibly megamorphic subroutine calls
public:
int _vtable_index;
}
virtual int ret_addr_offset();
#ifndef PRODUCT
#endif
};
//------------------------------MachCallRuntimeNode----------------------------
// Machine-specific versions of subroutine calls
public:
}
virtual int ret_addr_offset();
#ifndef PRODUCT
#endif
};
public:
}
};
//------------------------------MachHaltNode-----------------------------------
// Machine-specific versions of halt nodes
public:
};
//------------------------------MachTempNode-----------------------------------
// Node used by the adlc to construct inputs to represent temporary registers
private:
public:
_num_opnds = 1;
}
#ifndef PRODUCT
#endif
};
//------------------------------labelOper--------------------------------------
// Machine-independent version of label operand
private:
public:
// Supported for fixed size branches
#ifndef PRODUCT
virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
#endif
};
//------------------------------methodOper--------------------------------------
// Machine-independent version of method operand
private:
public:
#ifndef PRODUCT
virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
#endif
};
#endif // SHARE_VM_OPTO_MACHNODE_HPP