c1_LinearScan.cpp revision 1297
0N/A/*
3157N/A * Copyright 2005-2009 Sun Microsystems, Inc. All Rights Reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
1472N/A * CA 95054 USA or visit www.sun.com if you need additional information or
1472N/A * have any questions.
0N/A *
0N/A */
0N/A
1879N/A#include "incls/_precompiled.incl"
1879N/A#include "incls/_c1_LinearScan.cpp.incl"
4141N/A
4141N/A
4141N/A#ifndef PRODUCT
4141N/A
1879N/A static LinearScanStatistic _stat_before_alloc;
4359N/A static LinearScanStatistic _stat_after_asign;
1879N/A static LinearScanStatistic _stat_final;
1879N/A
1879N/A static LinearScanTimers _total_timer;
2845N/A
1879N/A // helper macro for short definition of timer
1879N/A #define TIME_LINEAR_SCAN(timer_name) TraceTime _block_timer("", _total_timer.timer(LinearScanTimers::timer_name), TimeLinearScan || TimeEachLinearScan, Verbose);
1879N/A
1879N/A // helper macro for short definition of trace-output inside code
1879N/A #define TRACE_LINEAR_SCAN(level, code) \
1879N/A if (TraceLinearScanLevel >= level) { \
1879N/A code; \
1879N/A }
1879N/A
1879N/A#else
1879N/A
2796N/A #define TIME_LINEAR_SCAN(timer_name)
2796N/A #define TRACE_LINEAR_SCAN(level, code)
2796N/A
0N/A#endif
0N/A
0N/A// Map BasicType to spill size in 32-bit words, matching VMReg's notion of words
0N/A#ifdef _LP64
0N/Astatic int type2spill_size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 2, 2, 0, 1, -1};
0N/A#else
481N/Astatic int type2spill_size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 1, 1, 0, 1, -1};
481N/A#endif
3157N/A
3157N/A
3157N/A// Implementation of LinearScan
3157N/A
3157N/ALinearScan::LinearScan(IR* ir, LIRGenerator* gen, FrameMap* frame_map)
3157N/A : _compilation(ir->compilation())
3157N/A , _ir(ir)
3157N/A , _gen(gen)
3157N/A , _frame_map(frame_map)
3157N/A , _num_virtual_regs(gen->max_virtual_register_number())
3157N/A , _has_fpu_registers(false)
3233N/A , _num_calls(-1)
3157N/A , _max_spills(0)
3157N/A , _unused_spill_slot(-1)
3157N/A , _intervals(0) // initialized later with correct length
3157N/A , _new_intervals_from_allocation(new IntervalList())
3157N/A , _sorted_intervals(NULL)
3157N/A , _lir_ops(0) // initialized later with correct length
3157N/A , _block_of_op(0) // initialized later with correct length
3233N/A , _has_info(0)
3157N/A , _has_call(0)
3233N/A , _scope_value_cache(0) // initialized later with correct length
3157N/A , _interval_in_loop(0, 0) // initialized later with correct length
3157N/A , _cached_blocks(*ir->linear_scan_order())
3157N/A#ifdef X86
4141N/A , _fpu_stack_allocator(NULL)
4141N/A#endif
4141N/A{
4141N/A // note: to use more than on instance of LinearScan at a time this function call has to
4141N/A // be moved somewhere outside of this constructor:
4141N/A Interval::initialize();
4141N/A
4141N/A assert(this->ir() != NULL, "check if valid");
4141N/A assert(this->compilation() != NULL, "check if valid");
4141N/A assert(this->gen() != NULL, "check if valid");
4141N/A assert(this->frame_map() != NULL, "check if valid");
4141N/A}
4141N/A
4141N/A
4141N/A// ********** functions for converting LIR-Operands to register numbers
4141N/A//
4141N/A// Emulate a flat register file comprising physical integer registers,
4141N/A// physical floating-point registers and virtual registers, in that order.
4141N/A// Virtual registers already have appropriate numbers, since V0 is
4141N/A// the number of physical registers.
4141N/A// Returns -1 for hi word if opr is a single word operand.
4141N/A//
4141N/A// Note: the inverse operation (calculating an operand for register numbers)
4141N/A// is done in calc_operand_for_interval()
4141N/A
4141N/Aint LinearScan::reg_num(LIR_Opr opr) {
4141N/A assert(opr->is_register(), "should not call this otherwise");
4141N/A
4141N/A if (opr->is_virtual_register()) {
4141N/A assert(opr->vreg_number() >= nof_regs, "found a virtual register with a fixed-register number");
4141N/A return opr->vreg_number();
4141N/A } else if (opr->is_single_cpu()) {
4141N/A return opr->cpu_regnr();
4141N/A } else if (opr->is_double_cpu()) {
4141N/A return opr->cpu_regnrLo();
4141N/A#ifdef X86
4141N/A } else if (opr->is_single_xmm()) {
4141N/A return opr->fpu_regnr() + pd_first_xmm_reg;
4141N/A } else if (opr->is_double_xmm()) {
4141N/A return opr->fpu_regnrLo() + pd_first_xmm_reg;
4141N/A#endif
4141N/A } else if (opr->is_single_fpu()) {
4141N/A return opr->fpu_regnr() + pd_first_fpu_reg;
4141N/A } else if (opr->is_double_fpu()) {
4141N/A return opr->fpu_regnrLo() + pd_first_fpu_reg;
4141N/A } else {
4141N/A ShouldNotReachHere();
4141N/A return -1;
4141N/A }
4141N/A}
4141N/A
0N/Aint LinearScan::reg_numHi(LIR_Opr opr) {
0N/A assert(opr->is_register(), "should not call this otherwise");
1753N/A
1753N/A if (opr->is_virtual_register()) {
481N/A return -1;
481N/A } else if (opr->is_single_cpu()) {
481N/A return -1;
481N/A } else if (opr->is_double_cpu()) { Error!

 

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java.lang.NullPointerException