0N/A/*
3845N/A * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
0N/A// FORMS.CPP - Definitions for ADL Parser Forms Classes
0N/A#include "adlc.hpp"
0N/A
0N/A//==============================Register Allocation============================
0N/Aint RegisterForm::_reg_ctr = 0;
0N/A
0N/A//------------------------------RegisterForm-----------------------------------
0N/A// Constructor
0N/ARegisterForm::RegisterForm()
0N/A : _regDef(cmpstr,hashstr, Form::arena),
0N/A _regClass(cmpstr,hashstr, Form::arena),
0N/A _allocClass(cmpstr,hashstr, Form::arena) {
0N/A}
0N/ARegisterForm::~RegisterForm() {
0N/A}
0N/A
0N/A// record a new register definition
0N/Avoid RegisterForm::addRegDef(char *name, char *callingConv, char *c_conv,
0N/A char *idealtype, char *encoding, char* concrete) {
0N/A RegDef *regDef = new RegDef(name, callingConv, c_conv, idealtype, encoding, concrete);
0N/A _rdefs.addName(name);
0N/A _regDef.Insert(name,regDef);
0N/A}
0N/A
0N/A// record a new register class
0N/ARegClass *RegisterForm::addRegClass(const char *className) {
0N/A RegClass *regClass = new RegClass(className);
0N/A _rclasses.addName(className);
0N/A _regClass.Insert(className,regClass);
0N/A return regClass;
0N/A}
0N/A
0N/A// record a new register class
0N/AAllocClass *RegisterForm::addAllocClass(char *className) {
0N/A AllocClass *allocClass = new AllocClass(className);
0N/A _aclasses.addName(className);
0N/A _allocClass.Insert(className,allocClass);
0N/A return allocClass;
0N/A}
0N/A
0N/A// Called after parsing the Register block. Record the register class
0N/A// for spill-slots/regs.
0N/Avoid RegisterForm::addSpillRegClass() {
0N/A // Stack slots start at the next available even register number.
3845N/A _reg_ctr = (_reg_ctr+7) & ~7;
0N/A const char *rc_name = "stack_slots";
0N/A RegClass *reg_class = new RegClass(rc_name);
0N/A reg_class->_stack_or_reg = true;
0N/A _rclasses.addName(rc_name);
0N/A _regClass.Insert(rc_name,reg_class);
0N/A}
0N/A
0N/A
0N/A// Provide iteration over all register definitions
0N/A// in the order used by the register allocator
0N/Avoid RegisterForm::reset_RegDefs() {
0N/A _current_ac = NULL;
0N/A _aclasses.reset();
0N/A}
0N/A
0N/ARegDef *RegisterForm::iter_RegDefs() {
0N/A // Check if we need to get the next AllocClass
0N/A if ( _current_ac == NULL ) {
0N/A const char *ac_name = _aclasses.iter();
0N/A if( ac_name == NULL ) return NULL; // No more allocation classes
0N/A _current_ac = (AllocClass*)_allocClass[ac_name];
0N/A _current_ac->_regDefs.reset();
0N/A assert( _current_ac != NULL, "Name must match an allocation class");
0N/A }
0N/A
0N/A const char *rd_name = _current_ac->_regDefs.iter();
0N/A if( rd_name == NULL ) {
0N/A // At end of this allocation class, check the next
0N/A _current_ac = NULL;
0N/A return iter_RegDefs();
0N/A }
0N/A RegDef *reg_def = (RegDef*)_current_ac->_regDef[rd_name];
0N/A assert( reg_def != NULL, "Name must match a register definition");
0N/A return reg_def;
0N/A}
0N/A
0N/A// return the register definition with name 'regName'
0N/ARegDef *RegisterForm::getRegDef(const char *regName) {
0N/A RegDef *regDef = (RegDef*)_regDef[regName];
0N/A return regDef;
0N/A}
0N/A
0N/A// return the register class with name 'className'
0N/ARegClass *RegisterForm::getRegClass(const char *className) {
0N/A RegClass *regClass = (RegClass*)_regClass[className];
0N/A return regClass;
0N/A}
0N/A
0N/A
0N/A// Check that register classes are compatible with chunks
0N/Abool RegisterForm::verify() {
0N/A bool valid = true;
0N/A
0N/A // Verify Register Classes
0N/A // check that each register class contains registers from one chunk
0N/A const char *rc_name = NULL;
0N/A _rclasses.reset();
0N/A while ( (rc_name = _rclasses.iter()) != NULL ) {
0N/A // Check the chunk value for all registers in this class
0N/A RegClass *reg_class = getRegClass(rc_name);
0N/A assert( reg_class != NULL, "InternalError() no matching register class");
0N/A } // end of RegClasses
0N/A
0N/A // Verify that every register has been placed into an allocation class
0N/A RegDef *reg_def = NULL;
0N/A reset_RegDefs();
0N/A uint num_register_zero = 0;
0N/A while ( (reg_def = iter_RegDefs()) != NULL ) {
0N/A if( reg_def->register_num() == 0 ) ++num_register_zero;
0N/A }
0N/A if( num_register_zero > 1 ) {
0N/A fprintf(stderr,
0N/A "ERROR: More than one register has been assigned register-number 0.\n"
0N/A "Probably because a register has not been entered into an allocation class.\n");
0N/A }
0N/A
0N/A return valid;
0N/A}
0N/A
0N/A// Compute RegMask size
0N/Aint RegisterForm::RegMask_Size() {
0N/A // Need at least this many words
0N/A int words_for_regs = (_reg_ctr + 31)>>5;
3845N/A // The array of Register Mask bits should be large enough to cover
3845N/A // all the machine registers and all parameters that need to be passed
3845N/A // on the stack (stack registers) up to some interesting limit. Methods
3845N/A // that need more parameters will NOT be compiled. On Intel, the limit
3845N/A // is something like 90+ parameters.
3845N/A // Add a few (3 words == 96 bits) for incoming & outgoing arguments to calls.
0N/A // Round up to the next doubleword size.
3845N/A return (words_for_regs + 3 + 1) & ~1;
0N/A}
0N/A
0N/Avoid RegisterForm::dump() { // Debug printer
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid RegisterForm::output(FILE *fp) { // Write info to output files
0N/A const char *name;
0N/A fprintf(fp,"\n");
0N/A fprintf(fp,"-------------------- Dump RegisterForm --------------------\n");
0N/A for(_rdefs.reset(); (name = _rdefs.iter()) != NULL;) {
0N/A ((RegDef*)_regDef[name])->output(fp);
0N/A }
0N/A fprintf(fp,"\n");
0N/A for (_rclasses.reset(); (name = _rclasses.iter()) != NULL;) {
0N/A ((RegClass*)_regClass[name])->output(fp);
0N/A }
0N/A fprintf(fp,"\n");
0N/A for (_aclasses.reset(); (name = _aclasses.iter()) != NULL;) {
0N/A ((AllocClass*)_allocClass[name])->output(fp);
0N/A }
0N/A fprintf(fp,"-------------------- end RegisterForm --------------------\n");
0N/A}
0N/A
0N/A//------------------------------RegDef-----------------------------------------
0N/A// Constructor
0N/ARegDef::RegDef(char *regname, char *callconv, char *c_conv, char * idealtype, char * encode, char * concrete)
0N/A : _regname(regname), _callconv(callconv), _c_conv(c_conv),
0N/A _idealtype(idealtype),
0N/A _register_encode(encode),
0N/A _concrete(concrete),
0N/A _register_num(0) {
0N/A
0N/A // Chunk and register mask are determined by the register number
0N/A // _register_num is set when registers are added to an allocation class
0N/A}
0N/ARegDef::~RegDef() { // Destructor
0N/A}
0N/A
0N/Avoid RegDef::set_register_num(uint32 register_num) {
0N/A _register_num = register_num;
0N/A}
0N/A
0N/A// Bit pattern used for generating machine code
0N/Aconst char* RegDef::register_encode() const {
0N/A return _register_encode;
0N/A}
0N/A
0N/A// Register number used in machine-independent code
0N/Auint32 RegDef::register_num() const {
0N/A return _register_num;
0N/A}
0N/A
0N/Avoid RegDef::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid RegDef::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"RegDef: %s (%s) encode as %s using number %d\n",
0N/A _regname, (_callconv?_callconv:""), _register_encode, _register_num);
0N/A fprintf(fp,"\n");
0N/A}
0N/A
0N/A
0N/A//------------------------------RegClass---------------------------------------
0N/A// Construct a register class into which registers will be inserted
2964N/ARegClass::RegClass(const char *classid) : _stack_or_reg(false), _classid(classid), _regDef(cmpstr,hashstr, Form::arena),
2964N/A _user_defined(NULL)
2964N/A{
0N/A}
0N/A
0N/A// record a register in this class
0N/Avoid RegClass::addReg(RegDef *regDef) {
0N/A _regDefs.addName(regDef->_regname);
0N/A _regDef.Insert((void*)regDef->_regname, regDef);
0N/A}
0N/A
0N/A// Number of registers in class
0N/Auint RegClass::size() const {
0N/A return _regDef.Size();
0N/A}
0N/A
0N/Aconst RegDef *RegClass::get_RegDef(const char *rd_name) const {
0N/A return (const RegDef*)_regDef[rd_name];
0N/A}
0N/A
0N/Avoid RegClass::reset() {
0N/A _regDefs.reset();
0N/A}
0N/A
0N/Aconst char *RegClass::rd_name_iter() {
0N/A return _regDefs.iter();
0N/A}
0N/A
0N/ARegDef *RegClass::RegDef_iter() {
0N/A const char *rd_name = rd_name_iter();
0N/A RegDef *reg_def = rd_name ? (RegDef*)_regDef[rd_name] : NULL;
0N/A return reg_def;
0N/A}
0N/A
0N/Aconst RegDef* RegClass::find_first_elem() {
0N/A const RegDef* first = NULL;
0N/A const RegDef* def = NULL;
0N/A
0N/A reset();
0N/A while ((def = RegDef_iter()) != NULL) {
0N/A if (first == NULL || def->register_num() < first->register_num()) {
0N/A first = def;
0N/A }
0N/A }
0N/A
0N/A assert(first != NULL, "empty mask?");
0N/A return first;;
0N/A}
0N/A
0N/A// Collect all the registers in this register-word. One bit per register.
0N/Aint RegClass::regs_in_word( int wordnum, bool stack_also ) {
0N/A int word = 0;
0N/A const char *name;
0N/A for(_regDefs.reset(); (name = _regDefs.iter()) != NULL;) {
0N/A int rnum = ((RegDef*)_regDef[name])->register_num();
0N/A if( (rnum >> 5) == wordnum )
603N/A word |= (1 << (rnum & 31));
0N/A }
0N/A if( stack_also ) {
0N/A // Now also collect stack bits
0N/A for( int i = 0; i < 32; i++ )
0N/A if( wordnum*32+i >= RegisterForm::_reg_ctr )
603N/A word |= (1 << i);
0N/A }
0N/A
0N/A return word;
0N/A}
0N/A
0N/Avoid RegClass::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid RegClass::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"RegClass: %s\n",_classid);
0N/A const char *name;
0N/A for(_regDefs.reset(); (name = _regDefs.iter()) != NULL;) {
0N/A ((RegDef*)_regDef[name])->output(fp);
0N/A }
0N/A fprintf(fp,"--- done with entries for reg_class %s\n\n",_classid);
0N/A}
0N/A
0N/A
0N/A//------------------------------AllocClass-------------------------------------
0N/AAllocClass::AllocClass(char *classid) : _classid(classid), _regDef(cmpstr,hashstr, Form::arena) {
0N/A}
0N/A
0N/A// record a register in this class
0N/Avoid AllocClass::addReg(RegDef *regDef) {
0N/A assert( regDef != NULL, "Can not add a NULL to an allocation class");
0N/A regDef->set_register_num( RegisterForm::_reg_ctr++ );
0N/A // Add regDef to this allocation class
0N/A _regDefs.addName(regDef->_regname);
0N/A _regDef.Insert((void*)regDef->_regname, regDef);
0N/A}
0N/A
0N/Avoid AllocClass::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid AllocClass::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"AllocClass: %s \n",_classid);
0N/A const char *name;
0N/A for(_regDefs.reset(); (name = _regDefs.iter()) != NULL;) {
0N/A ((RegDef*)_regDef[name])->output(fp);
0N/A }
0N/A fprintf(fp,"--- done with entries for alloc_class %s\n\n",_classid);
0N/A}
0N/A
0N/A//==============================Frame Handling=================================
0N/A//------------------------------FrameForm--------------------------------------
0N/AFrameForm::FrameForm() {
0N/A _frame_pointer = NULL;
0N/A _c_frame_pointer = NULL;
0N/A _alignment = NULL;
0N/A _return_addr = NULL;
0N/A _c_return_addr = NULL;
0N/A _in_preserve_slots = NULL;
0N/A _varargs_C_out_slots_killed = NULL;
0N/A _calling_convention = NULL;
0N/A _c_calling_convention = NULL;
0N/A _return_value = NULL;
0N/A _c_return_value = NULL;
0N/A _interpreter_frame_pointer_reg = NULL;
0N/A}
0N/A
0N/AFrameForm::~FrameForm() {
0N/A}
0N/A
0N/Avoid FrameForm::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid FrameForm::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"\nFrame:\n");
0N/A}
0N/A
0N/A//==============================Scheduling=====================================
0N/A//------------------------------PipelineForm-----------------------------------
0N/APipelineForm::PipelineForm()
0N/A : _reslist ()
0N/A , _resdict (cmpstr, hashstr, Form::arena)
0N/A , _classdict (cmpstr, hashstr, Form::arena)
0N/A , _rescount (0)
0N/A , _maxcycleused (0)
0N/A , _stages ()
0N/A , _stagecnt (0)
0N/A , _classlist ()
0N/A , _classcnt (0)
0N/A , _noplist ()
0N/A , _nopcnt (0)
0N/A , _variableSizeInstrs (false)
0N/A , _branchHasDelaySlot (false)
0N/A , _maxInstrsPerBundle (0)
0N/A , _maxBundlesPerCycle (1)
0N/A , _instrUnitSize (0)
0N/A , _bundleUnitSize (0)
0N/A , _instrFetchUnitSize (0)
0N/A , _instrFetchUnits (0) {
0N/A}
0N/APipelineForm::~PipelineForm() {
0N/A}
0N/A
0N/Avoid PipelineForm::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PipelineForm::output(FILE *fp) { // Write info to output files
0N/A const char *res;
0N/A const char *stage;
0N/A const char *cls;
0N/A const char *nop;
0N/A int count = 0;
0N/A
0N/A fprintf(fp,"\nPipeline:");
0N/A if (_variableSizeInstrs)
0N/A if (_instrUnitSize > 0)
0N/A fprintf(fp," variable-sized instructions in %d byte units", _instrUnitSize);
0N/A else
0N/A fprintf(fp," variable-sized instructions");
0N/A else
0N/A if (_instrUnitSize > 0)
0N/A fprintf(fp," fixed-sized instructions of %d bytes", _instrUnitSize);
0N/A else if (_bundleUnitSize > 0)
0N/A fprintf(fp," fixed-sized bundles of %d bytes", _bundleUnitSize);
0N/A else
0N/A fprintf(fp," fixed-sized instructions");
0N/A if (_branchHasDelaySlot)
0N/A fprintf(fp,", branch has delay slot");
0N/A if (_maxInstrsPerBundle > 0)
0N/A fprintf(fp,", max of %d instruction%s in parallel",
0N/A _maxInstrsPerBundle, _maxInstrsPerBundle > 1 ? "s" : "");
0N/A if (_maxBundlesPerCycle > 0)
0N/A fprintf(fp,", max of %d bundle%s in parallel",
0N/A _maxBundlesPerCycle, _maxBundlesPerCycle > 1 ? "s" : "");
0N/A if (_instrFetchUnitSize > 0 && _instrFetchUnits)
0N/A fprintf(fp, ", fetch %d x % d bytes per cycle", _instrFetchUnits, _instrFetchUnitSize);
0N/A
0N/A fprintf(fp,"\nResource:");
0N/A for ( _reslist.reset(); (res = _reslist.iter()) != NULL; )
0N/A fprintf(fp," %s(0x%08x)", res, _resdict[res]->is_resource()->mask());
0N/A fprintf(fp,"\n");
0N/A
0N/A fprintf(fp,"\nDescription:\n");
0N/A for ( _stages.reset(); (stage = _stages.iter()) != NULL; )
0N/A fprintf(fp," %s(%d)", stage, count++);
0N/A fprintf(fp,"\n");
0N/A
0N/A fprintf(fp,"\nClasses:\n");
0N/A for ( _classlist.reset(); (cls = _classlist.iter()) != NULL; )
0N/A _classdict[cls]->is_pipeclass()->output(fp);
0N/A
0N/A fprintf(fp,"\nNop Instructions:");
0N/A for ( _noplist.reset(); (nop = _noplist.iter()) != NULL; )
0N/A fprintf(fp, " \"%s\"", nop);
0N/A fprintf(fp,"\n");
0N/A}
0N/A
0N/A
0N/A//------------------------------ResourceForm-----------------------------------
0N/AResourceForm::ResourceForm(unsigned resmask)
0N/A: _resmask(resmask) {
0N/A}
0N/AResourceForm::~ResourceForm() {
0N/A}
0N/A
0N/AResourceForm *ResourceForm::is_resource() const {
0N/A return (ResourceForm *)(this);
0N/A}
0N/A
0N/Avoid ResourceForm::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid ResourceForm::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp, "resource: 0x%08x;\n", mask());
0N/A}
0N/A
0N/A
0N/A//------------------------------PipeClassOperandForm----------------------------------
0N/A
0N/Avoid PipeClassOperandForm::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PipeClassOperandForm::output(FILE *fp) { // Write info to output files
0N/A fprintf(stderr,"PipeClassOperandForm: %s", _stage);
0N/A fflush(stderr);
0N/A if (_more_instrs > 0)
0N/A fprintf(stderr,"+%d", _more_instrs);
0N/A fprintf(stderr," (%s)\n", _iswrite ? "write" : "read");
0N/A fflush(stderr);
0N/A fprintf(fp,"PipeClassOperandForm: %s", _stage);
0N/A if (_more_instrs > 0)
0N/A fprintf(fp,"+%d", _more_instrs);
0N/A fprintf(fp," (%s)\n", _iswrite ? "write" : "read");
0N/A}
0N/A
0N/A
0N/A//------------------------------PipeClassResourceForm----------------------------------
0N/A
0N/Avoid PipeClassResourceForm::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PipeClassResourceForm::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"PipeClassResourceForm: %s at stage %s for %d cycles\n",
0N/A _resource, _stage, _cycles);
0N/A}
0N/A
0N/A
0N/A//------------------------------PipeClassForm----------------------------------
0N/APipeClassForm::PipeClassForm(const char *id, int num)
0N/A : _ident(id)
0N/A , _num(num)
0N/A , _localNames(cmpstr, hashstr, Form::arena)
0N/A , _localUsage(cmpstr, hashstr, Form::arena)
0N/A , _has_fixed_latency(0)
0N/A , _fixed_latency(0)
0N/A , _instruction_count(0)
0N/A , _has_multiple_bundles(false)
0N/A , _has_branch_delay_slot(false)
0N/A , _force_serialization(false)
0N/A , _may_have_no_code(false) {
0N/A}
0N/A
0N/APipeClassForm::~PipeClassForm() {
0N/A}
0N/A
0N/APipeClassForm *PipeClassForm::is_pipeclass() const {
0N/A return (PipeClassForm *)(this);
0N/A}
0N/A
0N/Avoid PipeClassForm::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PipeClassForm::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"PipeClassForm: #%03d", _num);
0N/A if (_ident)
0N/A fprintf(fp," \"%s\":", _ident);
0N/A if (_has_fixed_latency)
0N/A fprintf(fp," latency %d", _fixed_latency);
0N/A if (_force_serialization)
0N/A fprintf(fp, ", force serialization");
0N/A if (_may_have_no_code)
0N/A fprintf(fp, ", may have no code");
0N/A fprintf(fp, ", %d instruction%s\n", InstructionCount(), InstructionCount() != 1 ? "s" : "");
0N/A}
0N/A
0N/A
0N/A//==============================Peephole Optimization==========================
0N/Aint Peephole::_peephole_counter = 0;
0N/A//------------------------------Peephole---------------------------------------
0N/APeephole::Peephole() : _match(NULL), _constraint(NULL), _replace(NULL), _next(NULL) {
0N/A _peephole_number = _peephole_counter++;
0N/A}
0N/APeephole::~Peephole() {
0N/A}
0N/A
0N/A// Append a peephole rule with the same root instruction
0N/Avoid Peephole::append_peephole(Peephole *next_peephole) {
0N/A if( _next == NULL ) {
0N/A _next = next_peephole;
0N/A } else {
0N/A _next->append_peephole( next_peephole );
0N/A }
0N/A}
0N/A
0N/A// Store the components of this peephole rule
0N/Avoid Peephole::add_match(PeepMatch *match) {
0N/A assert( _match == NULL, "fatal()" );
0N/A _match = match;
0N/A}
0N/A
0N/Avoid Peephole::append_constraint(PeepConstraint *next_constraint) {
0N/A if( _constraint == NULL ) {
0N/A _constraint = next_constraint;
0N/A } else {
0N/A _constraint->append( next_constraint );
0N/A }
0N/A}
0N/A
0N/Avoid Peephole::add_replace(PeepReplace *replace) {
0N/A assert( _replace == NULL, "fatal()" );
0N/A _replace = replace;
0N/A}
0N/A
0N/A// class Peephole accessor methods are in the declaration.
0N/A
0N/A
0N/Avoid Peephole::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid Peephole::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"Peephole:\n");
0N/A if( _match != NULL ) _match->output(fp);
0N/A if( _constraint != NULL ) _constraint->output(fp);
0N/A if( _replace != NULL ) _replace->output(fp);
0N/A // Output the next entry
0N/A if( _next ) _next->output(fp);
0N/A}
0N/A
0N/A//------------------------------PeepMatch--------------------------------------
0N/APeepMatch::PeepMatch(char *rule) : _max_position(0), _rule(rule) {
0N/A}
0N/APeepMatch::~PeepMatch() {
0N/A}
0N/A
0N/A
0N/A// Insert info into the match-rule
0N/Avoid PeepMatch::add_instruction(int parent, int position, const char *name,
0N/A int input) {
0N/A if( position > _max_position ) _max_position = position;
0N/A
603N/A _parent.addName((char*) (intptr_t) parent);
603N/A _position.addName((char*) (intptr_t) position);
0N/A _instrs.addName(name);
603N/A _input.addName((char*) (intptr_t) input);
0N/A}
0N/A
0N/A// Access info about instructions in the peep-match rule
0N/Aint PeepMatch::max_position() {
0N/A return _max_position;
0N/A}
0N/A
603N/Aconst char *PeepMatch::instruction_name(int position) {
0N/A return _instrs.name(position);
0N/A}
0N/A
0N/A// Iterate through all info on matched instructions
0N/Avoid PeepMatch::reset() {
0N/A _parent.reset();
0N/A _position.reset();
0N/A _instrs.reset();
0N/A _input.reset();
0N/A}
0N/A
603N/Avoid PeepMatch::next_instruction(int &parent, int &position, const char* &name, int &input) {
603N/A parent = (int) (intptr_t) _parent.iter();
603N/A position = (int) (intptr_t) _position.iter();
0N/A name = _instrs.iter();
603N/A input = (int) (intptr_t) _input.iter();
0N/A}
0N/A
0N/A// 'true' if current position in iteration is a placeholder, not matched.
0N/Abool PeepMatch::is_placeholder() {
0N/A return _instrs.current_is_signal();
0N/A}
0N/A
0N/A
0N/Avoid PeepMatch::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PeepMatch::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"PeepMatch:\n");
0N/A}
0N/A
0N/A//------------------------------PeepConstraint---------------------------------
603N/APeepConstraint::PeepConstraint(int left_inst, char* left_op, char* relation,
603N/A int right_inst, char* right_op)
0N/A : _left_inst(left_inst), _left_op(left_op), _relation(relation),
0N/A _right_inst(right_inst), _right_op(right_op), _next(NULL) {}
0N/APeepConstraint::~PeepConstraint() {
0N/A}
0N/A
0N/A// Check if constraints use instruction at position
603N/Abool PeepConstraint::constrains_instruction(int position) {
0N/A // Check local instruction constraints
0N/A if( _left_inst == position ) return true;
0N/A if( _right_inst == position ) return true;
0N/A
0N/A // Check remaining constraints in list
0N/A if( _next == NULL ) return false;
0N/A else return _next->constrains_instruction(position);
0N/A}
0N/A
0N/A// Add another constraint
0N/Avoid PeepConstraint::append(PeepConstraint *next_constraint) {
0N/A if( _next == NULL ) {
0N/A _next = next_constraint;
0N/A } else {
0N/A _next->append( next_constraint );
0N/A }
0N/A}
0N/A
0N/A// Access the next constraint in the list
0N/APeepConstraint *PeepConstraint::next() {
0N/A return _next;
0N/A}
0N/A
0N/A
0N/Avoid PeepConstraint::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PeepConstraint::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"PeepConstraint:\n");
0N/A}
0N/A
0N/A//------------------------------PeepReplace------------------------------------
0N/APeepReplace::PeepReplace(char *rule) : _rule(rule) {
0N/A}
0N/APeepReplace::~PeepReplace() {
0N/A}
0N/A
0N/A// Add contents of peepreplace
0N/Avoid PeepReplace::add_instruction(char *root) {
0N/A _instruction.addName(root);
0N/A _operand_inst_num.add_signal();
0N/A _operand_op_name.add_signal();
0N/A}
0N/Avoid PeepReplace::add_operand( int inst_num, char *inst_operand ) {
0N/A _instruction.add_signal();
603N/A _operand_inst_num.addName((char*) (intptr_t) inst_num);
0N/A _operand_op_name.addName(inst_operand);
0N/A}
0N/A
0N/A// Access contents of peepreplace
0N/Avoid PeepReplace::reset() {
0N/A _instruction.reset();
0N/A _operand_inst_num.reset();
0N/A _operand_op_name.reset();
0N/A}
603N/Avoid PeepReplace::next_instruction(const char* &inst){
0N/A inst = _instruction.iter();
603N/A int inst_num = (int) (intptr_t) _operand_inst_num.iter();
603N/A const char* inst_operand = _operand_op_name.iter();
0N/A}
603N/Avoid PeepReplace::next_operand(int &inst_num, const char* &inst_operand) {
603N/A const char* inst = _instruction.iter();
603N/A inst_num = (int) (intptr_t) _operand_inst_num.iter();
603N/A inst_operand = _operand_op_name.iter();
0N/A}
0N/A
0N/A
0N/A
0N/Avoid PeepReplace::dump() {
0N/A output(stderr);
0N/A}
0N/A
0N/Avoid PeepReplace::output(FILE *fp) { // Write info to output files
0N/A fprintf(fp,"PeepReplace:\n");
0N/A}