0N/A/*
1999N/A * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#ifndef OS_CPU_SOLARIS_X86_VM_ATOMIC_SOLARIS_X86_INLINE_HPP
1879N/A#define OS_CPU_SOLARIS_X86_VM_ATOMIC_SOLARIS_X86_INLINE_HPP
1879N/A
1879N/A#include "orderAccess_solaris_x86.inline.hpp"
1879N/A#include "runtime/atomic.hpp"
1879N/A#include "runtime/os.hpp"
1879N/A#include "vm_version_x86.hpp"
1879N/A
0N/Ainline void Atomic::store (jbyte store_value, jbyte* dest) { *dest = store_value; }
0N/Ainline void Atomic::store (jshort store_value, jshort* dest) { *dest = store_value; }
0N/Ainline void Atomic::store (jint store_value, jint* dest) { *dest = store_value; }
0N/A
0N/A
0N/Ainline void Atomic::store_ptr(intptr_t store_value, intptr_t* dest) { *dest = store_value; }
0N/Ainline void Atomic::store_ptr(void* store_value, void* dest) { *(void**)dest = store_value; }
0N/A
0N/Ainline void Atomic::store (jbyte store_value, volatile jbyte* dest) { *dest = store_value; }
0N/Ainline void Atomic::store (jshort store_value, volatile jshort* dest) { *dest = store_value; }
0N/Ainline void Atomic::store (jint store_value, volatile jint* dest) { *dest = store_value; }
0N/Ainline void Atomic::store_ptr(intptr_t store_value, volatile intptr_t* dest) { *dest = store_value; }
0N/Ainline void Atomic::store_ptr(void* store_value, volatile void* dest) { *(void* volatile *)dest = store_value; }
0N/A
0N/Ainline void Atomic::inc (volatile jint* dest) { (void)add (1, dest); }
0N/Ainline void Atomic::inc_ptr(volatile intptr_t* dest) { (void)add_ptr(1, dest); }
0N/Ainline void Atomic::inc_ptr(volatile void* dest) { (void)add_ptr(1, dest); }
0N/A
0N/Ainline void Atomic::dec (volatile jint* dest) { (void)add (-1, dest); }
0N/Ainline void Atomic::dec_ptr(volatile intptr_t* dest) { (void)add_ptr(-1, dest); }
0N/Ainline void Atomic::dec_ptr(volatile void* dest) { (void)add_ptr(-1, dest); }
0N/A
0N/A// For Sun Studio - implementation is in solaris_x86_[32/64].il.
0N/A// For gcc - implementation is just below.
0N/A
1467N/A// The lock prefix can be omitted for certain instructions on uniprocessors; to
1467N/A// facilitate this, os::is_MP() is passed as an additional argument. 64-bit
1467N/A// processors are assumed to be multi-threaded and/or multi-core, so the extra
1467N/A// argument is unnecessary.
1467N/A#ifndef _LP64
1467N/A#define IS_MP_DECL() , int is_mp
1467N/A#define IS_MP_ARG() , (int) os::is_MP()
1467N/A#else
1467N/A#define IS_MP_DECL()
1467N/A#define IS_MP_ARG()
1467N/A#endif // _LP64
1467N/A
1467N/Aextern "C" {
1467N/A jint _Atomic_add(jint add_value, volatile jint* dest IS_MP_DECL());
1467N/A jint _Atomic_xchg(jint exchange_value, volatile jint* dest);
1467N/A jint _Atomic_cmpxchg(jint exchange_value, volatile jint* dest,
1467N/A jint compare_value IS_MP_DECL());
1467N/A jlong _Atomic_cmpxchg_long(jlong exchange_value, volatile jlong* dest,
1467N/A jlong compare_value IS_MP_DECL());
1467N/A}
0N/A
0N/Ainline jint Atomic::add (jint add_value, volatile jint* dest) {
1467N/A return _Atomic_add(add_value, dest IS_MP_ARG());
1467N/A}
1467N/A
1467N/Ainline jint Atomic::xchg (jint exchange_value, volatile jint* dest) {
1467N/A return _Atomic_xchg(exchange_value, dest);
0N/A}
0N/A
0N/Ainline jint Atomic::cmpxchg (jint exchange_value, volatile jint* dest, jint compare_value) {
1467N/A return _Atomic_cmpxchg(exchange_value, dest, compare_value IS_MP_ARG());
0N/A}
0N/A
0N/Ainline jlong Atomic::cmpxchg (jlong exchange_value, volatile jlong* dest, jlong compare_value) {
1467N/A return _Atomic_cmpxchg_long(exchange_value, dest, compare_value IS_MP_ARG());
0N/A}
0N/A
0N/A
0N/A#ifdef AMD64
0N/Ainline void Atomic::store (jlong store_value, jlong* dest) { *dest = store_value; }
0N/Ainline void Atomic::store (jlong store_value, volatile jlong* dest) { *dest = store_value; }
1467N/Aextern "C" jlong _Atomic_add_long(jlong add_value, volatile jlong* dest);
0N/Aextern "C" jlong _Atomic_xchg_long(jlong exchange_value, volatile jlong* dest);
0N/A
0N/Ainline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
1467N/A return (intptr_t)_Atomic_add_long((jlong)add_value, (volatile jlong*)dest);
0N/A}
0N/A
0N/Ainline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) {
1467N/A return (void*)_Atomic_add_long((jlong)add_value, (volatile jlong*)dest);
0N/A}
0N/A
0N/Ainline intptr_t Atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest) {
0N/A return (intptr_t)_Atomic_xchg_long((jlong)exchange_value, (volatile jlong*)dest);
0N/A}
0N/A
0N/Ainline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {
0N/A return (void*)_Atomic_xchg_long((jlong)exchange_value, (volatile jlong*)dest);
0N/A}
0N/A
0N/Ainline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value) {
1467N/A return (intptr_t)_Atomic_cmpxchg_long((jlong)exchange_value, (volatile jlong*)dest, (jlong)compare_value);
0N/A}
0N/A
0N/Ainline void* Atomic::cmpxchg_ptr(void* exchange_value, volatile void* dest, void* compare_value) {
1467N/A return (void*)_Atomic_cmpxchg_long((jlong)exchange_value, (volatile jlong*)dest, (jlong)compare_value);
0N/A}
0N/A
894N/Ainline jlong Atomic::load(volatile jlong* src) { return *src; }
894N/A
0N/A#else // !AMD64
0N/A
0N/Ainline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
0N/A return (intptr_t)add((jint)add_value, (volatile jint*)dest);
0N/A}
0N/A
0N/Ainline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) {
0N/A return (void*)add((jint)add_value, (volatile jint*)dest);
0N/A}
0N/A
0N/Ainline intptr_t Atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest) {
0N/A return (intptr_t)xchg((jint)exchange_value, (volatile jint*)dest);
0N/A}
0N/A
0N/Ainline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {
0N/A return (void*)xchg((jint)exchange_value, (volatile jint*)dest);
0N/A}
0N/A
0N/Ainline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value) {
0N/A return (intptr_t)cmpxchg((jint)exchange_value, (volatile jint*)dest, (jint)compare_value);
0N/A}
0N/A
0N/Ainline void* Atomic::cmpxchg_ptr(void* exchange_value, volatile void* dest, void* compare_value) {
0N/A return (void*)cmpxchg((jint)exchange_value, (volatile jint*)dest, (jint)compare_value);
0N/A}
894N/A
1999N/Aextern "C" void _Atomic_move_long(volatile jlong* src, volatile jlong* dst);
894N/A
894N/Ainline jlong Atomic::load(volatile jlong* src) {
894N/A volatile jlong dest;
1999N/A _Atomic_move_long(src, &dest);
894N/A return dest;
894N/A}
894N/A
1999N/Ainline void Atomic::store(jlong store_value, jlong* dest) {
1999N/A _Atomic_move_long((volatile jlong*)&store_value, (volatile jlong*)dest);
1999N/A}
1999N/A
1999N/Ainline void Atomic::store(jlong store_value, volatile jlong* dest) {
1999N/A _Atomic_move_long((volatile jlong*)&store_value, dest);
1999N/A}
1999N/A
0N/A#endif // AMD64
0N/A
0N/A#ifdef _GNU_SOURCE
0N/A// Add a lock prefix to an instruction on an MP machine
0N/A#define LOCK_IF_MP(mp) "cmp $0, " #mp "; je 1f; lock; 1: "
0N/A
0N/Aextern "C" {
0N/A inline jint _Atomic_add(jint add_value, volatile jint* dest, int mp) {
0N/A jint addend = add_value;
0N/A __asm__ volatile ( LOCK_IF_MP(%3) "xaddl %0,(%2)"
0N/A : "=r" (addend)
0N/A : "0" (addend), "r" (dest), "r" (mp)
0N/A : "cc", "memory");
0N/A return addend + add_value;
0N/A }
0N/A
0N/A#ifdef AMD64
0N/A inline jlong _Atomic_add_long(jlong add_value, volatile jlong* dest, int mp) {
0N/A intptr_t addend = add_value;
0N/A __asm__ __volatile__ (LOCK_IF_MP(%3) "xaddq %0,(%2)"
0N/A : "=r" (addend)
0N/A : "0" (addend), "r" (dest), "r" (mp)
0N/A : "cc", "memory");
0N/A return addend + add_value;
0N/A }
0N/A
0N/A inline jlong _Atomic_xchg_long(jlong exchange_value, volatile jlong* dest) {
0N/A __asm__ __volatile__ ("xchgq (%2),%0"
0N/A : "=r" (exchange_value)
0N/A : "0" (exchange_value), "r" (dest)
0N/A : "memory");
0N/A return exchange_value;
0N/A }
0N/A
0N/A#endif // AMD64
0N/A
0N/A inline jint _Atomic_xchg(jint exchange_value, volatile jint* dest) {
0N/A __asm__ __volatile__ ("xchgl (%2),%0"
0N/A : "=r" (exchange_value)
0N/A : "0" (exchange_value), "r" (dest)
0N/A : "memory");
0N/A return exchange_value;
0N/A }
0N/A
0N/A inline jint _Atomic_cmpxchg(jint exchange_value, volatile jint* dest, jint compare_value, int mp) {
0N/A __asm__ volatile (LOCK_IF_MP(%4) "cmpxchgl %1,(%3)"
0N/A : "=a" (exchange_value)
0N/A : "r" (exchange_value), "a" (compare_value), "r" (dest), "r" (mp)
0N/A : "cc", "memory");
0N/A return exchange_value;
0N/A }
0N/A
0N/A // This is the interface to the atomic instruction in solaris_i486.s.
0N/A jlong _Atomic_cmpxchg_long_gcc(jlong exchange_value, volatile jlong* dest, jlong compare_value, int mp);
0N/A
0N/A inline jlong _Atomic_cmpxchg_long(jlong exchange_value, volatile jlong* dest, jlong compare_value, int mp) {
0N/A#ifdef AMD64
0N/A __asm__ __volatile__ (LOCK_IF_MP(%4) "cmpxchgq %1,(%3)"
0N/A : "=a" (exchange_value)
0N/A : "r" (exchange_value), "a" (compare_value), "r" (dest), "r" (mp)
0N/A : "cc", "memory");
0N/A return exchange_value;
0N/A#else
0N/A return _Atomic_cmpxchg_long_gcc(exchange_value, dest, compare_value, os::is_MP());
0N/A
0N/A #if 0
0N/A // The code below does not work presumably because of the bug in gcc
0N/A // The error message says:
0N/A // can't find a register in class BREG while reloading asm
0N/A // However I want to save this code and later replace _Atomic_cmpxchg_long_gcc
0N/A // with such inline asm code:
0N/A
0N/A volatile jlong_accessor evl, cvl, rv;
0N/A evl.long_value = exchange_value;
0N/A cvl.long_value = compare_value;
0N/A int mp = os::is_MP();
0N/A
0N/A __asm__ volatile ("cmp $0, %%esi\n\t"
0N/A "je 1f \n\t"
0N/A "lock\n\t"
0N/A "1: cmpxchg8b (%%edi)\n\t"
0N/A : "=a"(cvl.words[0]), "=d"(cvl.words[1])
0N/A : "a"(cvl.words[0]), "d"(cvl.words[1]),
0N/A "b"(evl.words[0]), "c"(evl.words[1]),
0N/A "D"(dest), "S"(mp)
0N/A : "cc", "memory");
0N/A return cvl.long_value;
0N/A #endif // if 0
0N/A#endif // AMD64
0N/A }
0N/A}
0N/A#undef LOCK_IF_MP
0N/A
0N/A#endif // _GNU_SOURCE
1879N/A
1879N/A#endif // OS_CPU_SOLARIS_X86_VM_ATOMIC_SOLARIS_X86_INLINE_HPP