/*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
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*/
#include "orderAccess_solaris_x86.inline.hpp"
#include "runtime/atomic.hpp"
#include "vm_version_x86.hpp"
inline void Atomic::store_ptr(intptr_t store_value, volatile intptr_t* dest) { *dest = store_value; }
inline void Atomic::store_ptr(void* store_value, volatile void* dest) { *(void* volatile *)dest = store_value; }
// For Sun Studio - implementation is in solaris_x86_[32/64].il.
// For gcc - implementation is just below.
// The lock prefix can be omitted for certain instructions on uniprocessors; to
// facilitate this, os::is_MP() is passed as an additional argument. 64-bit
// argument is unnecessary.
#ifndef _LP64
#else
#define IS_MP_DECL()
#define IS_MP_ARG()
#endif // _LP64
extern "C" {
}
}
}
}
}
#ifdef AMD64
}
}
}
}
inline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value) {
return (intptr_t)_Atomic_cmpxchg_long((jlong)exchange_value, (volatile jlong*)dest, (jlong)compare_value);
}
return (void*)_Atomic_cmpxchg_long((jlong)exchange_value, (volatile jlong*)dest, (jlong)compare_value);
}
#else // !AMD64
}
}
}
}
inline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value) {
}
}
return dest;
}
}
}
#endif // AMD64
#ifdef _GNU_SOURCE
// Add a lock prefix to an instruction on an MP machine
extern "C" {
: "=r" (addend)
: "cc", "memory");
}
#ifdef AMD64
: "=r" (addend)
: "cc", "memory");
}
: "=r" (exchange_value)
: "memory");
return exchange_value;
}
#endif // AMD64
: "=r" (exchange_value)
: "memory");
return exchange_value;
}
: "=a" (exchange_value)
: "cc", "memory");
return exchange_value;
}
// This is the interface to the atomic instruction in solaris_i486.s.
jlong _Atomic_cmpxchg_long_gcc(jlong exchange_value, volatile jlong* dest, jlong compare_value, int mp);
inline jlong _Atomic_cmpxchg_long(jlong exchange_value, volatile jlong* dest, jlong compare_value, int mp) {
#ifdef AMD64
: "=a" (exchange_value)
: "cc", "memory");
return exchange_value;
#else
#if 0
// The code below does not work presumably because of the bug in gcc
// The error message says:
// can't find a register in class BREG while reloading asm
// However I want to save this code and later replace _Atomic_cmpxchg_long_gcc
// with such inline asm code:
__asm__ volatile ("cmp $0, %%esi\n\t"
"je 1f \n\t"
"lock\n\t"
"1: cmpxchg8b (%%edi)\n\t"
: "cc", "memory");
return cvl.long_value;
#endif // if 0
#endif // AMD64
}
}
#endif // _GNU_SOURCE
#endif // OS_CPU_SOLARIS_X86_VM_ATOMIC_SOLARIS_X86_INLINE_HPP