/*
* Copyright 2007 Red Hat, Inc.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#ifndef CPU_ZERO_VM_NATIVEINST_ZERO_HPP
#define CPU_ZERO_VM_NATIVEINST_ZERO_HPP
#include "asm/assembler.hpp"
#include "memory/allocation.hpp"
#include "runtime/icache.hpp"
// We have interfaces for the following instructions:
// - NativeInstruction
// - - NativeCall
// - - NativeMovConstReg
// - - NativeMovConstRegPatching
// - - NativeJump
// - - NativeIllegalOpCode
// - - NativeReturn
// - - NativeReturnX (return with argument)
// - - NativePushConst
// - - NativeTstRegMem
// The base class for different kinds of native instruction abstractions.
// Provides the primitive operations to manipulate code relative to this.
public:
bool is_jump() {
}
bool is_safepoint_poll() {
}
};
}
public:
enum zero_specific_constants {
};
}
}
}
}
}
void verify_alignment() {
}
void verify() {
}
}
};
}
}
public:
}
}
}
};
}
public:
int offset() const {
}
}
}
};
}
public:
enum zero_specific_constants {
};
}
}
}
};
}
public:
}
}
}
};
}
#endif // CPU_ZERO_VM_NATIVEINST_ZERO_HPP