sharedRuntime_x86_32.cpp revision 926
579N/A * Copyright 2003-2009 Sun Microsystems, Inc. All Rights Reserved. 0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 0N/A * This code is free software; you can redistribute it and/or modify it 0N/A * under the terms of the GNU General Public License version 2 only, as 0N/A * published by the Free Software Foundation. 0N/A * This code is distributed in the hope that it will be useful, but WITHOUT 0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 0N/A * version 2 for more details (a copy is included in the LICENSE file that 0N/A * accompanied this code). 0N/A * You should have received a copy of the GNU General Public License version 0N/A * 2 along with this work; if not, write to the Free Software Foundation, 0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 0N/A * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 0N/A * CA 95054 USA or visit www.sun.com if you need additional information or 0N/A * have any questions. 0N/A#
include "incls/_precompiled.incl" 0N/A enum {
FPU_regs_live =
8 /*for the FPU stack*/+
8/*eight more for XMM registers*/ };
0N/A // Capture info about frame layout 0N/A // The frame sender code expects that rbp will be in the "natural" place and 0N/A // will override any oopMap setting for it. We must therefore force the layout 0N/A // so that it agrees with the frame sender code. 0N/A // Offsets into the register save area 0N/A // Used by deoptimization when it is managing result register 0N/A // values on its own 0N/A // This really returns a slot in the fp save area, which one is not important 0N/A // During deoptimization only the result register need to be restored 0N/A // all the other values have already been extracted. 0N/A // save registers, fpu state, and flags 0N/A // We assume caller has already has return address slot on the stack 0N/A // We push epb twice in this sequence because we want the real rbp, 304N/A // to be under the return like a normal enter and we want to use pusha 0N/A // We push by hand instead of pusing push 0N/A // Some stubs may have non standard FPU control word settings so 0N/A // only check and reset the value when it required to be the 0N/A // standard value. The safepoint blob in particular can be used 0N/A // in methods which are using the 24 bit control word for 0N/A // optimized float math. 0N/A // Make sure the control word has the expected value 0N/A // Reset the control word to guard against exceptions being unmasked 0N/A // since fstp_d can cause FPU stack underflow exceptions. Write it 0N/A // into the on stack copy and then reload that to make sure that the 0N/A // current and future values are correct. 0N/A // Set the control word so that exceptions are masked for the 0N/A // Save the FPU registers in de-opt-able form 0N/A // Set an oopmap for the call site. This oopmap will map all 0N/A // oop-registers and debug-info registers as callee-saved. This 0N/A // will allow deoptimization at this safepoint to find all possible 0N/A // debug-info recordings, as well as let GC find all oops. 0N/A // rbp, location is known implicitly, no oopMap 0N/A // %%% This is really a waste but we'll keep things as they were for now 0N/A // Recover XMM & FPU state 0N/A // Get the rbp, described implicitly by the frame sender code (no oopMap) 0N/A // Just restore result register. Only used by deoptimization. By 0N/A // now any callee save register that needs to be restore to a c2 0N/A // caller of the deoptee has been extracted into the vframeArray 0N/A // and will be stuffed into the c2i adapter we create for later 0N/A // restoration so only result registers need to be restored here. 0N/A // Recover XMM & FPU state 0N/A // Pop all of the register save are off the stack except the return address 0N/A// The java_calling_convention describes stack locations as ideal slots on 0N/A// a frame with no abi restrictions. Since we must observe abi restrictions 0N/A// (like the placement of the register window) the slots must be biased by 0N/A// the following value. 0N/A // Account for saved rbp, and return address 0N/A // This should really be in_preserve_stack_slots 0N/A// --------------------------------------------------------------------------- 0N/A// Read the array of BasicTypes from a signature, and compute where the 0N/A// arguments should go. Values in the VMRegPair regs array refer to 4-byte 0N/A// quantities. Values less than SharedInfo::stack0 are registers, those above 0N/A// refer to 4-byte stack slots. All stack slots are based off of the stack pointer 0N/A// as framesizes are fixed. 0N/A// VMRegImpl::stack0 refers to the first slot 0(sp). 0N/A// and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register 0N/A// up to RegisterImpl::number_of_registers) are the 32-bit 0N/A// integer registers. 0N/A// Pass first two oop/int args in registers ECX and EDX. 0N/A// Doubles have precedence, so if you pass a mix of floats and doubles 0N/A// the doubles will grab the registers before the floats will. 0N/A// Note: the INPUTS in sig_bt are in units of Java argument words, which are 0N/A// either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 0N/A// units regardless of build. Of course for i486 there is no 64 bit build 0N/A// --------------------------------------------------------------------------- 0N/A// The compiled Java calling convention. 0N/A// Pass first two oop/int args in registers ECX and EDX. 0N/A// Doubles have precedence, so if you pass a mix of floats and doubles 0N/A// the doubles will grab the registers before the floats will. 0N/A uint stack = 0;
// Starting stack position for args on stack 0N/A // Pass first two oop/int args in registers ECX and EDX. 0N/A // Doubles have precedence, so if you pass a mix of floats and doubles 0N/A // the doubles will grab the registers before the floats will. 0N/A // CNC - TURNED OFF FOR non-SSE. 0N/A // On Intel we have to round all doubles (and most floats) at 0N/A // call sites by storing to the stack in any case. 0N/A // UseSSE=0 ==> Don't Use ==> 9999+0 0N/A // UseSSE=1 ==> Floats only ==> 9999+1 0N/A // UseSSE>=2 ==> Floats or doubles ==> 9999+2 0N/A // Pass doubles & longs aligned on the stack. First count stack slots for doubles 0N/A // first 2 doubles go in registers 0N/A else // Else double is passed low on the stack to be aligned. 0N/A int dstack = 0;
// Separate counter for placing doubles 0N/A // Now pick where all else goes. 0N/A // From the type and the argument number (count) compute the location 0N/A // return value can be odd number of VMRegImpl stack slots make multiple of 2 0N/A// Patch the callers callsite with entry to compiled code if it exists. 0N/A // Schedule the branch target address early. 0N/A // Call into the VM to patch the caller, then jump to compiled callee 0N/A // rax, isn't live so capture return address while we easily can 0N/A // C2 may leave the stack dirty if not in SSE2+ mode 0N/A#
endif /* COMPILER2 */ 0N/A // VM needs caller's callsite 0N/A // VM needs target method 0N/A// Helper function to put tags in interpreter stack. 0N/A// Double and long values with Tagged stacks are not contiguous. 0N/A // Move top half up and put tag in the middle. 0N/A // Before we get into the guts of the C2I adapter, see if we should be here 0N/A // at all. We've come from compiled code and are attempting to jump to the 0N/A // interpreter, which means the caller made a static call to get here 0N/A // (vcalls always get a compiled target if there is one). Check for a 0N/A // compiled target. If there is one, we need to patch the caller's call. 0N/A // C2 may leave the stack dirty if not in SSE2+ mode 0N/A#
endif /* COMPILER2 */ 0N/A // Since all args are passed on the stack, total_args_passed * interpreter_ 0N/A // stack_element_size is the 0N/A // Get return address 0N/A // set senderSP value 0N/A // Now write the args into the outgoing interpreter space 0N/A // st_off points to lowest address on stack. 0N/A // memory to memory use fpu stack top 0N/A // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW 0N/A // st_off == MSW, st_off-wordSize == LSW 304N/A // Overwrite the unused slot with known junk 304N/A // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 304N/A // T_DOUBLE and T_LONG use two slots in the interpreter 304N/A // Overwrite the unused slot with known junk 0N/A // Schedule the branch target address early. 0N/A // And repush original return address 0N/A// For tagged stacks, double or long value aren't contiguous on the stack 0N/A// so get them contiguous for the xmm load 0N/A // use tag slot temporarily for MSW 0N/A // we're being called from the interpreter but need to find the 0N/A // compiled return entry point. The return address on the stack 0N/A // should point at it and we just need to pull the old value out. 0N/A // load up the pointer to the compiled return entry point and 0N/A // rewrite our return pc. The code is arranged like so: 0N/A // .word Interpreter::return_sentinel 0N/A // .word address_of_compiled_return_point 0N/A // return_entry_point: blah_blah_blah 0N/A // So we can find the appropriate return point by loading up the word 0N/A // just prior to the current return address we have on the stack. 0N/A // We will only enter here from an interpreted frame and never from after 0N/A // passing thru a c2i. Azul allowed this but we do not. If we lose the 0N/A // race and use a c2i we will remain interpreted for the race loser(s). 0N/A // This removes all sorts of headaches on the x86 side and also eliminates 0N/A // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. 0N/A // Note: rsi contains the senderSP on entry. We must preserve it since 0N/A // we may do a i2c -> c2i transition if we lose a race where compiled 0N/A // code goes non-entrant while we get args ready. 0N/A // Pick up the return address 0N/A // If UseSSE >= 2 then no cleanup is needed on the return to the 0N/A // interpreter so skip fixing up the return entry point unless 0N/A // VerifyFPU is enabled. 0N/A // If we were called from the call stub we need to do a little bit different 0N/A // cleanup than if the interpreter returned to the call stub. 0N/A // It must be the interpreter since we never get here via a c2i (unlike Azul) 0N/A // rax, now contains the compiled return entry point which will do an 0N/A // cleanup needed for the return from compiled to interpreted. 0N/A // Must preserve original SP for loading incoming arguments because 0N/A // we need to align the outgoing SP for compiled code. 0N/A // Cut-out for having no stack args. Since up to 2 int/oop args are passed 0N/A // in registers, we will occasionally have no stack args. 0N/A // Sig words on the stack are greater-than VMRegImpl::stack0. Those in 0N/A // registers are below. By subtracting stack0, we either get a negative 0N/A // number (all values in registers) or the maximum stack slot accessed. 0N/A // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); 0N/A // Convert 4-byte stack slots to words. 0N/A // Round up to miminum stack alignment, in wordSize 0N/A // Align the outgoing SP 0N/A // push the return address on the stack (note that pushing, rather 0N/A // than storing it, yields the correct frame alignment for the callee) 0N/A // Put saved SP in another register 0N/A // Will jump to the compiled code just as if compiled code was doing it. 0N/A // Pre-load the register-jump target early, to schedule it better. 0N/A // Now generate the shuffle code. Pick up all register args and move the 0N/A // rest through the floating point stack top. 0N/A // Longs and doubles are passed in native word order, but misaligned 0N/A // in the 32-bit build. 0N/A // Pick up 0, 1 or 2 words from SP+offset. 0N/A "scrambled load targets?");
0N/A // Load in argument order going down. 0N/A // Point to interpreter value (vs. tag) 0N/A // Convert stack slot to an SP offset (+ wordSize to account for return address ) 0N/A // We can use rsi as a temp here because compiled code doesn't need rsi as an input 0N/A // and if we end up going thru a c2i because of a miss a reasonable value of rsi 0N/A // __ fld_s(Address(saved_sp, ld_off)); 0N/A // __ fstp_s(Address(rsp, st_off)); 0N/A // Interpreter local[n] == MSW, local[n+1] == LSW however locals 0N/A // are accessed as negative so LSW is at LOW address 0N/A // ld_off is MSW so get LSW 0N/A // st_off is LSW (i.e. reg.first()) 0N/A // __ fld_d(Address(saved_sp, next_off)); 0N/A // __ fstp_d(Address(rsp, st_off)); 304N/A // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 304N/A // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 304N/A // So we must adjust where to pick up the data to match the interpreter. 304N/A // Interpreter local[n] == MSW, local[n+1] == LSW however locals 304N/A // are accessed as negative so LSW is at LOW address 304N/A // ld_off is MSW so get LSW 304N/A // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 304N/A // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 304N/A // So we must adjust where to pick up the data to match the interpreter. 304N/A // this can be a misaligned move 0N/A // Remember r_1 is low address (and LSB on x86) 0N/A // So r_2 gets loaded from high address regardless of the platform 0N/A // 6243940 We might end up in handle_wrong_method if 0N/A // the callee is deoptimized as we race thru here. If that 0N/A // happens we don't want to take a safepoint because the 0N/A // caller frame will look interpreted and arguments are now 0N/A // "compiled" so it is much better to make this transition 0N/A // invisible to the stack walking code. Unfortunately if 0N/A // we try and find the callee by normal means a safepoint 0N/A // is possible. So we stash the desired callee in the thread 0N/A // and the vm will find there should this case occur. 0N/A // move methodOop to rax, in case we end up in an c2i adapter. 0N/A // the c2i adapters expect methodOop in rax, (c2) because c2's 0N/A // resolve stubs return the result (the method) in rax,. 0N/A // I'd love to fix this. 0N/A// --------------------------------------------------------------- 0N/A // ------------------------------------------------------------------------- 0N/A // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls 0N/A // to the interpreter. The args start out packed in the compiled layout. They 0N/A // need to be unpacked into the interpreter layout. This will almost always 0N/A // require some stack space. We grow the current (compiled) stack, then repack 0N/A // the args. We finally end in a jump to the generic interpreter entry point. 0N/A // On exit from the interpreter, the interpreter will restore our SP (lest the 0N/A // compiled code, which relys solely on SP and not EBP, get sick). 0N/A // Method might have been compiled since the call site was patched to 0N/A // interpreted if that is the case treat it as a miss so we can get 0N/A // the call site corrected. 0N/A// We return the amount of VMRegImpl stack slots we need to reserve for all 0N/A// the arguments NOT counting out_preserve_stack_slots. 0N/A // From the type and the argument number (count) compute the location 0N/A case T_DOUBLE:
// The stack numbering is reversed from Java 0N/A // Since C arguments do not get reversed, the ordering for 0N/A // doubles on the stack must be opposite the Java convention 0N/A// A simple move of integer like type 0N/A // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); 0N/A // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); 304N/A // no need to sign extend on 64bit 0N/A// An oop arg. Must pass a handle not the oop itself 0N/A // Because of the calling conventions we know that src can be a 0N/A // register or a stack location. dst can only be a stack location. 0N/A // must pass a handle. First figure out the location we use as a handle 0N/A // Oop is already on the stack as an argument 0N/A // Oop is in an a register we must store it to the space we reserve 0N/A // on the stack for oop_handles 0N/A // Store the handle parameter 0N/A// A float arg may have to do float reg int reg conversion 0N/A // Because of the calling convention we know that src is either a stack location 0N/A // or an xmm register. dst can only be a stack location. 0N/A // The only legal possibility for a long_move VMRegPair is: 0N/A // 1: two stack slots (possibly unaligned) 0N/A // as neither the java or C calling convention will use registers 0N/A // The only legal possibilities for a double_move VMRegPair are: 0N/A // The painful thing here is that like long_move a VMRegPair might be 0N/A // Because of the calling convention we know that src is either 0N/A // 1: a single physical register (xmm registers only) 0N/A // 2: two stack slots (possibly unaligned) 0N/A // dst can only be a pair of stack slots. 0N/A // source is all stack 0N/A // No worries about stack alignment 0N/A // We always ignore the frame_slots arg and just use the space just below frame pointer 0N/A // which by this time is free to use 0N/A // We always ignore the frame_slots arg and just use the space just below frame pointer 0N/A // which by this time is free to use 0N/A// --------------------------------------------------------------------------- 0N/A// Generate a native wrapper for a given method. The method takes arguments 0N/A// in the Java compiled code convention, marshals them to the native 0N/A// convention (handlizes oops, etc), transitions to native, makes the call, 0N/A// returns to java state (possibly blocking), unhandlizes any result and 0N/A // An OopMap for lock (and class if static) 0N/A // We have received a description of where all the java arg are located 0N/A // on entry to the wrapper. We need to convert these args to where 0N/A // the jni function will expect them. To figure out where they go 0N/A // we convert the java signature to a C signature by inserting 0N/A // the hidden arguments as arg[0] and possibly arg[1] (static method) 0N/A // Now figure out where the args must be stored and how much stack space 0N/A // they require (neglecting out_preserve_stack_slots but space for storing 0N/A // the 1st six register arguments). It's weird see int_stk_helper. 0N/A // Compute framesize for the wrapper. We need to handlize all oops in 0N/A // registers a max of 2 on x86. 0N/A // Calculate the total number of stack slots we will need. 0N/A // First count the abi requirement plus all of the outgoing args 0N/A // Now the space for the inbound oop handle area 0N/A // Now any space we need for handlizing a klass if static method 0N/A // Plus a lock if needed 0N/A // Now a place (+2) to save return values or temp during shuffling 0N/A // + 2 for return address (which we own) and saved rbp, 0N/A // Ok The space we have allocated will look like: 0N/A // |---------------------| 0N/A // | 2 slots for moves | 0N/A // |---------------------| 0N/A // | lock box (if sync) | 0N/A // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) 0N/A // | klass (if static) | 0N/A // |---------------------| <- klass_slot_offset 0N/A // | oopHandle area | 0N/A // |---------------------| <- oop_handle_offset (a max of 2 registers) 0N/A // | outbound memory | 0N/A // | based arguments | 0N/A // |---------------------| 0N/A // SP-> | out_preserved_slots | 0N/A // **************************************************************************** 0N/A // WARNING - on Windows Java Natives use pascal calling convention and pop the 0N/A // arguments off of the stack after the jni call. Before the call we can use 0N/A // instructions that are SP relative. After the jni call we switch to FP 0N/A // relative instructions instead of re-adjusting the stack on windows. 0N/A // **************************************************************************** 0N/A // Now compute actual number of stack words we need rounding to make 0N/A // stack properly aligned. 0N/A // First thing make an ic check to see if we should even be here 0N/A // We are free to use all registers as temps without saving them and 0N/A // restoring them except rbp,. rbp, is the only callee save register 0N/A // as far as the interpreter and the compiler(s) are concerned. 0N/A // verified entry must be aligned for code patching. 0N/A // and the first 5 bytes must be in the same cache line 0N/A // if we align at 8 then we will be sure 5 bytes are in the same line 0N/A // Object.hashCode can pull the hashCode from the header word 0N/A // instead of doing a full VM transition once it's been computed. 0N/A // Since hashCode is usually polymorphic at call sites we can't do 0N/A // this optimization at the call site without a lot of work. 0N/A // Check if biased and fall through to runtime if so 0N/A // test if hashCode exists 0N/A // The instruction at the verified entry point must be 5 bytes or longer 0N/A // because it can be patched on the fly by make_non_entrant. The stack bang 0N/A // instruction fits that requirement. 0N/A // Generate stack overflow check 0N/A // need a 5 byte instruction to allow MT safe patching to non-entrant 0N/A // Generate a new frame for the wrapper. 0N/A // -2 because return address is already present and so is saved rbp, 0N/A // Frame is now completed as far a size and linkage. 0N/A // Calculate the difference between rsp and rbp,. We need to know it 0N/A // after the native call because on windows Java Natives will pop 0N/A // the arguments and it is painful to do rsp relative addressing 0N/A // in a platform independent way. So after the call we switch to 0N/A // rbp, relative addressing. 0N/A // C2 may leave the stack dirty if not in SSE2+ mode 0N/A#
endif /* COMPILER2 */ 0N/A // Compute the rbp, offset for any slots used after the jni call 0N/A // We use rdi as a thread pointer because it is callee save and 0N/A // if we load it once it is usable thru the entire wrapper 0N/A // It is callee save so it survives the call to native 0N/A // We immediately shuffle the arguments so that any vm call we have to 0N/A // make from here on out (sync slow path, jvmti, etc.) we will have 0N/A // captured the oops from our caller and have a valid oopMap for 0N/A // ----------------- 0N/A // The Grand Shuffle 0N/A // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* 0N/A // and, if static, the class mirror instead of a receiver. This pretty much 0N/A // guarantees that register layout will not match (and x86 doesn't use reg 0N/A // parms though amd does). Since the native abi doesn't use register args 0N/A // and the java conventions does we don't have to worry about collisions. 0N/A // All of our moved are reg->stack or stack->stack. 0N/A // We ignore the extra arguments during the shuffle and handle them at the 0N/A // last moment. The shuffle is described by the two calling convention 0N/A // vectors we have in our possession. We simply walk the java vector to 0N/A // get the source locations and the c vector to get the destinations. 0N/A // Record rsp-based slot for receiver on stack for non-static methods 0N/A // This is a trick. We double the stack slots so we can claim 0N/A // the oops in the caller's frame. Since we are sure to have 0N/A // more args than the caller doubling is enough to make 0N/A // sure we can capture all the incoming oop args from the 0N/A // Mark location of rbp, 0N/A // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); 0N/A // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx 0N/A // Are free to temporaries if we have to do stack to steck moves. 0N/A // All inbound args are referenced based on rbp, and all outbound args via rsp. 0N/A // Pre-load a static method's oop into rsi. Used both by locking code and 0N/A // the normal JNI call code. 0N/A // load opp into a register 0N/A // Now handlize the static class mirror it's known not-null. 0N/A // Now get the handle 0N/A // store the klass handle as second argument 0N/A // Change state to native (we save the return address in the thread, since it might not 0N/A // be pushed on the stack when we do a a stack traversal). It is enough that the pc() 0N/A // points into the right code segment. It does not have to be the correct return pc. 0N/A // We use the same pc/oopMap repeatedly when we call out 0N/A // We have all of the arguments setup at this point. We must not touch any register 0N/A // argument registers at this point (what if we save/restore them there are no oop? 610N/A // RedefineClasses() tracing support for obsolete method entry 0N/A // Lock a synchronized method 0N/A // Get the handle (the 2nd argument) 0N/A // Get address of the box 0N/A // Load the oop from the handle 0N/A // Note that oop_handle_reg is trashed during this call 0N/A // Load immediate 1 into swap_reg %rax, 0N/A // Load (object->mark() | 1) into swap_reg %rax, 0N/A // Save (object->mark() | 1) into BasicLock's displaced header 0N/A // src -> dest iff dest == rax, else rax, <- dest 0N/A // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) 0N/A // Test if the oopMark is an obvious stack pointer, i.e., 0N/A // 1) (mark & 3) == 0, and 0N/A // 2) rsp <= mark < mark + os::pagesize() 0N/A // These 3 tests can be done by evaluating the following 0N/A // expression: ((mark - rsp) & (3 - os::vm_page_size())), 0N/A // assuming both stack pointer and pagesize have their 0N/A // least significant 2 bits clear. 0N/A // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg 0N/A // Save the test result, for recursive case, the result is zero 0N/A // Slow path will re-enter here 0N/A // Re-fetch oop_handle_reg as we trashed it above 0N/A // Finally just about ready to make the JNI call 0N/A // get JNIEnv* which is first argument to native 0N/A // Now set thread in native 0N/A // WARNING - on Windows Java Natives use pascal calling convention and pop the 0N/A // arguments off of the stack. We could just re-adjust the stack pointer here 0N/A // and continue to do SP relative addressing but we instead switch to FP 0N/A // relative addressing. 0N/A // Unpack native results. 0N/A // Result is in st0 we'll save as needed 0N/A break;
// can't de-handlize until after safepoint check 0N/A // Switch thread to "native transition" state before reading the synchronization state. 0N/A // This additional state is necessary because reading and testing the synchronization 0N/A // state is not atomic w.r.t. GC, as this scenario demonstrates: 0N/A // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 0N/A // VM thread changes sync state to synchronizing and suspends threads for GC. 0N/A // Thread A is resumed to finish this native method, but doesn't block here since it 0N/A // didn't see any synchronization is progress, and escapes. 304N/A // Force this write out before the read below 0N/A // Write serialization page so VM thread can do a pseudo remote membar. 0N/A // We use the current thread pointer to calculate a thread specific 0N/A // offset to write to within the page. This minimizes bus traffic 0N/A // due to cache line collision. 0N/A // Make sure the control word is correct. 0N/A // check for safepoint operation in progress and/or pending suspend requests 0N/A // Don't use call_VM as it will see a possible pending exception and forward it 0N/A // and never return here preventing us from clearing _last_native_pc down below. 0N/A // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are 0N/A // preserved and correspond to the bcp/locals pointers. So we do a runtime call 0N/A // Restore any method result value 0N/A // change thread state 0N/A // slow path reguard re-enters here 0N/A // Handle possible exception (will unlock if necessary) 0N/A // native result if any is live 0N/A // Get locked oop from the handle we passed to jni 0N/A // Simple recursive lock? 0N/A // Must save rax, if if it is live now because cmpxchg must use it 0N/A // get old displaced header 0N/A // get address of the stack lock 0N/A // Atomic swap old header if oop still contains the stack lock 0N/A // src -> dest iff dest == rax, else rax, <- dest 0N/A // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) 0N/A // slow path re-enters here 0N/A // Tell dtrace about this method exit 0N/A // We can finally stop using that last_Java_frame we setup ages ago 0N/A // Unpack oop result 0N/A // reset handle block 0N/A // Any exception pending? 0N/A // no exception, we're almost done 0N/A // check that only result value is on FPU stack 0N/A // Fixup floating pointer results so that result looks like a return from a compiled method 0N/A // Pop st0 and store as float and reload into xmm register 0N/A // Pop st0 and store as double and reload into xmm register 0N/A // Unexpected paths are out of line and go here 0N/A // Slow path locking & unlocking 0N/A // BEGIN Slow path lock 0N/A // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 0N/A // args are (oop obj, BasicLock* lock, JavaThread* thread) 0N/A __ stop(
"no pending exception allowed on exit from monitorenter");
0N/A // END Slow path lock 0N/A // BEGIN Slow path unlock 0N/A // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 0N/A // +wordSize because of the push above 0N/A __ stop(
"no pending exception allowed on exit complete_monitor_unlocking_C");
0N/A // END Slow path unlock 0N/A // SLOW PATH Reguard the stack if needed 0N/A // BEGIN EXCEPTION PROCESSING 0N/A // Forward the exception 0N/A // remove possible return value from FPU register stack 0N/A // and forward the exception 116N/A// --------------------------------------------------------------------------- 116N/A// Generate a dtrace nmethod for a given signature. The method takes arguments 116N/A// in the Java compiled code convention, marshals them to the native 116N/A// abi and then leaves nops at the position you would expect to call a native 116N/A// function. When the probe is enabled the nops are replaced with a trap 116N/A// instruction that dtrace inserts and the trace will cause a notification 116N/A// arguments. No other java types are allowed. Strings are converted to utf8 116N/A// strings so that from dtrace point of view java strings are converted to C 116N/A// strings. There is an arbitrary fixed limit on the total space that a method 116N/A// can use for converting the strings. (256 chars per string in the signature). 116N/A// So any java string larger then this is truncated. 116N/A // generate_dtrace_nmethod is guarded by a mutex so we are sure to 116N/A // be single threaded in this method. 116N/A // Fill in the signature array, for the calling-convention call. 116N/A // The signature we are going to use for the trap that dtrace will see 116N/A // is converted to a two-slot long, which is why we double the allocation). 116N/A // We need to convert the java args to where a native (non-jni) function 116N/A // would expect them. To figure out where they go we convert the java 116N/A // signature to a C signature. 116N/A // Now get the compiled-Java layout as input arguments 116N/A // Now figure out where the args must be stored and how much stack space 116N/A // they require (neglecting out_preserve_stack_slots). 116N/A // Calculate the total number of stack slots we will need. 116N/A // First count the abi requirement plus all of the outgoing args 116N/A // Now space for the string(s) we must convert 116N/A // + 2 for return address (which we own) and saved rbp, 116N/A // Ok The space we have allocated will look like: 116N/A // |---------------------| 116N/A // |---------------------| <- string_locs[n] 116N/A // |---------------------| <- string_locs[n-1] 116N/A // |---------------------| <- string_locs[1] 116N/A // |---------------------| <- string_locs[0] 116N/A // |---------------------| 116N/A // SP-> | out_preserved_slots | 116N/A // Now compute actual number of stack words we need rounding to make 116N/A // stack properly aligned. 116N/A // First thing make an ic check to see if we should even be here 116N/A // We are free to use all registers as temps without saving them and 116N/A // restoring them except rbp. rbp, is the only callee save register 116N/A // as far as the interpreter and the compiler(s) are concerned. 116N/A // verified entry must be aligned for code patching. 116N/A // and the first 5 bytes must be in the same cache line 116N/A // if we align at 8 then we will be sure 5 bytes are in the same line 116N/A // The instruction at the verified entry point must be 5 bytes or longer 116N/A // because it can be patched on the fly by make_non_entrant. The stack bang 116N/A // instruction fits that requirement. 116N/A // Generate stack overflow check 116N/A // need a 5 byte instruction to allow MT safe patching to non-entrant 116N/A "valid size for make_non_entrant");
116N/A // Generate a new frame for the wrapper. 116N/A // -2 because return address is already present and so is saved rbp, 116N/A // Frame is now completed as far a size and linkage. 116N/A // First thing we do store all the args as if we are doing the call. 116N/A // Since the C calling convention is stack based that ensures that 116N/A // all the Java register args are stored before we need to convert any 116N/A // string we might have. 116N/A "stack based abi assumed");
116N/A // Any register based arg for a java string after the first 116N/A // will be destroyed by the call to get_utf so we store 116N/A // the original value in the location the utf string address 116N/A // will eventually be stored. 116N/A // need to unbox a one-word value 116N/A "value(s) must go into stack slots");
116N/A // Convert the arg to NULL 116N/A ++
c_arg;
// Move over the T_VOID To keep the loop indices in sync 116N/A // Now we must convert any string we have to utf8 116N/A // The first string we find might still be in the original java arg 116N/A // This is where the argument will eventually reside 116N/A // Get the copy of the jls object 116N/A // arg is still in the original location 116N/A // Now we can store the address of the utf string as the argument 116N/A // And do the conversion 116N/A ++
c_arg;
// Move over the T_VOID To keep the loop indices in sync 116N/A // Ok now we are done. Need to place the nop that dtrace wants in order to 0N/A// this function returns the adjust size (in number of words) to a c2i adapter 0N/A// activation for use during deoptimization 0N/A//------------------------------generate_deopt_blob---------------------------- 0N/A // allocate space for the code 0N/A // setup code generation tools 0N/A // Account for the extra args we place on the stack 0N/A // by the time we call fetch_unroll_info 0N/A // This code enters when returning to a de-optimized nmethod. A return 0N/A // address has been pushed on the the stack, and return values are in 0N/A // If we are doing a normal deopt then we were called from the patched 0N/A // nmethod from the point we returned to the nmethod. So the return 0N/A // address on the stack is wrong by NativeCall::instruction_size 0N/A // We will adjust the value to it looks like we have the original return 0N/A // address on the stack (like when we eagerly deoptimized). 0N/A // In the case of an exception pending with deoptimized then we enter 0N/A // with a return address on the stack that points after the call we patched 0N/A // into the exception handler. We have the following register state: 0N/A // rbx,: exception handler 0N/A // So in this case we simply jam rdx into the useless return address and 0N/A // the stack looks just like we want. 0N/A // At this point we need to de-opt. We save the argument return 0N/A // registers. We call the first C routine, fetch_unroll_info(). This 0N/A // routine captures the return values and returns a structure which 0N/A // describes the current frame size and the sizes of all replacement frames. 0N/A // The current frame is compiled code and may contain many inlined 0N/A // functions, each with their own JVM state. We pop the current frame, then 0N/A // push all the new frames. Then we call the C routine unpack_frames() to 0N/A // populate these frames. Finally unpack_frames() returns us the new target 0N/A // address. Notice that callee-save registers are BLOWN here; they have 0N/A // already been captured in the vframeArray at the time the return PC was 0N/A // Prolog for non exception case! 0N/A // Save everything in sight. 0N/A // Normal deoptimization 0N/A // return address is the pc describes what bci to do re-execute at 0N/A // No need to update map as each call to save_live_registers will produce identical oopmap 0N/A // Prolog for exception case 0N/A // all registers are dead at this entry point, except for rax, and 0N/A // rdx which contain the exception oop and exception pc 0N/A // respectively. Set them in TLS and fall thru to the 0N/A // unpack_with_exception_in_tls entry point. 0N/A // new implementation because exception oop is now passed in JavaThread 0N/A // Prolog for exception case 0N/A // All registers must be preserved because they might be used by LinearScan 0N/A // Exceptiop oop and throwing PC are passed in JavaThread 0N/A // tos: stack at point of call to method that threw the exception (i.e. only 0N/A // args are on the stack, no return address) 0N/A // make room on stack for the return address 0N/A // It will be patched later with the throwing pc. The correct value is not 0N/A // available now because loading it from memory would destroy registers. 0N/A // Save everything in sight. 0N/A // No need to update map as each call to save_live_registers will produce identical oopmap 0N/A // Now it is safe to overwrite any register 0N/A // store the correct deoptimization type 0N/A // load throwing pc from JavaThread and patch it as the return address 0N/A // of the current frame. Then clear the field in JavaThread 0N/A // verify that there is really an exception oop in JavaThread 0N/A // verify that there is no pending exception 0N/A __ stop(
"must not have pending exception here");
0N/A // Compiled code leaves the floating point stack dirty, empty it. 0N/A // Call C code. Need thread and this frame, but NOT official VM entry 0N/A // crud. We cannot block on this call, no GC can happen. 0N/A // fetch_unroll_info needs to call last_java_frame() 0N/A // Need to have an oopmap that tells fetch_unroll_info where to 0N/A // find any register it might need. 0N/A // Discard arg to fetch_unroll_info 0N/A // Load UnrollBlock into EDI 0N/A // Move the unpack kind to a safe place in the UnrollBlock because 0N/A // we are very short of registers 0N/A // retrieve the deopt kind from where we left it. 0N/A // Overwrite the result registers with the exception results. 0N/A // Stack is back to only having register save data on the stack. 0N/A // Now restore the result registers. Everything else is either dead or captured 0N/A // in the vframeArray. 926N/A // Non standard control word may be leaked out through a safepoint blob, and we can 926N/A // deopt at a poll point with the non standard control word. However, we should make 926N/A // sure the control word is correct after restore_result_registers. 0N/A // All of the register save area has been popped of the stack. Only the 0N/A // return address remains. 0N/A // Frame picture (youngest to oldest) 0N/A // 1: self-frame (no frame link) 0N/A // 2: deopting frame (no frame link) 0N/A // Note: by leaving the return address of self-frame on the stack 0N/A // and using the size of frame 2 to adjust the stack 0N/A // when we are done the return to frame 3 will still be on the stack. 0N/A // Pop deoptimized frame 0N/A // sp should be pointing at the return address to the caller (3) 0N/A // Stack bang to make sure there's enough room for these interpreter frames. 0N/A // Load array of frame pcs into ECX 0N/A // Load array of frame sizes into ESI 0N/A // Pick up the initial fp we should save 0N/A // Now adjust the caller's stack to make up for the extra locals 0N/A // but record the original sp so that we can save it in the skeletal interpreter 0N/A // frame and the stack walking of interpreter_sender will get the unextended sp 0N/A // value and not the "real" sp value. 0N/A // Push interpreter frames in a loop 0N/A#
else /* CC_INTERP */ 0N/A#
endif /* CC_INTERP */ 0N/A#
else /* CC_INTERP */ 0N/A // This value is corrected by layout_activation_impl 0N/A#
endif /* CC_INTERP */ 0N/A // Re-push self-frame 0N/A // Return address and rbp, are in place 0N/A // We'll push additional args later. Just allocate a full sized 0N/A // register save area 0N/A // Restore frame locals after moving the frame 0N/A // Set up the args to unpack_frame 0N/A // set last_Java_sp, last_Java_fp 0N/A // Call C code. Need thread but NOT official VM entry 0N/A // crud. We cannot block on this call, no GC can happen. Call should 0N/A // restore return values to their stack-slots with the new SP. 0N/A // Set an oopmap for the call site 0N/A // rax, contains the return result type 0N/A // Collect return values 0N/A // Clear floating point stack before returning to interpreter 0N/A // Check if we should push the float or double return value. 0N/A // return float value as expected by interpreter 0N/A // return double value as expected by interpreter 0N/A // Jump to interpreter 0N/A // make sure all code is generated 0N/A//------------------------------generate_uncommon_trap_blob-------------------- 0N/A // allocate space for the code 0N/A // setup code generation tools 0N/A // The frame sender code expects that rbp will be in the "natural" place and 0N/A // will override any oopMap setting for it. We must therefore force the layout 0N/A // so that it agrees with the frame sender code. 0N/A // rbp, is an implicitly saved callee saved register (i.e. the calling 0N/A // there are no callee save registers no that adapter frames are gone. 0N/A // Clear the floating point exception stack 0N/A // Call C code. Need thread but NOT official VM entry 0N/A // crud. We cannot block on this call, no GC can happen. Call should 0N/A // capture callee-saved registers as well as return values. 0N/A // argument already in ECX 0N/A // Set an oopmap for the call site 0N/A // No oopMap for rbp, it is known implicitly 0N/A // Load UnrollBlock into EDI 0N/A // Frame picture (youngest to oldest) 0N/A // 1: self-frame (no frame link) 0N/A // 2: deopting frame (no frame link) 0N/A // Pop self-frame. We have no frame, and must rely only on EAX and ESP. 0N/A // Pop deoptimized frame 0N/A // sp should be pointing at the return address to the caller (3) 0N/A // Stack bang to make sure there's enough room for these interpreter frames. 0N/A // Load array of frame pcs into ECX 0N/A // Load array of frame sizes into ESI 0N/A // Pick up the initial fp we should save 0N/A // Now adjust the caller's stack to make up for the extra locals 0N/A // but record the original sp so that we can save it in the skeletal interpreter 0N/A // frame and the stack walking of interpreter_sender will get the unextended sp 0N/A // value and not the "real" sp value. 0N/A // Push interpreter frames in a loop 304N/A __ push(
0xDEADDEAD);
// (parm to RecursiveInterpreter...) 0N/A#
else /* CC_INTERP */ 0N/A#
endif /* CC_INTERP */ 0N/A#
else /* CC_INTERP */ 0N/A // This value is corrected by layout_activation_impl 0N/A#
endif /* CC_INTERP */ 0N/A // Re-push self-frame 0N/A // set last_Java_sp, last_Java_fp 0N/A // Call C code. Need thread but NOT official VM entry 0N/A // crud. We cannot block on this call, no GC can happen. Call should 0N/A // restore return values to their stack-slots with the new SP. 0N/A // Set an oopmap for the call site 0N/A // Jump to interpreter 0N/A // make sure all code is generated 0N/A//------------------------------generate_handler_blob------ 0N/A// Generate a special Compile2Runtime blob that saves all registers, 0N/A// setup oopmap, and calls safepoint code to stop the compiled code for 0N/A // Account for thread arg in our frame 0N/A // allocate space for the code 0N/A // setup code generation tools 0N/A // If cause_return is true we are at a poll_return and there is 0N/A // the return address on the stack to the caller on the nmethod 0N/A // that is safepoint. We can leave this return on the stack and 0N/A // effectively complete the return and safepoint in the caller. 0N/A // Otherwise we push space for a return address that the safepoint 0N/A // handler will install later to make the stack walking sensible. 0N/A // The following is basically a call_VM. However, we need the precise 0N/A // address of the call in order to generate an oopmap. Hence, we do all the 0N/A // Push thread argument and setup last_Java_sp 0N/A // if this was not a poll_return then we need to correct the return address now. 0N/A // Set an oopmap for the call site. This oopmap will map all 0N/A // oop-registers and debug-info registers as callee-saved. This 0N/A // will allow deoptimization at this safepoint to find all possible 0N/A // debug-info recordings, as well as let GC find all oops. 0N/A // Clear last_Java_sp again 0N/A // Exception pending 0N/A // Normal exit, register restoring and exit 0N/A // make sure all code is generated 0N/A // Fill-out other meta info 0N/A// Generate a stub that calls into vm to find out the proper destination 0N/A// of a java call. All the argument registers are live at this point 0N/A// but since this is generic code we don't know what they are and the caller 0N/A// must do any gc of the args. 0N/A // allocate space for the code 0N/A // Set an oopmap for the call site. 0N/A // We need this not only for callee-saved registers, but also for volatile 0N/A // registers that the compiler might be keeping live across a safepoint. 0N/A // rax, contains the address we are going to jump to assuming no exception got installed 0N/A // clear last_Java_sp 0N/A // check for pending exceptions 0N/A // get the returned methodOop 0N/A // We are back the the original state on entry and ready to go. 0N/A // Pending exception after the safepoint 0N/A // exception pending => remove activation and forward to exception handler 0N/A // make sure all code is generated 0N/A // frame_size_words or bytes?? 0N/A "wrong_method_stub");
0N/A "resolve_opt_virtual_call");
0N/A "resolve_virtual_call");
0N/A "resolve_static_call");