0N/A/*
2346N/A * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "c1/c1_Compilation.hpp"
1879N/A#include "c1/c1_FrameMap.hpp"
1879N/A#include "c1/c1_Instruction.hpp"
1879N/A#include "c1/c1_LIRAssembler.hpp"
1879N/A#include "c1/c1_LIRGenerator.hpp"
1879N/A#include "c1/c1_Runtime1.hpp"
1879N/A#include "c1/c1_ValueStack.hpp"
1879N/A#include "ci/ciArray.hpp"
1879N/A#include "ci/ciObjArrayKlass.hpp"
1879N/A#include "ci/ciTypeArrayKlass.hpp"
1879N/A#include "runtime/sharedRuntime.hpp"
1879N/A#include "runtime/stubRoutines.hpp"
1879N/A#include "vmreg_sparc.inline.hpp"
0N/A
0N/A#ifdef ASSERT
0N/A#define __ gen()->lir(__FILE__, __LINE__)->
0N/A#else
0N/A#define __ gen()->lir()->
0N/A#endif
0N/A
0N/Avoid LIRItem::load_byte_item() {
0N/A // byte loads use same registers as other loads
0N/A load_item();
0N/A}
0N/A
0N/A
0N/Avoid LIRItem::load_nonconstant() {
0N/A LIR_Opr r = value()->operand();
0N/A if (_gen->can_inline_as_constant(value())) {
0N/A if (!r->is_constant()) {
0N/A r = LIR_OprFact::value_type(value()->type());
0N/A }
0N/A _result = r;
0N/A } else {
0N/A load_item();
0N/A }
0N/A}
0N/A
0N/A
0N/A//--------------------------------------------------------------
0N/A// LIRGenerator
0N/A//--------------------------------------------------------------
0N/A
0N/ALIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; }
0N/ALIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; }
0N/ALIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); }
0N/ALIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_INT); }
0N/A
0N/ALIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
0N/A LIR_Opr opr;
0N/A switch (type->tag()) {
0N/A case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break;
0N/A case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break;
0N/A case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
0N/A case floatTag: opr = FrameMap::F0_opr; break;
0N/A case doubleTag: opr = FrameMap::F0_double_opr; break;
0N/A
0N/A case addressTag:
0N/A default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
0N/A }
0N/A
0N/A assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
0N/A return opr;
0N/A}
0N/A
0N/ALIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
0N/A LIR_Opr reg = new_register(type);
0N/A set_vreg_flag(reg, callee_saved);
0N/A return reg;
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::rlock_byte(BasicType type) {
0N/A return new_register(T_INT);
0N/A}
0N/A
0N/A
0N/A
0N/A
0N/A
0N/A//--------- loading items into registers --------------------------------
0N/A
0N/A// SPARC cannot inline all constants
0N/Abool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
0N/A if (v->type()->as_IntConstant() != NULL) {
0N/A return v->type()->as_IntConstant()->value() == 0;
0N/A } else if (v->type()->as_LongConstant() != NULL) {
0N/A return v->type()->as_LongConstant()->value() == 0L;
0N/A } else if (v->type()->as_ObjectConstant() != NULL) {
0N/A return v->type()->as_ObjectConstant()->value()->is_null_object();
0N/A } else {
0N/A return false;
0N/A }
0N/A}
0N/A
0N/A
0N/A// only simm13 constants can be inlined
0N/Abool LIRGenerator:: can_inline_as_constant(Value i) const {
0N/A if (i->type()->as_IntConstant() != NULL) {
0N/A return Assembler::is_simm13(i->type()->as_IntConstant()->value());
0N/A } else {
0N/A return can_store_as_constant(i, as_BasicType(i->type()));
0N/A }
0N/A}
0N/A
0N/A
0N/Abool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
0N/A if (c->type() == T_INT) {
0N/A return Assembler::is_simm13(c->as_jint());
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::safepoint_poll_register() {
0N/A return new_register(T_INT);
0N/A}
0N/A
0N/A
0N/A
0N/ALIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
0N/A int shift, int disp, BasicType type) {
0N/A assert(base->is_register(), "must be");
0N/A
0N/A // accumulate fixed displacements
0N/A if (index->is_constant()) {
0N/A disp += index->as_constant_ptr()->as_jint() << shift;
0N/A index = LIR_OprFact::illegalOpr;
0N/A }
0N/A
0N/A if (index->is_register()) {
0N/A // apply the shift and accumulate the displacement
0N/A if (shift > 0) {
1060N/A LIR_Opr tmp = new_pointer_register();
0N/A __ shift_left(index, shift, tmp);
0N/A index = tmp;
0N/A }
0N/A if (disp != 0) {
1060N/A LIR_Opr tmp = new_pointer_register();
0N/A if (Assembler::is_simm13(disp)) {
1060N/A __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
0N/A index = tmp;
0N/A } else {
1060N/A __ move(LIR_OprFact::intptrConst(disp), tmp);
0N/A __ add(tmp, index, tmp);
0N/A index = tmp;
0N/A }
0N/A disp = 0;
0N/A }
0N/A } else if (disp != 0 && !Assembler::is_simm13(disp)) {
0N/A // index is illegal so replace it with the displacement loaded into a register
1060N/A index = new_pointer_register();
1060N/A __ move(LIR_OprFact::intptrConst(disp), index);
0N/A disp = 0;
0N/A }
0N/A
0N/A // at this point we either have base + index or base + displacement
0N/A if (disp == 0) {
0N/A return new LIR_Address(base, index, type);
0N/A } else {
0N/A assert(Assembler::is_simm13(disp), "must be");
0N/A return new LIR_Address(base, disp, type);
0N/A }
0N/A}
0N/A
0N/A
0N/ALIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
0N/A BasicType type, bool needs_card_mark) {
29N/A int elem_size = type2aelembytes(type);
0N/A int shift = exact_log2(elem_size);
0N/A
0N/A LIR_Opr base_opr;
0N/A int offset = arrayOopDesc::base_offset_in_bytes(type);
0N/A
0N/A if (index_opr->is_constant()) {
0N/A int i = index_opr->as_constant_ptr()->as_jint();
0N/A int array_offset = i * elem_size;
0N/A if (Assembler::is_simm13(array_offset + offset)) {
0N/A base_opr = array_opr;
0N/A offset = array_offset + offset;
0N/A } else {
0N/A base_opr = new_pointer_register();
0N/A if (Assembler::is_simm13(array_offset)) {
0N/A __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
0N/A } else {
0N/A __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
0N/A __ add(base_opr, array_opr, base_opr);
0N/A }
0N/A }
0N/A } else {
0N/A#ifdef _LP64
0N/A if (index_opr->type() == T_INT) {
0N/A LIR_Opr tmp = new_register(T_LONG);
0N/A __ convert(Bytecodes::_i2l, index_opr, tmp);
0N/A index_opr = tmp;
0N/A }
0N/A#endif
0N/A
0N/A base_opr = new_pointer_register();
0N/A assert (index_opr->is_register(), "Must be register");
0N/A if (shift > 0) {
0N/A __ shift_left(index_opr, shift, base_opr);
0N/A __ add(base_opr, array_opr, base_opr);
0N/A } else {
0N/A __ add(index_opr, array_opr, base_opr);
0N/A }
0N/A }
0N/A if (needs_card_mark) {
0N/A LIR_Opr ptr = new_pointer_register();
0N/A __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
1492N/A return new LIR_Address(ptr, type);
0N/A } else {
0N/A return new LIR_Address(base_opr, offset, type);
0N/A }
0N/A}
0N/A
1703N/ALIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
1703N/A LIR_Opr r;
1703N/A if (type == T_LONG) {
1703N/A r = LIR_OprFact::longConst(x);
1703N/A } else if (type == T_INT) {
1703N/A r = LIR_OprFact::intConst(x);
1703N/A } else {
1703N/A ShouldNotReachHere();
1703N/A }
1703N/A if (!Assembler::is_simm13(x)) {
1703N/A LIR_Opr tmp = new_register(type);
1703N/A __ move(r, tmp);
1703N/A return tmp;
1703N/A }
1703N/A return r;
1703N/A}
0N/A
1703N/Avoid LIRGenerator::increment_counter(address counter, BasicType type, int step) {
0N/A LIR_Opr pointer = new_pointer_register();
0N/A __ move(LIR_OprFact::intptrConst(counter), pointer);
1703N/A LIR_Address* addr = new LIR_Address(pointer, type);
0N/A increment_counter(addr, step);
0N/A}
0N/A
0N/Avoid LIRGenerator::increment_counter(LIR_Address* addr, int step) {
1703N/A LIR_Opr temp = new_register(addr->type());
0N/A __ move(addr, temp);
1703N/A __ add(temp, load_immediate(step, addr->type()), temp);
0N/A __ move(temp, addr);
0N/A}
0N/A
0N/Avoid LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
0N/A LIR_Opr o7opr = FrameMap::O7_opr;
0N/A __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
0N/A __ cmp(condition, o7opr, c);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
0N/A LIR_Opr o7opr = FrameMap::O7_opr;
0N/A __ load(new LIR_Address(base, disp, type), o7opr, info);
0N/A __ cmp(condition, reg, o7opr);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
0N/A LIR_Opr o7opr = FrameMap::O7_opr;
0N/A __ load(new LIR_Address(base, disp, type), o7opr, info);
0N/A __ cmp(condition, reg, o7opr);
0N/A}
0N/A
0N/A
0N/Abool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
0N/A assert(left != result, "should be different registers");
0N/A if (is_power_of_2(c + 1)) {
0N/A __ shift_left(left, log2_intptr(c + 1), result);
0N/A __ sub(result, left, result);
0N/A return true;
0N/A } else if (is_power_of_2(c - 1)) {
0N/A __ shift_left(left, log2_intptr(c - 1), result);
0N/A __ add(result, left, result);
0N/A return true;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
0N/A BasicType t = item->type();
0N/A LIR_Opr sp_opr = FrameMap::SP_opr;
0N/A if ((t == T_LONG || t == T_DOUBLE) &&
0N/A ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
0N/A __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
0N/A } else {
0N/A __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
0N/A }
0N/A}
0N/A
0N/A//----------------------------------------------------------------------
0N/A// visitor functions
0N/A//----------------------------------------------------------------------
0N/A
0N/A
0N/Avoid LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
1739N/A assert(x->is_pinned(),"");
0N/A bool needs_range_check = true;
0N/A bool use_length = x->length() != NULL;
0N/A bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
0N/A bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
2793N/A !get_jobject_constant(x->value())->is_null_object() ||
2793N/A x->should_profile());
0N/A
0N/A LIRItem array(x->array(), this);
0N/A LIRItem index(x->index(), this);
0N/A LIRItem value(x->value(), this);
0N/A LIRItem length(this);
0N/A
0N/A array.load_item();
0N/A index.load_nonconstant();
0N/A
0N/A if (use_length) {
0N/A needs_range_check = x->compute_needs_range_check();
0N/A if (needs_range_check) {
0N/A length.set_instruction(x->length());
0N/A length.load_item();
0N/A }
0N/A }
0N/A if (needs_store_check) {
0N/A value.load_item();
0N/A } else {
0N/A value.load_for_store(x->elt_type());
0N/A }
0N/A
0N/A set_no_result(x);
0N/A
0N/A // the CodeEmitInfo must be duplicated for each different
0N/A // LIR-instruction because spilling can occur anywhere between two
0N/A // instructions and so the debug information must be different
0N/A CodeEmitInfo* range_check_info = state_for(x);
0N/A CodeEmitInfo* null_check_info = NULL;
0N/A if (x->needs_null_check()) {
0N/A null_check_info = new CodeEmitInfo(range_check_info);
0N/A }
0N/A
0N/A // emit array address setup early so it schedules better
0N/A LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
0N/A
0N/A if (GenerateRangeChecks && needs_range_check) {
0N/A if (use_length) {
0N/A __ cmp(lir_cond_belowEqual, length.result(), index.result());
0N/A __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
0N/A } else {
0N/A array_range_check(array.result(), index.result(), null_check_info, range_check_info);
0N/A // range_check also does the null check
0N/A null_check_info = NULL;
0N/A }
0N/A }
0N/A
0N/A if (GenerateArrayStoreCheck && needs_store_check) {
0N/A LIR_Opr tmp1 = FrameMap::G1_opr;
0N/A LIR_Opr tmp2 = FrameMap::G3_opr;
0N/A LIR_Opr tmp3 = FrameMap::G5_opr;
0N/A
0N/A CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
2793N/A __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
0N/A }
0N/A
342N/A if (obj_store) {
342N/A // Needs GC write barriers.
2346N/A pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
2346N/A true /* do_load */, false /* patch */, NULL);
342N/A }
0N/A __ move(value.result(), array_addr, null_check_info);
0N/A if (obj_store) {
819N/A // Precise card mark
0N/A post_barrier(LIR_OprFact::address(array_addr), value.result());
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
1739N/A assert(x->is_pinned(),"");
0N/A LIRItem obj(x->obj(), this);
0N/A obj.load_item();
0N/A
0N/A set_no_result(x);
0N/A
0N/A LIR_Opr lock = FrameMap::G1_opr;
0N/A LIR_Opr scratch = FrameMap::G3_opr;
0N/A LIR_Opr hdr = FrameMap::G4_opr;
0N/A
0N/A CodeEmitInfo* info_for_exception = NULL;
0N/A if (x->needs_null_check()) {
1739N/A info_for_exception = state_for(x);
0N/A }
0N/A
0N/A // this CodeEmitInfo must not have the xhandlers because here the
0N/A // object is already locked (xhandlers expects object to be unlocked)
0N/A CodeEmitInfo* info = state_for(x, x->state(), true);
0N/A monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_MonitorExit(MonitorExit* x) {
1739N/A assert(x->is_pinned(),"");
0N/A LIRItem obj(x->obj(), this);
0N/A obj.dont_load_item();
0N/A
0N/A set_no_result(x);
0N/A LIR_Opr lock = FrameMap::G1_opr;
0N/A LIR_Opr hdr = FrameMap::G3_opr;
0N/A LIR_Opr obj_temp = FrameMap::G4_opr;
1601N/A monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
0N/A}
0N/A
0N/A
0N/A// _ineg, _lneg, _fneg, _dneg
0N/Avoid LIRGenerator::do_NegateOp(NegateOp* x) {
0N/A LIRItem value(x->x(), this);
0N/A value.load_item();
0N/A LIR_Opr reg = rlock_result(x);
0N/A __ negate(value.result(), reg);
0N/A}
0N/A
0N/A
0N/A
0N/A// for _fadd, _fmul, _fsub, _fdiv, _frem
0N/A// _dadd, _dmul, _dsub, _ddiv, _drem
0N/Avoid LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
0N/A switch (x->op()) {
0N/A case Bytecodes::_fadd:
0N/A case Bytecodes::_fmul:
0N/A case Bytecodes::_fsub:
0N/A case Bytecodes::_fdiv:
0N/A case Bytecodes::_dadd:
0N/A case Bytecodes::_dmul:
0N/A case Bytecodes::_dsub:
0N/A case Bytecodes::_ddiv: {
0N/A LIRItem left(x->x(), this);
0N/A LIRItem right(x->y(), this);
0N/A left.load_item();
0N/A right.load_item();
0N/A rlock_result(x);
0N/A arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
0N/A }
0N/A break;
0N/A
0N/A case Bytecodes::_frem:
0N/A case Bytecodes::_drem: {
0N/A address entry;
0N/A switch (x->op()) {
0N/A case Bytecodes::_frem:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
0N/A break;
0N/A case Bytecodes::_drem:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
0N/A break;
0N/A default:
0N/A ShouldNotReachHere();
0N/A }
0N/A LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
0N/A set_result(x, result);
0N/A }
0N/A break;
0N/A
0N/A default: ShouldNotReachHere();
0N/A }
0N/A}
0N/A
0N/A
0N/A// for _ladd, _lmul, _lsub, _ldiv, _lrem
0N/Avoid LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
0N/A switch (x->op()) {
0N/A case Bytecodes::_lrem:
0N/A case Bytecodes::_lmul:
0N/A case Bytecodes::_ldiv: {
0N/A
0N/A if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
0N/A LIRItem right(x->y(), this);
0N/A right.load_item();
0N/A
0N/A CodeEmitInfo* info = state_for(x);
0N/A LIR_Opr item = right.result();
0N/A assert(item->is_register(), "must be");
0N/A __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
0N/A __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
0N/A }
0N/A
0N/A address entry;
0N/A switch (x->op()) {
0N/A case Bytecodes::_lrem:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
0N/A break; // check if dividend is 0 is done elsewhere
0N/A case Bytecodes::_ldiv:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
0N/A break; // check if dividend is 0 is done elsewhere
0N/A case Bytecodes::_lmul:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
0N/A break;
0N/A default:
0N/A ShouldNotReachHere();
0N/A }
0N/A
0N/A // order of arguments to runtime call is reversed.
0N/A LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
0N/A set_result(x, result);
0N/A break;
0N/A }
0N/A case Bytecodes::_ladd:
0N/A case Bytecodes::_lsub: {
0N/A LIRItem left(x->x(), this);
0N/A LIRItem right(x->y(), this);
0N/A left.load_item();
0N/A right.load_item();
0N/A rlock_result(x);
0N/A
0N/A arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
0N/A break;
0N/A }
0N/A default: ShouldNotReachHere();
0N/A }
0N/A}
0N/A
0N/A
0N/A// Returns if item is an int constant that can be represented by a simm13
0N/Astatic bool is_simm13(LIR_Opr item) {
0N/A if (item->is_constant() && item->type() == T_INT) {
0N/A return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
0N/A } else {
0N/A return false;
0N/A }
0N/A}
0N/A
0N/A
0N/A// for: _iadd, _imul, _isub, _idiv, _irem
0N/Avoid LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
0N/A bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
0N/A LIRItem left(x->x(), this);
0N/A LIRItem right(x->y(), this);
0N/A // missing test if instr is commutative and if we should swap
0N/A right.load_nonconstant();
0N/A assert(right.is_constant() || right.is_register(), "wrong state of right");
0N/A left.load_item();
0N/A rlock_result(x);
0N/A if (is_div_rem) {
0N/A CodeEmitInfo* info = state_for(x);
0N/A LIR_Opr tmp = FrameMap::G1_opr;
0N/A if (x->op() == Bytecodes::_irem) {
0N/A __ irem(left.result(), right.result(), x->operand(), tmp, info);
0N/A } else if (x->op() == Bytecodes::_idiv) {
0N/A __ idiv(left.result(), right.result(), x->operand(), tmp, info);
0N/A }
0N/A } else {
0N/A arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
0N/A ValueTag tag = x->type()->tag();
0N/A assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
0N/A switch (tag) {
0N/A case floatTag:
0N/A case doubleTag: do_ArithmeticOp_FPU(x); return;
0N/A case longTag: do_ArithmeticOp_Long(x); return;
0N/A case intTag: do_ArithmeticOp_Int(x); return;
0N/A }
0N/A ShouldNotReachHere();
0N/A}
0N/A
0N/A
0N/A// _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
0N/Avoid LIRGenerator::do_ShiftOp(ShiftOp* x) {
0N/A LIRItem value(x->x(), this);
0N/A LIRItem count(x->y(), this);
0N/A // Long shift destroys count register
0N/A if (value.type()->is_long()) {
0N/A count.set_destroys_register();
0N/A }
0N/A value.load_item();
0N/A // the old backend doesn't support this
0N/A if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
0N/A jint c = count.get_jint_constant() & 0x1f;
0N/A assert(c >= 0 && c < 32, "should be small");
0N/A count.dont_load_item();
0N/A } else {
0N/A count.load_item();
0N/A }
0N/A LIR_Opr reg = rlock_result(x);
0N/A shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
0N/A}
0N/A
0N/A
0N/A// _iand, _land, _ior, _lor, _ixor, _lxor
0N/Avoid LIRGenerator::do_LogicOp(LogicOp* x) {
0N/A LIRItem left(x->x(), this);
0N/A LIRItem right(x->y(), this);
0N/A
0N/A left.load_item();
0N/A right.load_nonconstant();
0N/A LIR_Opr reg = rlock_result(x);
0N/A
0N/A logic_op(x->op(), reg, left.result(), right.result());
0N/A}
0N/A
0N/A
0N/A
0N/A// _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
0N/Avoid LIRGenerator::do_CompareOp(CompareOp* x) {
0N/A LIRItem left(x->x(), this);
0N/A LIRItem right(x->y(), this);
0N/A left.load_item();
0N/A right.load_item();
0N/A LIR_Opr reg = rlock_result(x);
0N/A if (x->x()->type()->is_float_kind()) {
0N/A Bytecodes::Code code = x->op();
0N/A __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
0N/A } else if (x->x()->type()->tag() == longTag) {
0N/A __ lcmp2int(left.result(), right.result(), reg);
0N/A } else {
0N/A Unimplemented();
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
0N/A assert(x->number_of_arguments() == 4, "wrong type");
0N/A LIRItem obj (x->argument_at(0), this); // object
0N/A LIRItem offset(x->argument_at(1), this); // offset of field
0N/A LIRItem cmp (x->argument_at(2), this); // value to compare with field
0N/A LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
0N/A
0N/A // Use temps to avoid kills
0N/A LIR_Opr t1 = FrameMap::G1_opr;
0N/A LIR_Opr t2 = FrameMap::G3_opr;
1793N/A LIR_Opr addr = new_pointer_register();
0N/A
0N/A // get address of field
0N/A obj.load_item();
0N/A offset.load_item();
0N/A cmp.load_item();
0N/A val.load_item();
0N/A
0N/A __ add(obj.result(), offset.result(), addr);
0N/A
342N/A if (type == objectType) { // Write-barrier needed for Object fields.
2346N/A pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
2346N/A true /* do_load */, false /* patch */, NULL);
342N/A }
342N/A
0N/A if (type == objectType)
0N/A __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
0N/A else if (type == intType)
0N/A __ cas_int(addr, cmp.result(), val.result(), t1, t2);
0N/A else if (type == longType)
0N/A __ cas_long(addr, cmp.result(), val.result(), t1, t2);
0N/A else {
0N/A ShouldNotReachHere();
0N/A }
0N/A // generate conditional move of boolean result
0N/A LIR_Opr result = rlock_result(x);
1977N/A __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
1977N/A result, as_BasicType(type));
0N/A if (type == objectType) { // Write-barrier needed for Object fields.
819N/A // Precise card mark since could either be object or array
342N/A post_barrier(addr, val.result());
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
0N/A switch (x->id()) {
0N/A case vmIntrinsics::_dabs:
0N/A case vmIntrinsics::_dsqrt: {
0N/A assert(x->number_of_arguments() == 1, "wrong type");
0N/A LIRItem value(x->argument_at(0), this);
0N/A value.load_item();
0N/A LIR_Opr dst = rlock_result(x);
0N/A
0N/A switch (x->id()) {
0N/A case vmIntrinsics::_dsqrt: {
0N/A __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
0N/A break;
0N/A }
0N/A case vmIntrinsics::_dabs: {
0N/A __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
0N/A break;
0N/A }
0N/A }
0N/A break;
0N/A }
0N/A case vmIntrinsics::_dlog10: // fall through
0N/A case vmIntrinsics::_dlog: // fall through
0N/A case vmIntrinsics::_dsin: // fall through
0N/A case vmIntrinsics::_dtan: // fall through
3752N/A case vmIntrinsics::_dcos: // fall through
3752N/A case vmIntrinsics::_dexp: {
0N/A assert(x->number_of_arguments() == 1, "wrong type");
0N/A
0N/A address runtime_entry = NULL;
0N/A switch (x->id()) {
0N/A case vmIntrinsics::_dsin:
0N/A runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
0N/A break;
0N/A case vmIntrinsics::_dcos:
0N/A runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
0N/A break;
0N/A case vmIntrinsics::_dtan:
0N/A runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
0N/A break;
0N/A case vmIntrinsics::_dlog:
0N/A runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
0N/A break;
0N/A case vmIntrinsics::_dlog10:
0N/A runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
0N/A break;
3752N/A case vmIntrinsics::_dexp:
3752N/A runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
3752N/A break;
0N/A default:
0N/A ShouldNotReachHere();
0N/A }
0N/A
0N/A LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
0N/A set_result(x, result);
3752N/A break;
3752N/A }
3752N/A case vmIntrinsics::_dpow: {
3752N/A assert(x->number_of_arguments() == 2, "wrong type");
3752N/A address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
3752N/A LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
3752N/A set_result(x, result);
3752N/A break;
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_ArrayCopy(Intrinsic* x) {
0N/A assert(x->number_of_arguments() == 5, "wrong type");
928N/A
928N/A // Make all state_for calls early since they can emit code
928N/A CodeEmitInfo* info = state_for(x, x->state());
928N/A
0N/A // Note: spill caller save before setting the item
0N/A LIRItem src (x->argument_at(0), this);
0N/A LIRItem src_pos (x->argument_at(1), this);
0N/A LIRItem dst (x->argument_at(2), this);
0N/A LIRItem dst_pos (x->argument_at(3), this);
0N/A LIRItem length (x->argument_at(4), this);
0N/A // load all values in callee_save_registers, as this makes the
0N/A // parameter passing to the fast case simpler
0N/A src.load_item_force (rlock_callee_saved(T_OBJECT));
0N/A src_pos.load_item_force (rlock_callee_saved(T_INT));
0N/A dst.load_item_force (rlock_callee_saved(T_OBJECT));
0N/A dst_pos.load_item_force (rlock_callee_saved(T_INT));
0N/A length.load_item_force (rlock_callee_saved(T_INT));
0N/A
0N/A int flags;
0N/A ciArrayKlass* expected_type;
0N/A arraycopy_helper(x, &flags, &expected_type);
0N/A
0N/A __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
0N/A length.result(), rlock_callee_saved(T_INT),
0N/A expected_type, flags, info);
0N/A set_no_result(x);
0N/A}
0N/A
0N/A// _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
0N/A// _i2b, _i2c, _i2s
0N/Avoid LIRGenerator::do_Convert(Convert* x) {
0N/A
0N/A switch (x->op()) {
0N/A case Bytecodes::_f2l:
0N/A case Bytecodes::_d2l:
0N/A case Bytecodes::_d2i:
0N/A case Bytecodes::_l2f:
0N/A case Bytecodes::_l2d: {
0N/A
0N/A address entry;
0N/A switch (x->op()) {
0N/A case Bytecodes::_l2f:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
0N/A break;
0N/A case Bytecodes::_l2d:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
0N/A break;
0N/A case Bytecodes::_f2l:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
0N/A break;
0N/A case Bytecodes::_d2l:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
0N/A break;
0N/A case Bytecodes::_d2i:
0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
0N/A break;
0N/A default:
0N/A ShouldNotReachHere();
0N/A }
0N/A LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
0N/A set_result(x, result);
0N/A break;
0N/A }
0N/A
0N/A case Bytecodes::_i2f:
0N/A case Bytecodes::_i2d: {
0N/A LIRItem value(x->value(), this);
0N/A
0N/A LIR_Opr reg = rlock_result(x);
0N/A // To convert an int to double, we need to load the 32-bit int
0N/A // from memory into a single precision floating point register
0N/A // (even numbered). Then the sparc fitod instruction takes care
0N/A // of the conversion. This is a bit ugly, but is the best way to
0N/A // get the int value in a single precision floating point register
0N/A value.load_item();
0N/A LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
0N/A __ convert(x->op(), tmp, reg);
0N/A break;
0N/A }
0N/A break;
0N/A
0N/A case Bytecodes::_i2l:
0N/A case Bytecodes::_i2b:
0N/A case Bytecodes::_i2c:
0N/A case Bytecodes::_i2s:
0N/A case Bytecodes::_l2i:
0N/A case Bytecodes::_f2d:
0N/A case Bytecodes::_d2f: { // inline code
0N/A LIRItem value(x->value(), this);
0N/A
0N/A value.load_item();
0N/A LIR_Opr reg = rlock_result(x);
0N/A __ convert(x->op(), value.result(), reg, false);
0N/A }
0N/A break;
0N/A
0N/A case Bytecodes::_f2i: {
0N/A LIRItem value (x->value(), this);
0N/A value.set_destroys_register();
0N/A value.load_item();
0N/A LIR_Opr reg = rlock_result(x);
0N/A set_vreg_flag(reg, must_start_in_memory);
0N/A __ convert(x->op(), value.result(), reg, false);
0N/A }
0N/A break;
0N/A
0N/A default: ShouldNotReachHere();
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_NewInstance(NewInstance* x) {
0N/A // This instruction can be deoptimized in the slow path : use
0N/A // O0 as result register.
0N/A const LIR_Opr reg = result_register_for(x->type());
1739N/A#ifndef PRODUCT
0N/A if (PrintNotLoaded && !x->klass()->is_loaded()) {
1739N/A tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
0N/A }
1739N/A#endif
0N/A CodeEmitInfo* info = state_for(x, x->state());
0N/A LIR_Opr tmp1 = FrameMap::G1_oop_opr;
0N/A LIR_Opr tmp2 = FrameMap::G3_oop_opr;
0N/A LIR_Opr tmp3 = FrameMap::G4_oop_opr;
0N/A LIR_Opr tmp4 = FrameMap::O1_oop_opr;
0N/A LIR_Opr klass_reg = FrameMap::G5_oop_opr;
0N/A new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
0N/A LIR_Opr result = rlock_result(x);
0N/A __ move(reg, result);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
928N/A // Evaluate state_for early since it may emit code
928N/A CodeEmitInfo* info = state_for(x, x->state());
928N/A
0N/A LIRItem length(x->length(), this);
0N/A length.load_item();
0N/A
0N/A LIR_Opr reg = result_register_for(x->type());
0N/A LIR_Opr tmp1 = FrameMap::G1_oop_opr;
0N/A LIR_Opr tmp2 = FrameMap::G3_oop_opr;
0N/A LIR_Opr tmp3 = FrameMap::G4_oop_opr;
0N/A LIR_Opr tmp4 = FrameMap::O1_oop_opr;
0N/A LIR_Opr klass_reg = FrameMap::G5_oop_opr;
0N/A LIR_Opr len = length.result();
0N/A BasicType elem_type = x->elt_type();
0N/A
989N/A __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
0N/A
0N/A CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
0N/A __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
0N/A
0N/A LIR_Opr result = rlock_result(x);
0N/A __ move(reg, result);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
928N/A // Evaluate state_for early since it may emit code.
928N/A CodeEmitInfo* info = state_for(x, x->state());
0N/A // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
0N/A // and therefore provide the state before the parameters have been consumed
0N/A CodeEmitInfo* patching_info = NULL;
0N/A if (!x->klass()->is_loaded() || PatchALot) {
0N/A patching_info = state_for(x, x->state_before());
0N/A }
0N/A
928N/A LIRItem length(x->length(), this);
0N/A length.load_item();
0N/A
0N/A const LIR_Opr reg = result_register_for(x->type());
0N/A LIR_Opr tmp1 = FrameMap::G1_oop_opr;
0N/A LIR_Opr tmp2 = FrameMap::G3_oop_opr;
0N/A LIR_Opr tmp3 = FrameMap::G4_oop_opr;
0N/A LIR_Opr tmp4 = FrameMap::O1_oop_opr;
0N/A LIR_Opr klass_reg = FrameMap::G5_oop_opr;
0N/A LIR_Opr len = length.result();
0N/A
0N/A CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
0N/A ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
0N/A if (obj == ciEnv::unloaded_ciobjarrayklass()) {
0N/A BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
0N/A }
0N/A jobject2reg_with_patching(klass_reg, obj, patching_info);
0N/A __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
0N/A
0N/A LIR_Opr result = rlock_result(x);
0N/A __ move(reg, result);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
0N/A Values* dims = x->dims();
0N/A int i = dims->length();
0N/A LIRItemList* items = new LIRItemList(dims->length(), NULL);
0N/A while (i-- > 0) {
0N/A LIRItem* size = new LIRItem(dims->at(i), this);
0N/A items->at_put(i, size);
0N/A }
0N/A
928N/A // Evaluate state_for early since it may emit code.
0N/A CodeEmitInfo* patching_info = NULL;
0N/A if (!x->klass()->is_loaded() || PatchALot) {
0N/A patching_info = state_for(x, x->state_before());
0N/A
3812N/A // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
3812N/A // clone all handlers (NOTE: Usually this is handled transparently
3812N/A // by the CodeEmitInfo cloning logic in CodeStub constructors but
3812N/A // is done explicitly here because a stub isn't being used).
0N/A x->set_exception_handlers(new XHandlers(x->exception_handlers()));
0N/A }
933N/A CodeEmitInfo* info = state_for(x, x->state());
0N/A
0N/A i = dims->length();
0N/A while (i-- > 0) {
0N/A LIRItem* size = items->at(i);
0N/A size->load_item();
0N/A store_stack_parameter (size->result(),
0N/A in_ByteSize(STACK_BIAS +
304N/A frame::memory_parameter_word_sp_offset * wordSize +
304N/A i * sizeof(jint)));
0N/A }
0N/A
0N/A // This instruction can be deoptimized in the slow path : use
0N/A // O0 as result register.
0N/A const LIR_Opr reg = result_register_for(x->type());
0N/A jobject2reg_with_patching(reg, x->klass(), patching_info);
0N/A LIR_Opr rank = FrameMap::O1_opr;
0N/A __ move(LIR_OprFact::intConst(x->rank()), rank);
0N/A LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
0N/A int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
0N/A __ add(FrameMap::SP_opr,
0N/A LIR_OprFact::intptrConst(offset_from_sp),
0N/A varargs);
0N/A LIR_OprList* args = new LIR_OprList(3);
0N/A args->append(reg);
0N/A args->append(rank);
0N/A args->append(varargs);
0N/A __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
0N/A LIR_OprFact::illegalOpr,
0N/A reg, args, info);
0N/A
0N/A LIR_Opr result = rlock_result(x);
0N/A __ move(reg, result);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_BlockBegin(BlockBegin* x) {
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_CheckCast(CheckCast* x) {
0N/A LIRItem obj(x->obj(), this);
0N/A CodeEmitInfo* patching_info = NULL;
0N/A if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
0N/A // must do this before locking the destination register as an oop register,
0N/A // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
0N/A patching_info = state_for(x, x->state_before());
0N/A }
0N/A obj.load_item();
0N/A LIR_Opr out_reg = rlock_result(x);
0N/A CodeStub* stub;
1739N/A CodeEmitInfo* info_for_exception = state_for(x);
0N/A
0N/A if (x->is_incompatible_class_change_check()) {
0N/A assert(patching_info == NULL, "can't patch this");
0N/A stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
0N/A } else {
0N/A stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
0N/A }
0N/A LIR_Opr tmp1 = FrameMap::G1_oop_opr;
0N/A LIR_Opr tmp2 = FrameMap::G3_oop_opr;
0N/A LIR_Opr tmp3 = FrameMap::G4_oop_opr;
0N/A __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
0N/A x->direct_compare(), info_for_exception, patching_info, stub,
0N/A x->profiled_method(), x->profiled_bci());
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_InstanceOf(InstanceOf* x) {
0N/A LIRItem obj(x->obj(), this);
0N/A CodeEmitInfo* patching_info = NULL;
0N/A if (!x->klass()->is_loaded() || PatchALot) {
0N/A patching_info = state_for(x, x->state_before());
0N/A }
0N/A // ensure the result register is not the input register because the result is initialized before the patching safepoint
0N/A obj.load_item();
0N/A LIR_Opr out_reg = rlock_result(x);
0N/A LIR_Opr tmp1 = FrameMap::G1_oop_opr;
0N/A LIR_Opr tmp2 = FrameMap::G3_oop_opr;
0N/A LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1711N/A __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1711N/A x->direct_compare(), patching_info,
1711N/A x->profiled_method(), x->profiled_bci());
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_If(If* x) {
0N/A assert(x->number_of_sux() == 2, "inconsistency");
0N/A ValueTag tag = x->x()->type()->tag();
0N/A LIRItem xitem(x->x(), this);
0N/A LIRItem yitem(x->y(), this);
0N/A LIRItem* xin = &xitem;
0N/A LIRItem* yin = &yitem;
0N/A If::Condition cond = x->cond();
0N/A
0N/A if (tag == longTag) {
0N/A // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
0N/A // mirror for other conditions
0N/A if (cond == If::gtr || cond == If::leq) {
0N/A // swap inputs
0N/A cond = Instruction::mirror(cond);
0N/A xin = &yitem;
0N/A yin = &xitem;
0N/A }
0N/A xin->set_destroys_register();
0N/A }
0N/A
0N/A LIR_Opr left = LIR_OprFact::illegalOpr;
0N/A LIR_Opr right = LIR_OprFact::illegalOpr;
0N/A
0N/A xin->load_item();
0N/A left = xin->result();
0N/A
0N/A if (is_simm13(yin->result())) {
0N/A // inline int constants which are small enough to be immediate operands
0N/A right = LIR_OprFact::value_type(yin->value()->type());
0N/A } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
0N/A (cond == If::eql || cond == If::neq)) {
0N/A // inline long zero
0N/A right = LIR_OprFact::value_type(yin->value()->type());
0N/A } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
0N/A right = LIR_OprFact::value_type(yin->value()->type());
0N/A } else {
0N/A yin->load_item();
0N/A right = yin->result();
0N/A }
0N/A set_no_result(x);
0N/A
0N/A // add safepoint before generating condition code so it can be recomputed
0N/A if (x->is_safepoint()) {
0N/A // increment backedge counter if needed
1703N/A increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
0N/A __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
0N/A }
0N/A
0N/A __ cmp(lir_cond(cond), left, right);
1703N/A // Generate branch profiling. Profiling code doesn't kill flags.
0N/A profile_branch(x, cond);
0N/A move_to_phi(x->state());
0N/A if (x->x()->type()->is_float_kind()) {
0N/A __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
0N/A } else {
0N/A __ branch(lir_cond(cond), right->type(), x->tsux());
0N/A }
0N/A assert(x->default_sux() == x->fsux(), "wrong destination above");
0N/A __ jump(x->default_sux());
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::getThreadPointer() {
0N/A return FrameMap::as_pointer_opr(G2);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::trace_block_entry(BlockBegin* block) {
0N/A __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
0N/A LIR_OprList* args = new LIR_OprList(1);
0N/A args->append(FrameMap::O0_opr);
0N/A address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
0N/A __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
0N/A CodeEmitInfo* info) {
0N/A#ifdef _LP64
0N/A __ store(value, address, info);
0N/A#else
0N/A __ volatile_store_mem_reg(value, address, info);
0N/A#endif
0N/A}
0N/A
0N/Avoid LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
0N/A CodeEmitInfo* info) {
0N/A#ifdef _LP64
0N/A __ load(address, result, info);
0N/A#else
0N/A __ volatile_load_mem_reg(address, result, info);
0N/A#endif
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
0N/A BasicType type, bool is_volatile) {
0N/A LIR_Opr base_op = src;
0N/A LIR_Opr index_op = offset;
0N/A
0N/A bool is_obj = (type == T_ARRAY || type == T_OBJECT);
0N/A#ifndef _LP64
0N/A if (is_volatile && type == T_LONG) {
0N/A __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
0N/A } else
0N/A#endif
0N/A {
0N/A if (type == T_BOOLEAN) {
0N/A type = T_BYTE;
0N/A }
0N/A LIR_Address* addr;
0N/A if (type == T_ARRAY || type == T_OBJECT) {
0N/A LIR_Opr tmp = new_pointer_register();
0N/A __ add(base_op, index_op, tmp);
1492N/A addr = new LIR_Address(tmp, type);
0N/A } else {
0N/A addr = new LIR_Address(base_op, index_op, type);
0N/A }
0N/A
342N/A if (is_obj) {
2346N/A pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
2346N/A true /* do_load */, false /* patch */, NULL);
342N/A // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
342N/A }
0N/A __ move(data, addr);
0N/A if (is_obj) {
0N/A // This address is precise
0N/A post_barrier(LIR_OprFact::address(addr), data);
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
0N/A BasicType type, bool is_volatile) {
0N/A#ifndef _LP64
0N/A if (is_volatile && type == T_LONG) {
0N/A __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
0N/A } else
0N/A#endif
0N/A {
0N/A LIR_Address* addr = new LIR_Address(src, offset, type);
0N/A __ load(addr, dst);
0N/A }
0N/A}
4015N/A
4015N/Avoid LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
4015N/A BasicType type = x->basic_type();
4015N/A LIRItem src(x->object(), this);
4015N/A LIRItem off(x->offset(), this);
4015N/A LIRItem value(x->value(), this);
4015N/A
4015N/A src.load_item();
4015N/A value.load_item();
4015N/A off.load_nonconstant();
4015N/A
4015N/A LIR_Opr dst = rlock_result(x, type);
4015N/A LIR_Opr data = value.result();
4015N/A bool is_obj = (type == T_ARRAY || type == T_OBJECT);
4015N/A LIR_Opr offset = off.result();
4015N/A
4015N/A if (data != dst) {
4015N/A __ move(data, dst);
4015N/A data = dst;
4015N/A }
4015N/A
4015N/A assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
4015N/A LIR_Address* addr;
4015N/A if (offset->is_constant()) {
4015N/A
4015N/A#ifdef _LP64
4015N/A jlong l = offset->as_jlong();
4015N/A assert((jlong)((jint)l) == l, "offset too large for constant");
4015N/A jint c = (jint)l;
4015N/A#else
4015N/A jint c = offset->as_jint();
4015N/A#endif
4015N/A addr = new LIR_Address(src.result(), c, type);
4015N/A } else {
4015N/A addr = new LIR_Address(src.result(), offset, type);
4015N/A }
4015N/A
4015N/A LIR_Opr tmp = LIR_OprFact::illegalOpr;
4015N/A LIR_Opr ptr = LIR_OprFact::illegalOpr;
4015N/A
4015N/A if (is_obj) {
4015N/A // Do the pre-write barrier, if any.
4015N/A // barriers on sparc don't work with a base + index address
4015N/A tmp = FrameMap::G3_opr;
4015N/A ptr = new_pointer_register();
4015N/A __ add(src.result(), off.result(), ptr);
4015N/A pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
4015N/A true /* do_load */, false /* patch */, NULL);
4015N/A }
4015N/A __ xchg(LIR_OprFact::address(addr), data, dst, tmp);
4015N/A if (is_obj) {
4015N/A // Seems to be a precise address
4015N/A post_barrier(ptr, data);
4015N/A }
4015N/A}