/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_SYSIOSBUS_H
#define _SYS_SYSIOSBUS_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifndef _ASM
#include <sys/machsystm.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* Things for debugging */
#ifdef SYSIO_MEM_DEBUG
#define IO_MEMUSAGE
#endif /* SYSIO_MEM_DEBUG */
/*
* sysio sbus constant definitions.
*/
/* #define INTR_MAPPING_REG_SIZE (NATURAL_REG_SIZE * 16 * 8) */
/* #define CLR_INTR_REG_SIZE (NATURAL_REG_SIZE * 16 * 8) */
/* Error registers */
/* Interrupts */
/*
* Fix these (RAZ)
* Interrupt Mapping Register defines
*/
/* Slot config register defines */
/*
* Offsets of sysio, sbus, registers
*/
/* Slot configuration register mapping offsets */
/* Interrupt mapping register mapping offsets */
/* Interrupt clear register mapping offsets */
/*
* Bit shift for accessing the keyboard mouse interrupt state reg.
* note - The external devices are the only other devices where
* we need to check the interrupt state before adding or removing
* interrupts. There is an algorithm to calculate their bit shift.
*/
#define ESP_INTR_STATE_SHIFT 0
/* used for the picN kstats */
/* Offsets for Performance registers */
/*
* used to build array of event-names and pcr-mask values
*/
typedef struct sbus_event_mask {
char *event_name;
/*
* This type is used to describe addresses that we expect a device
* to place on a bus i.e. addresses from the iommu address space.
*/
/*
* sysio sbus soft state data structure.
* We use the sbus_ctrl_reg to flush hardware store buffers because
* there is very little hardware contention on this register.
*/
struct sbus_soft_state {
/*
* device node address property:
*/
/*
* access handles in case we need to map the registers ourself:
*/
int stream_buf_off;
#ifdef _STARFIRE
#endif /* _STARFIRE */
#ifdef DEBUG
#endif /* DEBUG */
/*
* Performance registers and kstat.
*/
};
/*
* Ugly interrupt cruft due to sysio inconsistencies.
*/
struct sbus_slot_entry {
int diagreg_shift;
};
struct sbus_intr_handler {
};
/* sbus Interrupt routine wrapper structure */
struct sbus_wrapper_arg {
};
/*
* SYSIO parent private data structure contains register, interrupt, property
* and range information.
* Note: the only thing different from the "generic" sbus parent private
* data is the interrupt specification.
*/
struct sysio_parent_private_data {
};
#define SYSIO_PD(d) \
/* Used for legacy interrupts */
struct io_mem_list {
};
/*
* Function prototypes.
*/
#ifdef __cplusplus
}
#endif
#endif /* _SYS_SYSIOSBUS_H */